CN105990496B - Led封装结构及其制造方法 - Google Patents

Led封装结构及其制造方法 Download PDF

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CN105990496B
CN105990496B CN201510096121.5A CN201510096121A CN105990496B CN 105990496 B CN105990496 B CN 105990496B CN 201510096121 A CN201510096121 A CN 201510096121A CN 105990496 B CN105990496 B CN 105990496B
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phosphor powder
powder patch
led chip
patch
led
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CN105990496A (zh
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陈志源
李天佑
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Lite On Technology Changzhou Co Ltd
Lite On Technology Corp
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Lite On Technology Changzhou Co Ltd
Lite On Technology Corp
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Priority to CN201510096121.5A priority Critical patent/CN105990496B/zh
Priority to US14/818,355 priority patent/US9455387B1/en
Priority to US15/220,294 priority patent/US9653669B2/en
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Abstract

一种LED封装结构的制造方法,其步骤包括:提供基座;设置LED芯片于基座上;以金属导线电性连接基座与LED芯片的芯片电极,上述金属导线包含有顶点,且顶点相对于LED芯片的顶面的距离定义为线弧高度;以第一萤光粉贴片的半固化状态的树脂来贴合在LED芯片,第一萤光粉贴片包覆于LED芯片的顶面、环侧面及芯片电极,第一萤光粉贴片的厚度小于金属导线的线弧高度,且金属导线的顶点裸露在第一萤光粉贴片外;设置封装胶于基座内,以包覆LED芯片、金属导线、及第一萤光粉贴片。此外,本发明另提供一种LED封装结构。

Description

LED封装结构及其制造方法
技术领域
本发明涉及一种LED封装结构,且特别涉及一种使用萤光粉贴片的LED封装结构及其制造方法。
背景技术
目前应用在需要打线的LED芯片的萤光粉涂布技术大致分为:点胶(dispensing)及喷涂(spray coating)。其中,以点胶方式制成的LED封装结构大都会产生萤光粉沉淀而造成CIE座标分布不佳的问题;而以喷涂方式制成的LED封装结构则会使部分萤光粉涂布在无须设有萤光粉的部位(如:LED封装结构的基座内表面与金属导线布满萤光粉),进而造成萤光粉利用率低的问题,且于喷涂时需使用较不环保的甲苯溶剂。
于是,本发明人有感上述缺失的可改善,乃特潜心研究并配合学理的运用,终于提出一种设计合理且有效改善上述缺失的本发明。
发明内容
本发明实施例在于提供一种LED封装结构及其制造方法,其使用萤光粉贴片于打线形式的LED芯片上,能有效地解决常用萤光粉沉淀、萤光粉利用率低以及使用甲苯溶剂所产生的问题。
本发明实施例提供一种LED封装结构的制造方法,其步骤包括:一种LED封装结构的制造方法,其步骤包括:提供一基座;设置一LED芯片于该基座上,且该LED芯片的顶面具有至少一芯片电极;以至少一金属导线电性连接该基座与该LED芯片上的该至少一芯片电极,其中,该至少一金属导线包含有一顶点,该顶点相对于该LED芯片的一顶面的距离定义为一线弧高度;提供一第一萤光粉贴片,其由一第一萤光粉和一半固化状态(B-stage)的树脂混合而成;以该第一萤光粉贴片的树脂来贴合在该LED芯片,其中,该第一萤光粉贴片包覆于该LED芯片的顶面、环侧面及该至少一芯片电极,该第一萤光粉贴片的厚度小于该线弧高度,并且该至少一金属导线的顶点裸露在该第一萤光粉贴片外;以及设置一封装胶于该基座内,以包覆该LED芯片、该至少一金属导线及该第一萤光粉贴片。
本发明实施例另提供一种LED封装结构,其包括:一基座;一LED芯片,具有一顶面、一底面、及位于该顶面与该底面之间的一环侧面,该LED芯片的底面设置于该基座上,而该LED芯片的顶面设有至少一芯片电极;至少一金属导线,具有一顶点,该至少一金属导线的两端分别电性连接于该至少一芯片电极与该基座,并且该顶点与该LED芯片的顶面的距离定义为一线弧高度;一第一萤光粉贴片,由一萤光粉和一半固化状态(B-stage)的树脂混合而成,该树脂具有黏着性,该第一萤光粉贴片通过该树脂以贴合在该LED芯片上,该第一萤光粉贴片包覆于该LED芯片的顶面、环侧面及芯片电极,并且该第一萤光粉贴片的厚度小于该线弧高度,该至少一金属导线的该顶点裸露在该第一萤光粉贴片外;以及一封装胶,设置于该基座内,以包覆该LED芯片、该至少一金属导线及该第一萤光粉贴片。
综上所述,本发明的LED芯片的外表面与芯片电极皆被萤光粉贴片所覆盖,因而不会漏光,以避免造成LED封装结构色均匀性不佳。
为使能更进一步了解本发明的特征及技术内容,请参阅以下有关本发明的详细说明与附图,但是此等说明与所附附图仅用来说明本发明,而非对本发明的权利范围作任何的限制。
附图说明
图1A与图1B为本发明LED封装结构的制造方法的步骤S110示意图。
图2为本发明LED封装结构的制造方法的步骤S120示意图。
图3A至图3C为本发明LED封装结构的制造方法的步骤S130示意图。
图4A和图4B为本发明LED封装结构的制造方法的步骤S140示意图。
图5A和图5B为本发明LED封装结构的制造方法的步骤S150示意图。
图5C为采用较软的第一萤光粉贴片时的示意图。
图6A和图6B为本发明LED封装结构的制造方法的步骤S160示意图。
图6C为图6A的分解示意图(省略封装胶)。
图7A为本发明LED封装结构的金属导线为反打时的示意图。
图7B为本发明LED封装结构的金属导线为另一打线型式(square loop)时的示意图。
图8为本发明LED封装结构的制造方法的步骤S230示意图。
图9为本发明LED封装结构的制造方法的步骤S240示意图。
图10A为本发明LED封装结构的制造方法的步骤S250示意图。
图10B为采用较软的第一与第二萤光粉贴片时的示意图。
其中,附图标记说明如下:
100LED封装结构
1基座
11反射壳体
12a、12b导电架
13容置空间
2LED芯片
21顶面
22底面
23环侧面
24芯片电极
3金属导线
31顶点
4胶材
5第一萤光粉贴片
51贴合部
52翘曲部
6第二萤光粉贴片
61贴合部
62翘曲部
7封装胶
T1第一萤光粉贴片的厚度
T2第一萤光粉贴片与第二萤光粉贴片的总厚度
H线弧高度
具体实施方式
[第一实施例]
请参阅图1A至图7B,其为本发明的第一实施例,需先说明的是,本实施例对应附图所提及的相关数量与外型,仅用以具体地说明本发明的实施方式,以便于了解其内容,而非用以局限本发明的权利范围。
本实施例提供一种LED封装结构的制造方法,主要包括步骤S110至步骤S160,为便于说明,以下将依循各步骤所对应的示意图作一介绍。
步骤S110:如图1A和图1B所示,提供一基座1;其中,上述基座1的外型于本实施例的附图中是以碗状构造为例,亦即,基座1具有一反射壳体11及部分埋设于反射壳体11内且为间隔设置的两导电架12a、12b,并且上述两导电架12a、12b为尺寸相异的两板体,所述反射壳体11与两导电架12a、12b包围界定有一容置空间13,而上述两导电架12a、12b各有部分为上述容置空间13的底部,其中该两导电架12a、12b为四方无引脚(QFN,Quad flat nolead)形式的导电架,尺寸较大的导电架12a所占容置空间13底部的比例大于50%,该两导电架12a、12b各有两个贯穿孔,让反射壳体11可稳固的设置在两导电架12a、12b上,但本实施例的基座1并不以附图所呈现的构造为限。
接着,设置至少一LED芯片2于上述基座1上;其中,所述LED芯片2包含有一顶面21、一底面22、及位于上述顶面21与底面之间的一环侧面23。此实施例采用的是水平式的LED芯片2,因此上述LED芯片2的顶面21设有间隔设置的两芯片电极24,而LED芯片2的底面22则固定于上述基座1的其中一导电架12a上且位于容置空间13内。
其后,以两金属导线3电性连接基座1的两导电架12a、12b以及LED芯片2的两芯片电极24;其中,所述两金属导线3的一端分别连接于上述LED芯片2的两芯片电极24,而两金属导线3的另一端则分别连接于基座1的两导电架12a、12b上,以使LED芯片2能经由上述两金属导线3而电性连接于基座1的两导电架12a、12b。
再者,每一金属导线3大致呈拋物线状,并且任一金属导线3的拋物线弯曲处具有一顶点31。每个顶点31相对于容置空间13底部的距离大于LED芯片2顶面21相对于容置空间13底部的距离(即LED芯片2的厚度),并且每个顶点31相对于LED芯片2顶面21的距离定义为一线弧高度H(loop height)。本实施例中线弧高度H大于6密耳(mil)。
此外,本实施例中的LED芯片2是以水平式芯片为例,但不排除使用垂直式芯片。具体而言,当使用垂直式的LED芯片(图略)时,LED芯片的顶面与底面各设有一个芯片电极,将LED芯片设置于容置空间内中,且LED芯片底面上的芯片电极连接于其中一导电架,而LED芯片顶面上的芯片电极则是通过一金属导线而电性连接于另一导电架。
步骤S120:如图2所示,将一胶材4设在LED芯片2顶面21,上述胶材4于本实施例中是以点胶方式设在LED芯片2顶面21,并且胶材4大致涂布在LED芯片2的中心处,但不以此为限。其中,所述胶材4的要求为其黏度小于10000厘泊(cP),并且胶材4对于发光波长532纳米(nm)的光折射率为1.54,而该胶材4于本实施例中是以一低黏度的苯基硅氧烷树脂(Phenylsiloxane resin)为例。胶材4于LED芯片2上的涂布厚度约略为100微米,因此也可得知胶材4用量大约为LED芯片2表面积乘上涂布厚度。
步骤S130:如图3A至图3C所示,选用厚度T1小于上述线弧高度H的一第一萤光粉贴片(Phosphor sheet)5,将第一萤光粉贴片5平躺地设置于两金属导线3的顶点31上。其中,上述第一萤光粉贴片5是由第一萤光粉(未标示)以及加热可软化的半固化状态(B-stage)的一树脂(未标示)所混合而成。再者,半固化状态的树脂黏度小于10000厘泊(cP),并且树脂对于发光波长532nm的光折射率为1.56,而所述半固化状态的树脂于本实施例中为一低黏度的苯基硅氧烷树脂(Phenylsiloxane resin)。
须说明的是,本实施例中所选用的第一萤光粉贴片5无需因应LED芯片2的芯片电极24位置而形成有任何开孔。所述第一萤光粉贴片5的面积较佳为大于LED芯片2的顶面21和环侧面23的总面积,并且当第一萤光粉贴片5平躺地设置于两金属导线3的顶点31上时,LED芯片2完全位于第一萤光粉贴片5朝容置空间13底部正投影的区域内。而呈拋物线状的两金属导线3的结构强度,需足以支撑第一萤光粉贴片5而不改变其拋物线外型。
为了清楚说明步骤S140,定义第一萤光粉贴片5下压后的贴合状态为一折弯状态,并说明如下。所述第一萤光粉贴片5定义有一位于第一萤光粉贴片5中央的贴合部51及位在上述贴合部51外侧的一翘曲部52,上述贴合部51大致位于LED芯片2顶面21部位正上方,亦即,所述胶材4位于贴合部51的下方,而上述翘曲部52即为贴合部51以外的第一萤光粉贴片5部位。
步骤S140:如图4A和图4B所示,施压于第一萤光粉贴片5的贴合部51,使贴合部51朝向LED芯片2的顶面21部位移动,进而令贴合部51黏贴于该LED芯片2的顶面21部位且位于上述两芯片电极24之间,而翘曲部52则于上述移动的过程中,压抵于上述两金属导线3并相对于贴合部51产生弯折。此时,所述胶材4受到第一萤光粉贴片5的贴合部51挤压,而向外依序沿着LED芯片2的顶面21与环侧面23流动,使胶材4呈现层状并包覆LED芯片2的顶面21和环侧面23。当胶材4的用量比较多时,胶材4会进一步流动至LED芯片2底部周围甚至是基座1容置空间13的底部部位,如图4B所示。值得一提的是,层状的胶材4的厚度于本实施例中小于1厘米(mm)。
其中,呈拋物线状的两金属导线3的结构强度,需足以在翘曲部54移动的过程中,迫使翘曲部54弯折而不改变其拋物线外型。再者,当贴合部51压抵于上述两芯片电极24之间的顶面21部位时,除通过贴合部51本身树脂的黏性而贴合于上述顶面21部位之外,还能通过胶材4使贴合部51与上述顶面21部位更为牢固地贴合。
步骤S150:如图5A和图5B所示,实施一烘烤步骤,对第一萤光粉贴片5进行加热烘烤(如:在50~80度C的烘烤环境下),使第一萤光粉贴片5软化并沿着LED芯片2的顶面21与环侧面23流动,及/或流动至基座1的容置空间13底部上,以使软化状的第一萤光粉贴片5大致完整地覆盖LED芯片2的顶面21与环侧面23,及/或覆盖LED芯片2底部周围及容置空间13底部部位(如图5B所示),进而固化包覆LED芯片2。
另外,选用不同软硬度的萤光粉贴片贴合在LED芯片2时,会有不同的外轮廓。如图5B所示,当选用一较硬的第一萤光粉贴片5贴合在LED芯片2时,第一萤光粉贴片5会顺着LED芯片2的轮廓贴合,并且其外表面大致呈阶梯状,借以如同一盖体般,盖住LED芯片2。如图5C所示,当选用一较软的第一萤光粉贴片5时,第一萤光粉贴片5在烘烤后会摊流,并且其外表面呈弧面状,并形成一半球状的包覆体,包覆LED芯片2。如前面所提及,第一萤光粉贴片5是由萤光粉和一半固化状态的树脂混和而成,因此可通过改变树脂的成分,来得到不同软硬度的萤光粉贴片。
其中,软化状的第一萤光粉贴片5在贴合的过程中,会顺着LED芯片2的外表面进行流动,使得金属导线3的顶点31裸露在第一萤光粉贴片5之外。另,由于当金属导线3所形成的拋物线状相较于LED芯片2顶面21为较陡峭的方式(即图5A所示的金属导线3为正打,Qloop)时,软化状的萤光粉贴片5的流动会受到金属导线3的阻碍而影响,因而通过所述胶材4的选用,其黏度小于10000厘泊以助于软化状的第一萤光粉贴片5摊流,进而能够均匀且完整包覆LED芯片2的顶面21、两芯片电极24、及环侧面23。定义第一萤光粉贴片5烘烤后的贴合状态为包覆状态,在包覆状态时,所述第一萤光粉贴片5的顶缘相对于容置空间13底部的距离是小于每个顶点31相对于容置空间13底部的距离,亦即,每个金属导线3的顶点31裸露在第一萤光粉贴片5外。
步骤S160:如图6A和图6B所示,设置一封装胶7于基座1的容置空间13内,以包覆LED芯片2、金属导线3、及第一萤光粉贴片5,进而完成一LED封装结构100。须说明的是,于本实施例的LED封装结构100中,LED芯片2可发出蓝光,而第一萤光粉贴片5发出黄光,据此LED芯片2所发出的蓝光经由第一萤光粉贴片5之后,即可产生白光。
此外,本实施例是以上述步骤S110~S160为例作一说明,但于实际实施时,步骤S110~S160可依不同要求而加以调整。举例如下:
如图7A所示,当金属导线3所形成的拋物线状相较于LED芯片2顶面21为较平缓的方式(即图7A所示的金属导线3为反打,reverse loop)时,软化状的第一萤光粉贴片5的流动较不会受到金属导线3的影响,故可无需涂布胶材4,因而在步骤S140中,第一萤光粉贴片5的贴合部51将通过本身树脂的黏性而贴合于LED芯片2顶面21,据此即可省略步骤S120。其中,反打方式的金属导线3的线弧高度H定义为金属导线3的顶点31与容置空间13底部(即金属导线3相连于基座1处)的距离,并且该线弧高度H于本实施例中小于6mil。再者,所述金属导线3也可采用如图7B所示的打线型式(square loop)。而上述图7A与图7B中所示的金属导线3的顶点31皆非位于LED芯片2的正上方,而是位于导电架12b的正上方,因此,当第一萤光粉贴片5在折弯状态时,不会碰触到金属导线3的顶点31。
或者,在选用合适的第一萤光粉贴片5之后,可直接施压于第一萤光粉贴片5的贴合部51,使贴合部51黏贴于LED芯片2的顶面21部位,借以省略将上述第一萤光粉贴片5平躺地设置于两金属导线3顶点31上的实施过程。
以上即为本实施例LED封装结构的制造方法的相关说明,以下将接着针对经由上述LED封装结构的制造方法所制成的LED封装结构100作一概述。
请参阅图6A至图6C所示,其为一种LED封装结构100,包含有一基座1、设置于上述基座1上的一LED芯片2、电性连接基座1与LED芯片2的至少一金属导线3、包覆LED芯片2的一第一萤光粉贴片5、位于LED芯片2与第一萤光粉贴片5之间的一胶材4、及一封装胶7。
其中,上述基座1的外型于本实施例的附图中是以碗状构造为例,亦即,基座1具有一反射壳体11及部分埋设于反射壳体11内且为间隔设置的两导电架12a、12b,并且上述反射壳体11与两导电架12a、12b包围界定有一容置空间13,而上述两导电架12a、12b各有部分为上述容置空间13的底部,但本实施例的基座1并不以附图所呈现的构造为限。
所述LED芯片2包含有一顶面21、一底面22、及位于上述顶面21与底面之间的一环侧面23。此实施例采用的是水平式的LED芯片2,因此上述LED芯片2的顶面21设有间隔设置的两芯片电极24,而LED芯片2的底面22则固定于上述基座1的其中一导电架12a上且位于容置空间13内。此外,本实施例中的LED芯片2是以水平式芯片为例,但不排除使用垂直式芯片。具体而言,当使用垂直式的LED芯片(图略)时,LED芯片的顶面与底面各设有一个芯片电极,将LED芯片设置于容置空间内中,且LED芯片底面上的芯片电极连接于其中一导电架,而LED芯片顶面上的芯片电极则是通过一金属导线而电性连接于另一导电架。
所述两金属导线3的一端分别电性连接于两芯片电极24,另一端则电性连接于基座1的两导电架12a、12b上。再者,每一金属导线3大致呈拋物线状,而每个金属导线3的拋物线弯曲处具有一顶点31。每个顶点31相对于容置空间13底部的距离大于LED芯片2顶面21相对于容置空间13底部的距离(即LED芯片2的厚度),并且每个顶点31相对于LED芯片2顶面21的距离定义为一线弧高度H(loop height)。本实施例中线弧高度H大于6密耳(mil)。
所述第一萤光粉贴片5是由第一萤光粉(未标示)以及加热可软化的半固化状态(B-stage)的一树脂(未标示)所混合而成。再者,半固化状态的树脂52具有黏着性且其黏度小于10000厘泊(cP),并且树脂对于发光波长532nm的光折射率为1.56,而所述半固化状态的树脂于本实施例中为一低黏度的苯基硅氧烷树脂(Phenylsiloxane resin)。所述第一萤光粉贴片5完整地包覆于LED芯片2的顶面21、两芯片电极24、LED芯片2的环侧面、及/或LED芯片2周围的容置空间13底部部位。在包覆状态时,而每个金属导线3的顶点31裸露在第一萤光粉贴片5外。
所述胶材4的要求为其黏度小于10000厘泊(cP),并且胶材4对于发光波长532纳米(nm)的光折射率为1.54,而该胶材4于本实施例中是以一低黏度的苯基硅氧烷树脂(Phenylsiloxane resin)为例。再者,所述胶材4是位于LED芯片2与第一萤光粉贴片5之间,借以通过胶材4使LED芯片2与上述第一萤光粉贴片5更为牢固地贴合。换言之,在LED芯片2与上述第一萤光粉贴片5能够牢固贴合的前提下,胶材4也可省略。
可通过点胶(dispensing)或模制成型(molding)方式将所述封装胶7设置于基座1的容置空间13内,并且包覆LED芯片2、金属导线3、及第一萤光粉贴片5。
[第二实施例]
请参阅图8至图10,其为本发明的第二实施例,本实施例与第一实施例类似,两者相同之处则不再复述(如:本实施例的步骤S210、S220、S260分别相同于第一实施例的步骤S110、S120、S160),而两实施例的差异主要在于,本实施例增加一第二萤光粉贴片6。为便于说明两实施例的差异,本实施例的附图是以剖视图呈现,具体差异说明如下所载:
步骤S230:如图8所示,选用厚度总和T2小于上述线弧高度H的第一萤光粉贴片5及第二萤光粉贴片6,将第二萤光粉贴片6贴合在第一萤光粉贴片5上,并将第一萤光粉贴片5及第二萤光粉贴片6堆叠且平躺地设置于两金属导线3的顶点31上。其中,上述第二萤光粉贴片6是由第二萤光粉(未标示)以及加热可软化的半固化状态(B-stage)的一树脂(未标示)所混合而成,第一萤光粉贴片5和第二萤光粉贴片6具有不同的物理特性,例如,第一萤光粉贴片5和第二萤光粉贴片6具有不同的发光特性。简单来说,上述第一萤光粉贴片5与第二萤光粉贴片6内较佳为不同厚度、不同浓度或不同材料的萤光粉,但不以上述为限。再者,第二萤光粉贴片6的树脂大致与第一萤光粉贴片5的树脂相同,在此不加以赘述。
须说明的是,本实施例中所选用的第二萤光粉贴片6同样无需因应LED芯片2的芯片电极24位置而形成有任何开孔。所述第二萤光粉贴片6的面积较佳为大于LED芯片2的顶面21和环侧面23的总面积,并且当第一萤光粉贴片5与第二萤光粉贴片6平躺地设置于两金属导线3的顶点31上时,LED芯片2完全位于上述第一萤光粉贴片5与第二萤光粉贴片6朝容置空间13底部正投影的区域内。而呈拋物线状的两金属导线3的结构强度,需足以支撑第一萤光粉贴片5与第二萤光粉贴片6而不改变其拋物线外型。
再者,在折弯状态时,所述第二萤光粉贴片6定义有一贴合部61及位在上述贴合部61外侧的一翘曲部62(请参考图9),上述贴合部61大致位于LED芯片顶面21部位正上方且位于上述芯片电极24之间,亦即,所述胶材4是位在贴合部61的下方,而翘曲部61即为贴合部61以外的第二萤光粉贴片6部位。
步骤S240:如图9所示,施压于位在上方的第二萤光粉贴片6的贴合部61,使两贴合部51、61皆朝向上述两芯片电极24之间的顶面21部位移动,进而令位在下方的贴合部51黏贴于LED芯片2的顶面21部位,而所述两翘曲部52、62则于上述移动的过程中,压抵于上述两金属导线3并相对于贴合部51、61产生弯折。此时,所述胶材4受到第一萤光粉贴片5的贴合部51挤压,而向外依序沿着LED芯片2的顶面21与环侧面23流动,甚至是流动至基座1的容置空间13底部上。
其中,呈拋物线状的两金属导线3的结构强度,需足以在翘曲部52、62移动的过程中,迫使翘曲部52、62弯折而不改变其拋物线外型。再者,当第一萤光粉贴片5的贴合部51压抵于上述LED芯片2上方的两芯片电极24之间的顶面21部位时,除通过贴合部53本身的黏性而贴合于上述顶面21部位之外,还能通过胶材4使贴合部51与上述顶面21部位更为牢固地贴合。
步骤S250:如图10A所示,实施一烘烤步骤,对第一萤光粉贴片5与第二萤光粉贴片6进行加热烘烤(如:在50~80度C的烘烤环境下),使第一萤光粉贴片5与第二萤光粉贴片6软化并沿着LED芯片2的顶面21与环侧面23流动至基座1的容置空间13底部上,以使软化状的第一萤光粉贴片5与第二萤光粉贴片6大致完整地覆盖LED芯片2的顶面21、该两芯片电极24和环侧面23,甚至流到LED芯片2周围的容置空间13底部部位,进而固化包覆LED芯片2。进一步地说,上述第一萤光粉贴片5内的第一萤光粉大致分布在第二萤光粉贴片6的第二萤光粉的内侧。
其中,软化状的第一萤光粉贴片5与第二萤光粉贴片6在流动的过程中,并不会使任何金属导线3的顶点31附着有任何萤光粉,换句话说,在包覆状态时,所述第一萤光粉贴片5的顶缘相对于容置空间13底部的距离是小于每个顶点31相对于容置空间13底部的距离,亦即,每个金属导线3的顶点31裸露在第一萤光粉贴片5外。另,由于当金属导线3所形成的拋物线状相较于LED芯片2顶面21为较陡峭的方式(即金属导线3为正打,Q loop)时,软化状的第一萤光粉贴片5与第二萤光粉贴片6的流动会受到金属导线3的阻碍而影响,因而通过所述胶材4以助于软化状的第一萤光粉贴片5与第二萤光粉贴片6摊流,进而能够均匀且完整包覆LED芯片2的顶面21、两芯片电极24、及环侧面23。再者,在包覆状态时,所述第二萤光粉贴片6的顶缘相对于容置空间13底部的距离是小于每个顶点31相对于容置空间13底部的距离,亦即,每个金属导线3的顶点31裸露在第一萤光粉贴片5和第二萤光粉贴片6外。
另外,选用不同软硬度的萤光粉贴片贴合在LED芯片2时,会有不同的外轮廓。如图10A所示,当选用较硬的第一与第二萤光粉贴片5、6时,第一与第二萤光粉贴片5、6会顺着LED芯片2的轮廓贴合,并且其外表面大致呈阶梯状。如图10B所示,当选用较软的第一与第二萤光粉贴片5、6时,第一与第二萤光粉贴片5、6在烘烤后会摊流,并且其外表面形成弧面状。如前面所提及,第一与第二萤光粉贴片5、6各是由萤光粉和一半固化状态的树脂混和而成,因此可通过改变树脂的成分,来得到不同软硬度的萤光粉贴片。值得注意的是,当第一、第二萤光粉贴片5、6的厚度与金属导线3的顶点31高度接近时,第一、第二萤光粉贴片5、6中的树脂(混着萤光粉)可能因毛细现象而攀爬至金属导线3的顶点31,使得金属导线3的顶点31附着有萤光粉,但金属导线3的顶点31实质上裸露在第一、第二萤光粉贴片5、6外。
须说明的是,第一萤光粉贴片5是由黄色萤光粉搭配半固化状态树脂混合而成,因此第一萤光粉贴片6可发出黄光。第二萤光粉贴片6是由红色萤光粉搭配半固化状态树脂混合而成,因此第二萤光粉贴片6可发出红光,借以使LED芯片2所发出的蓝光经由第一萤光粉贴片5与第二萤光粉贴片6之后,可得到高演色性(high CRI)的LED封装结构。
以上即为本实施例LED封装结构的制造方法的相关说明,以下将接着针对经由上述LED封装结构的制造方法所制成的LED封装结构100作一概述。其中,由于本实施例的LED封装结构100类似于第一实施例的LED封装结构100,故两者的相同之处则不再复述,而两者差异主要在于:请参阅图8所示,所述第一萤光粉贴片5内的第一萤光粉大致分布在第二萤光粉贴片6的第二萤光粉的内侧。
[本发明的可能效果]
综上所述,本发明的LED芯片的环侧面与芯片电极皆被第一萤光粉贴片所覆盖,因而不会漏光,以避免造成色均匀性不佳。并且,本发明所采用的第一萤光粉贴片(及第二萤光粉贴片)为半固态状且无须额外形成有开孔,使其相较于常用萤光粉贴片来得更容易制作。
再者,本发明的基座适于采用碗状的构造,并且本发明可应用于打线后的水平式LED芯片,也可应用于垂直式LED芯片。由于本发明的萤光粉层是采用萤光粉贴片,使得本发明具有萤光粉利用率高的效果,同时更无萤光粉沉淀问题,据此,搭配贴合前的萤光粉贴片CIE分测量机制,可提升CIE集中度小于1个SCDM。
另,本发明在LED封装结构的制造过程中,也可通过选用具备不同特性萤光粉的多个萤光粉贴片,来进一步控制LED封装结构的色温。
以上所述仅为本发明的较佳可行实施例,其并非用以局限本发明的专利范围,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。

Claims (13)

1.一种LED封装结构的制造方法,其特征在于,步骤包括:
提供一基座;
设置一LED芯片于该基座上,且该LED芯片的顶面具有至少一芯片电极;
以至少一金属导线电性连接该基座与该LED芯片上的该至少一芯片电极,其中,该至少一金属导线包含有一顶点,并且该至少一金属导线依据该顶点定义有一线弧高度;
提供一第一萤光粉贴片,其由一第一萤光粉和一半固化状态(B-stage)的树脂混合而成,该树脂具有黏着性;
以该第一萤光粉贴片的该树脂来贴合在该LED芯片,其中,该第一萤光粉贴片包覆于该LED芯片的顶面、环侧面及该至少一芯片电极,该第一萤光粉贴片的厚度小于该线弧高度,并且该至少一金属导线的顶点裸露在该第一萤光粉贴片外;以及
设置一封装胶于该基座内,以包覆该LED芯片、该至少一金属导线及该第一萤光粉贴片。
2.如权利要求1所述的LED封装结构的制造方法,其中,在以该第一萤光粉贴片的该树脂来贴合在该LED芯片的步骤之中,进一步包含:施压于该第一萤光粉贴片,使该第一萤光粉贴片呈一折弯状态,该折弯状态为该第一萤光粉贴片受压迫的部位贴合于该LED芯片,以令部分的该第一萤光粉贴片压抵于该至少一金属导线而产生弯折。
3.如权利要求2所述的LED封装结构的制造方法,其中,在以该第一萤光粉贴片的该树脂来贴合在该LED芯片的步骤之后,实施一烘烤步骤,对该第一萤光粉贴片进行加热烘烤,使呈该折弯状态的该第一萤光粉贴片软化以覆盖该LED芯片的顶面、环侧面及该至少一芯片电极。
4.如权利要求1所述的LED封装结构的制造方法,其中,在以该第一萤光粉贴片的该树脂来贴合在该LED芯片的步骤之后,实施一烘烤步骤,对该第一萤光粉贴片进行加热烘烤,使该第一萤光粉贴片软化以覆盖该LED芯片的顶面、环侧面、该至少一芯片电极及该LED芯片底部周围的该基座部位。
5.如权利要求2所述的LED封装结构的制造方法,其中,在进行施压于该第一萤光粉贴片的步骤之前,先将一胶材设在该LED芯片上,通过该胶材贴合该第一萤光粉贴片于该LED芯片上。
6.如权利要求2所述的LED封装结构的制造方法,其中,在进行施压于该第一萤光粉贴片的步骤之前,先设置该第一萤光粉贴片于该至少一金属导线上,并且使该LED芯片完全位于该第一萤光粉贴片朝该基座正投影的区域内。
7.如权利要求1所述的LED封装结构的制造方法,其中,该第一萤光粉贴片对应于该至少一芯片电极的位置未形成有任何开孔。
8.如权利要求1所述的LED封装结构的制造方法,其中,在以该第一萤光粉贴片的该树脂来贴合在该LED芯片的步骤之前,进一步包含将一第二萤光粉贴片堆叠于该第一萤光粉贴片上;在以该第一萤光粉贴片的该树脂来贴合在该LED芯片的步骤之中,进一步包含:施压于该第二萤光粉贴片,使该第一萤光粉贴片受压迫的部位贴合于该LED芯片,以令压抵于该至少一金属导线的该第一萤光粉贴片与相对应的该第二萤光粉贴片部位产生弯折。
9.一种LED封装结构,其特征在于,包括:
一基座;
一LED芯片,具有一顶面、一底面、及位于该顶面与该底面之间的一环侧面,该LED芯片的底面设置于该基座上,而该LED芯片的顶面设有至少一芯片电极;
至少一金属导线,具有一顶点,该至少一金属导线的两端分别电性连接于该至少一芯片电极与该基座,并且该至少一金属导线依据该顶点定义有一线弧高度;
一第一萤光粉贴片,由一萤光粉和一半固化状态的树脂混合而成,该树脂具有黏着性,该第一萤光粉贴片通过该树脂以贴合在该LED芯片上,该第一萤光粉贴片包覆于该LED芯片的顶面、环侧面及芯片电极,并且该第一萤光粉贴片的厚度小于该线弧高度,该至少一金属导线的该顶点裸露在该第一萤光粉贴片外;以及
一封装胶,设置于该基座内,以包覆该LED芯片、该至少一金属导线及该第一萤光粉贴片。
10.如权利要求9所述的LED封装结构,其中,该至少一金属导线以反打方式连接该至少一芯片电极与该基座,该线弧高度定义为该顶点与该至少一金属导线相连于该基座处的距离,该线弧高度小于6密耳,该第一萤光粉贴片通过该树脂以贴合在该LED芯片上。
11.如权利要求9所述的LED封装结构,其中,该至少一金属导线以正打方式连接该至少一芯片电极和该基座,该线弧高度定义为该顶点与该LED芯片的顶面的距离,该线弧高度大于6mil,该LED封装结构进一步包含一胶材,该第一萤光粉贴片通过该树脂和该胶材以贴合在该LED芯片上。
12.如权利要求11所述的LED封装结构,其中,该胶材或该树脂为一低黏度的苯基硅氧烷树脂,并且该胶材的黏度小于10000厘泊。
13.如权利要求9所述的LED封装结构,其进一步包含一第二萤光粉贴片,该第二萤光粉贴片贴合在该第一萤光粉贴片上,该第一萤光粉贴片和该第二萤光粉贴片具有不同的发光特性,且该第一萤光粉贴片和该第二萤光粉贴片的厚度总和小于该线弧高度,该至少一金属导线的该顶点裸露在该第一萤光粉贴片和该第二萤光粉贴片外。
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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10153412B2 (en) * 2016-08-11 2018-12-11 Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan, R.O.C. Package structure for ultraviolet light-emitting diode
CN107466171A (zh) * 2017-07-25 2017-12-12 沈雪芳 柔性印刷电路板、加工工艺及灯带
TWI713237B (zh) * 2018-08-01 2020-12-11 大陸商光寶光電(常州)有限公司 發光二極體封裝結構
CN109817796B (zh) * 2019-01-24 2021-07-23 南通沃特光电科技有限公司 一种具有双层荧光层的led封装结构及其封装方法
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200703710A (en) * 2005-07-01 2007-01-16 Lamina Ceramics Inc Illumination devices comprising white light emitting diodes and diode arrays and method and apparatus for making them
CN101193983A (zh) * 2005-06-14 2008-06-04 电气化学工业株式会社 含有荧光体的树脂组合物及片材,以及使用其的发光元件
CN101551068A (zh) * 2009-04-30 2009-10-07 旭丽电子(广州)有限公司 一种发光二极管装置及其封装方法
EP2469614A2 (en) * 2010-12-24 2012-06-27 Samsung LED Co., Ltd. Light emitting device package and method of manufacturing the same
CN103531688A (zh) * 2012-06-29 2014-01-22 日东电工株式会社 覆有反射层-荧光体层的led、其制造方法、led装置及其制造方法
WO2014195819A1 (en) * 2013-06-06 2014-12-11 Koninklijke Philips N.V. Light emitting diode laminated with a phosphor sheet and manufacturing method thereof

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7157745B2 (en) * 2004-04-09 2007-01-02 Blonder Greg E Illumination devices comprising white light emitting diodes and diode arrays and method and apparatus for making them
JP4678415B2 (ja) * 2008-03-18 2011-04-27 信越化学工業株式会社 光半導体ケース形成用白色熱硬化性シリコーン樹脂組成物並びに光半導体ケース
US8212279B2 (en) * 2008-03-25 2012-07-03 Bridge Semiconductor Corporation Semiconductor chip assembly with post/base heat spreader, signal post and cavity
US20110014732A1 (en) * 2009-07-20 2011-01-20 Lee Je-Hsiang Light-emitting module fabrication method
JP5767062B2 (ja) * 2010-09-30 2015-08-19 日東電工株式会社 発光ダイオード封止材、および、発光ダイオード装置の製造方法
JP2012114284A (ja) * 2010-11-25 2012-06-14 Toshiba Corp Ledモジュール及び照明装置
JP2012227516A (ja) * 2011-04-05 2012-11-15 Nitto Denko Corp 封止シート、発光ダイオード装置およびその製造方法
TW201246615A (en) * 2011-05-11 2012-11-16 Siliconware Precision Industries Co Ltd Package structure and method of making same
JP2013077811A (ja) * 2011-09-14 2013-04-25 Nitto Denko Corp 封止シート、その製造方法、発光ダイオード装置およびその製造方法
KR101905535B1 (ko) * 2011-11-16 2018-10-10 엘지이노텍 주식회사 발광 소자 패키지 및 이를 구비한 조명 장치
JP2013135084A (ja) * 2011-12-26 2013-07-08 Nitto Denko Corp 発光ダイオード装置の製造方法
JP2013214716A (ja) * 2012-03-06 2013-10-17 Nitto Denko Corp 蛍光封止シート、発光ダイオード装置およびその製造方法
JP2014072351A (ja) * 2012-09-28 2014-04-21 Nitto Denko Corp 蛍光体層貼着キット、光半導体素子−蛍光体層貼着体および光半導体装置
KR102063531B1 (ko) * 2013-06-13 2020-02-11 엘지이노텍 주식회사 발광모듈 및 이를 구비한 발광 장치

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101193983A (zh) * 2005-06-14 2008-06-04 电气化学工业株式会社 含有荧光体的树脂组合物及片材,以及使用其的发光元件
TW200703710A (en) * 2005-07-01 2007-01-16 Lamina Ceramics Inc Illumination devices comprising white light emitting diodes and diode arrays and method and apparatus for making them
CN101551068A (zh) * 2009-04-30 2009-10-07 旭丽电子(广州)有限公司 一种发光二极管装置及其封装方法
EP2469614A2 (en) * 2010-12-24 2012-06-27 Samsung LED Co., Ltd. Light emitting device package and method of manufacturing the same
CN103531688A (zh) * 2012-06-29 2014-01-22 日东电工株式会社 覆有反射层-荧光体层的led、其制造方法、led装置及其制造方法
WO2014195819A1 (en) * 2013-06-06 2014-12-11 Koninklijke Philips N.V. Light emitting diode laminated with a phosphor sheet and manufacturing method thereof

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