CN105448899A - 半导体封装件及其制法 - Google Patents
半导体封装件及其制法 Download PDFInfo
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- CN105448899A CN105448899A CN201410552457.3A CN201410552457A CN105448899A CN 105448899 A CN105448899 A CN 105448899A CN 201410552457 A CN201410552457 A CN 201410552457A CN 105448899 A CN105448899 A CN 105448899A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 103
- 238000000034 method Methods 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 229910052751 metal Inorganic materials 0.000 claims abstract description 58
- 239000002184 metal Substances 0.000 claims abstract description 58
- 239000000084 colloidal system Substances 0.000 claims abstract description 52
- 238000004806 packaging method and process Methods 0.000 claims abstract description 21
- 238000012856 packing Methods 0.000 claims description 49
- 238000005538 encapsulation Methods 0.000 claims description 31
- 239000000463 material Substances 0.000 claims description 26
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 11
- 238000009417 prefabrication Methods 0.000 claims description 11
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 9
- 239000010949 copper Substances 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000012774 insulation material Substances 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910052742 iron Inorganic materials 0.000 claims description 4
- 238000000926 separation method Methods 0.000 claims description 4
- 230000000694 effects Effects 0.000 abstract description 6
- 238000002955 isolation Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 208000032365 Electromagnetic interference Diseases 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
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Abstract
一种半导体封装件及其制法,该封装件包括:表面具有多个半导体元件的基板、覆盖于该基板与各该半导体元件上的封装胶体、以及形成于该封装胶体的外露表面上的金属层,该封装胶体具有第一沟槽以划分多个封装单元,令每一个封装单元具有一个半导体元件,且该金属层沿该第一沟槽的壁面布设,以于对应该第一沟槽处形成具有金属表面的第二沟槽,使每一封装单元之间形成多层隔离结构,如金属层与空气层,藉以提升各该封装单元间的屏蔽效果。
Description
技术领域
本发明有关一种半导体封装件,尤指一种具防止内部电子元件相互电磁波干扰的半导体封装件及其制法。
背景技术
随着半导体技术的演进,半导体产品已开发出不同封装产品型态,而为提升电性品质,多种半导体产品具有屏蔽的功能,以防止电磁干扰(ElectromagneticInterference,简称EMI)产生。
如图1A及图1B所示,现有射频模组1将多个半导体元件11a,11b电性连接在一基板10上,再以如环氧树脂的封装胶体12包覆各该半导体元件11a,11b及基板10,并于该封装胶体12上罩设一金属薄膜13。该射频模组1藉由该封装胶体12保护该半导体元件11a,11b及基板10,并避免外界水气或污染物的侵害,且藉由该金属薄膜13保护该些半导体元件11a,11b免受外界EMI影响。
如图2所示,另一现有射频模组2于外围包覆有屏障层23,以避免该射频模组2与其他模组产生相互电磁干扰。
惟,现有射频模组1,2的外围虽可藉由包覆金属材以达到避免EMI的目的,但却无法避免其内部各该半导体元件11a,11b之间的电磁波干扰(EMI),导致讯号容易发生错误。
因此,如何克服上述现有技术的问题,实已成为目前业界亟待克服的难题。
发明内容
鉴于上述现有技术的种种缺失,本发明提供一种半导体封装件及其制法,以提升各该封装单元间的屏蔽效果。
本发明的半导体封装件,包括:基板,其具有相对的第一表面及第二表面;多个半导体元件,其设置且电性连接于该基板的第一表面上;封装胶体,其覆盖于该基板的第一表面与各该半导体元件上,且该封装胶体具有至少一第一沟槽,以于该基板上划分多个封装单元,令每一个该封装单元具有至少一个该半导体元件;以及金属层,其形成于该基板与封装胶体上并包覆各该封装单元的周围,且令该基板的第二表面外露该金属层,其中,该金属层沿该第一沟槽的壁面布设,以于对应该第一沟槽处形成具有金属表面的第二沟槽。
本发明还提供一种半导体封装件的制法,包括:设置多个半导体元件于承载件上;形成该封装胶体于该承载件上以包覆各该半导体元件;切割该封装胶体及该承载件,以形成多个分离的该封装件预制品,该封装件预制品包含:基板,其具有相对的第一表面及第二表面,其中,该基板经切割的该承载件;多个该半导体元件,其设置且电性连接于该基板的第一表面上;及该封装胶体,其覆盖于该基板的第一表面与各该半导体元件上;形成至少一第一沟槽于该封装件预制品的该封装胶体上,以于该基板上划分多个封装单元,令每一个该封装单元具有至少一个该半导体元件;以及形成金属层于该基板与该封装胶体上并包覆各该封装单元的周围,且令该基板的第二表面外露该金属层,其中,该金属层沿该第一沟槽的壁面布设,以于对应该第一沟槽处形成具有金属表面的第二沟槽。
前述的制法中,形成该第一沟槽的方式可为激光或机械切割。
前述的半导体封装件及其制法中,该半导体封装件为射频模组。
前述的半导体封装件及其制法中,该半导体元件为射频晶片。例如,该射频晶片为蓝牙晶片或Wi-Fi晶片。
前述的半导体封装件及其制法中,该封装胶体具有外露的顶面与侧面、及结合至该基板的第一表面的底面,且该第一沟槽贯穿该封装胶体以连通该顶面与该基板的第一表面。例如,该金属层形成于该封装胶体的顶面与侧面上。
前述的半导体封装件及其制法中,该金属层选自铜、镍、铁、铝或不锈钢的材质。
前述的半导体封装件及其制法中,当该封装胶体具有多个该第一沟槽时,该些第一沟槽排列成线形。
前述的半导体封装件及其制法中,该基板具有电性连接于该金属层的接地结构。例如,该接地结构为位于对应该第一沟槽处的接地部,令该金属层与该接地部相导通。
另外,前述的半导体封装件及其制法中,复包括形成填充材于该第二沟槽中,且该填充材为绝缘材或导电材。
由上可知,本发明的半导体封装件及其制法,主要藉由具有金属表面的第二沟槽,使每一封装单元之间形成多层的隔离结构(如金属层与空气层),以提升各该封装单元间的屏蔽效果,所以能避免各该半导体元件之间发生电磁波相互干扰的问题,进而提升通讯效果。
附图说明
图1A及图1B为现有射频模组的示意图,其中,图1A为立体图,图1B为剖面图;
图2为现有堆迭多个模组的封装件的剖面图;
图3A至图3E为本发明半导体封装件的制法的剖面示意图;其中,图3A’及图3E’为图3A及图3E的另一实施例,图3D’为图3D的立体图;
图4A至图4D为本发明的第一沟槽的不同态样的上视示意图;以及
图5A及图5B为本发明的第一沟槽的其它态样的上视示意图。
符号说明
1,2射频模组
10,30基板
11a,11b,31,31’半导体元件
12,32封装胶体
13金属薄膜
23屏障层
3,4半导体封装件
3’,3”封装单元
3a承载件
3b封装件预制品
30a第一表面
30b第二表面
30c侧表面
300电性接触垫
301接地部
310焊线
310’,33导电元件
32a顶面
32b底面
32c侧面
320,520第一沟槽
34金属层
340第二沟槽
35填充材
36接地层
L预定切割线。
具体实施方式
以下藉由特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其他优点及功效。
须知,本说明书所附图式所绘示的结构、比例、大小等,均仅用于配合说明书所揭示的内容,以供本领域技术人员的了解与阅读,并非用于限定本发明可实施的限定条件,所以不具技术上的实质意义,任何结构的修饰、比例关系的改变或大小的调整,在不影响本发明所能产生的功效及所能达成的目的下,均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时,本说明书中所引用的如“上”、“第一”、“第二”、及“一”等的用语,也仅为便于叙述的明了,而非用于限定本发明可实施的范围,其相对关系的改变或调整,在无实质变更技术内容下,当也视为本发明可实施的范畴。
请参阅图3A至图3E,其为本发明半导体封装件的制法的示意图。于本实施例中,所述的半导体封装件3可发出电磁波者,例如为射频(Radiofrequency,RF)模组。
如图3A及图3A’所示,提供一承载件3a,其具有多个基板30(如图中的虚线作区分),且各该基板30具有相对的第一表面30a及第二表面30b;接着,设置多个半导体元件31于该承载件3a上,亦即设置于各该基板30的该第一表面30a上。
所述的基板30的第一表面30a及第二表面30b上均具有多个电性接触垫300。
所述的半导体元件31为射频晶片,例如:蓝牙晶片或Wi-Fi(WirelessFidelity)晶片。
此外,如图3A所示,该些半导体元件31以打线方式(即藉由焊线310)对应电性连接该基板30的电性接触垫300;或如图3A’所示,该些半导体元件31’以覆晶方式(即藉由如焊球或导电凸块的导电元件310’)对应电性连接该些电性接触垫300。
如图3B所示,接续图3A的制程,将封装胶体32覆盖于该承载件3a(或基板30)的第一表面30a、各该半导体元件31及该些焊线310上。
于本实施例中,该封装胶体32具有外露的顶面32a及结合至该第一表面30a的底面32b。
如图3C所示,沿各该基板30边缘的预定切割线L(如图3B所示)切割该封装胶体32及该承载件3a,以形成多个分离的封装件预制品3b。沿着各该基板30边缘的预定切割线L(如图3B所示)切割该封装胶体32及该承载件3a,以形成多个分离的封装件预制品3b。
于本实施例中,该封装件预制品3b包括具有第一表面30a、第二表面30b、及邻接该第一表面30a与该第二表面30b的侧表面30c的基板30、设置于该基板30第一表面30a上的多个半导体元件31、及覆盖于该第一表面30a与各该半导体元件31的封装胶体32,且该封装胶体32经切割而具有侧面32c。
如图3D及图3D’所示,以激光烧灼或机械切割,例如刀具切割方式,形成一第一沟槽320于该封装件预制品3b的封装胶体32上,以于该基板30的第一表面30a上划分多个封装单元3’,3”,令每一个该封装单元3’,3”具有至少一个半导体元件31(也可包括其它无影响电磁波干扰的电子元件),并形成多个如焊球的导电元件33于该基板30的第二表面30b上。
于本实施例中,所述的第一沟槽320贯穿该封装胶体32以连通该封装胶体32的顶面32a与该基板30的部分第一表面30a,且令部分该第一表面30a外露于该第一沟槽320。
此外,该第一沟槽320的切口形状可为多个种态样,如直线形(如图4A所示的短线、或如图4B所示的长线)、直角弯折线形(如图4C所示)、连续波形(如图4D所示)等,但不以此为限。
又,亦可形成多个第一沟槽520,如图5A及图5B所示,且各该第一沟槽520排列成线形,例如不连续直角弯折线形(如图5A所示)及不连续波形(如图5B所示)
另外,其中一封装单元3’中的半导体元件31可为蓝牙晶片,而另一封装单元3”中的半导体元件31可为Wi-Fi晶片,但并不以本实施例为限。
如图3E所示,以如溅镀(sputtering)的化学镀膜、涂布(coating)或回焊(reflow)等方式,形成金属层34于该基板30的侧表面30c、该封装胶体32的顶面32a与侧面32c上,以包覆各该封装单元3’,3”的周围,且令该基板30的第二表面30b外露该金属层34,其中,该金属层34沿该第一沟槽320的壁面布设,以于对应该第一沟槽320处形成具有金属表面的第二沟槽340,俾形成该半导体封装件3。
于本实施例中,各该封装单元3’,3”之间藉由该金属层34与空气层(即该第二沟槽340中的空气)作为多层电磁波屏障(EMIShielding)结构,以防止各该半导体元件31之间相互电磁波干扰。例如,藉由该金属层34与空气层,以防止蓝牙晶片与Wi-Fi晶片之间的讯号相互干扰。
此外,形成该金属层34的材质如铜(Cu)、镍(Ni)、铁(Fe)、铝(Al)、不锈钢(Sus)等。需注意,各该封装单元3’,3”上的金属层34可使用相同金属材或不同的金属材。
又,该基板30具有电性连接于该金属层34的接地结构。例如,该接地结构为位于对应该第一沟槽320处的接地部301,如图3E’所示,令该金属层34与该接地部301相导通,例如该金属层34(即该第二沟槽340底部)与该接地部301相接触;或者,该接地结构为形成于该基板30内的接地层36,且该接地层36电性连接该基板30的侧表面30c上的金属层34,以提升屏蔽效果。
另外,也可形成填充材35于该第二沟槽340中,如图3E’所示,其中,该填充材35为绝缘材或导电材,且该填充材35可填满该第二沟槽340,以令该半导体封装件4的顶面为平整面。具体地,若该填充材35为导电材,该填充材35的导电性低于该金属层34的导电性。因此,藉由该填充材35的设计,使各该封装单元3’,3”之间藉由该金属层34与该填充材35作为多层隔离结构,以提升电磁波相互干扰的阻隔强度。
本发明的制法中,每一封装单元3’,3”之间藉由具有金属表面的第二沟槽340作区隔,使各该封装单元3’,3”之间具有多层隔离结构,以提升各该封装单元3’,3”之间的屏蔽效果,所以能避免各该半导体元件31之间发生电磁波相互干扰的问题。
本发明提供一种半导体封装件3,4,为射频模组,其包括:一基板30、多个半导体元件31,31’、一封装胶体32以及一金属层34。
所述的基板30具有相对的第一表面30a及第二表面30b。
所述的半导体元件31,31’设置且电性连接于该基板30的第一表面30a上。其中,该半导体元件31,31’为射频晶片,例如,该射频晶片为蓝牙晶片或Wi-Fi晶片。
所述的封装胶体32覆盖于该基板30的第一表面30a与各该半导体元件31,31’上,且该封装胶体32具有至少一第一沟槽320,520,以于该基板30上划分多个封装单元3’,3”,令每一个该封装单元3’,3”具有至少一个该半导体元件31,31’。其中,该封装胶体32具有外露的顶面32a与侧面32c、及结合至该基板30的第一表面30a的底面32b,且该第一沟槽320,520贯穿该封装胶体32以连通该顶面32a与该基板30的第一表面30a。
所述的金属层34形成于该基板30的侧面30c与封装胶体32的顶面32a与侧面32c上以包覆各该封装单元3’,3”的周围,且令该基板30的第二表面30b外露该金属层34,其中,该金属层34沿该第一沟槽320,520的壁面布设,以于对应该第一沟槽320,520处形成具有金属表面的第二沟槽340。其中,该金属层34选自铜、镍、铁、铝或不锈钢的材质。
于一实施例中,当该封装胶体32具有多个该第一沟槽520时,该些第一沟槽520排列成线形。
于一实施例中,该基板30具有电性连接于该金属层34的接地结构,如形成于该基板30内的接地层36、或位于对应该第一沟槽320处的接地部301,令该金属层34与该接地部301相导通。
于一实施例中,该半导体封装件4复包括形成于该第二沟槽340中的填充材35,其为绝缘材或导电材。
综上所述,本发明的半导体封装件及其制法,藉由该第二沟槽的设计,使每一封装单元间形成多层隔离结构,以提升各该半导体元件之间电磁波相互干扰的屏蔽强度,进而提升通讯效果。
上述实施例仅用于例示性说明本发明的原理及其功效,而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下,对上述实施例进行修改。因此本发明的权利保护范围,应如权利要求书所列。
Claims (25)
1.一种半导体封装件,包括:
基板,其具有相对的第一表面及第二表面;
多个半导体元件,其设置且电性连接于该基板的第一表面上;
封装胶体,其覆盖于该基板的第一表面与各该半导体元件上,且该封装胶体具有至少一第一沟槽,以于该基板上划分多个封装单元,令每一个该封装单元具有至少一个该半导体元件;以及
金属层,其形成于该基板与封装胶体上并包覆各该封装单元的周围,且该基板的第二表面外露于该金属层,其中,该金属层沿该第一沟槽的壁面布设,以于对应该第一沟槽处形成具有金属表面的第二沟槽。
2.如权利要求1所述的半导体封装件,其特征为,该半导体封装件为射频模组。
3.如权利要求1所述的半导体封装件,其特征为,该半导体元件为射频晶片。
4.如权利要求3所述的半导体封装件,其特征为,该射频晶片为蓝牙晶片或Wi-Fi晶片。
5.如权利要求1所述的半导体封装件,其特征为,该封装胶体具有外露的顶面与侧面、及结合至该基板的第一表面的底面,且该第一沟槽贯穿该封装胶体以连通该顶面与该基板的第一表面。
6.如权利要求5所述的半导体封装件,其特征为,该金属层形成于该封装胶体的顶面与侧面上。
7.如权利要求1所述的半导体封装件,其特征为,该金属层选自铜、镍、铁、铝或不锈钢的材质。
8.如权利要求1所述的半导体封装件,其特征为,当该封装胶体具有多个该第一沟槽时,该些第一沟槽排列成线形。
9.如权利要求1所述的半导体封装件,其特征为,该基板具有电性连接于该金属层的接地结构。
10.如权利要求9所述的半导体封装件,其特征为,该接地结构为位于对应该第一沟槽处的接地部,令该金属层与该接地部相导通。
11.如权利要求1所述的半导体封装件,其特征为,该封装件还包括填充材,其填充于该第二沟槽中。
12.如权利要求11所述的半导体封装件,其特征为,该填充材为绝缘材或导电材。
13.一种半导体封装件的制法,包括:
设置多个半导体元件于承载件上;
形成该封装胶体于该承载件上以包覆各该半导体元件;
切割该封装胶体及该承载件,以形成多个分离的该封装件预制品,该封装件预制品包含:
基板,其具有相对的第一表面及第二表面,其中,该基板经切割的该承载件;
多个该半导体元件,其设置且电性连接于该基板的第一表面上;及
该封装胶体,其覆盖于该基板的第一表面与各该半导体元件上;
形成至少一第一沟槽于该封装件预制品的该封装胶体上,以于该基板上划分多个封装单元,令每一个该封装单元具有至少一个该半导体元件;以及
形成金属层于该基板与该封装胶体上并包覆各该封装单元的周围,且令该基板的第二表面外露该金属层,其中,该金属层沿该第一沟槽的壁面布设,以于对应该第一沟槽处形成具有金属表面的第二沟槽。
14.如权利要求13所述的半导体封装件的制法,其特征为,该半导体封装件为射频模组。
15.如权利要求13所述的半导体封装件的制法,其特征为,该半导体元件为射频晶片。
16.如权利要求15所述的半导体封装件的制法,其特征为,该射频晶片为蓝牙晶片或Wi-Fi晶片。
17.如权利要求13所述的半导体封装件的制法,其特征为,该封装胶体具有外露的顶面与侧面、及结合至该基板的第一表面的底面,且该第一沟槽贯穿该封装胶体以连通该顶面与该基板的第一表面。
18.如权利要求17所述的半导体封装件的制法,其特征为,该金属层形成于该封装胶体的顶面与侧面上。
19.如权利要求13所述的半导体封装件的制法,其特征为,形成该第一沟槽的方式为激光或机械切割。
20.如权利要求13所述的半导体封装件的制法,其特征为,该金属层选自铜、镍、铁、铝或不锈钢的材质。
21.如权利要求13所述的半导体封装件的制法,其特征为,当该封装胶体具有多个该第一沟槽时,该些第一沟槽排列成线形。
22.如权利要求13所述的半导体封装件的制法,其特征为,该基板具有电性连接于该金属层的接地结构。
23.如权利要求22所述的半导体封装件的制法,其特征为,该接地结构为位于对应该第一沟槽处的接地部,令该金属层与该接地部相导通。
24.如权利要求13所述的半导体封装件的制法,其特征为,该制法还包括形成填充材于该第二沟槽中。
25.如权利要求24所述的半导体封装件的制法,其特征为,该填充材为绝缘材或导电材。
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TW103133886A TWI611533B (zh) | 2014-09-30 | 2014-09-30 | 半導體封裝件及其製法 |
TW103133886 | 2014-09-30 |
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TWI634640B (zh) * | 2016-11-24 | 2018-09-01 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
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US20170236787A1 (en) | 2017-08-17 |
US20160093576A1 (en) | 2016-03-31 |
TW201613049A (en) | 2016-04-01 |
US9673151B2 (en) | 2017-06-06 |
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US10074613B2 (en) | 2018-09-11 |
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