CN105321831B - 电子零件封装体的制造方法 - Google Patents
电子零件封装体的制造方法 Download PDFInfo
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- CN105321831B CN105321831B CN201510358148.7A CN201510358148A CN105321831B CN 105321831 B CN105321831 B CN 105321831B CN 201510358148 A CN201510358148 A CN 201510358148A CN 105321831 B CN105321831 B CN 105321831B
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- AFCARXCZXQIEQB-UHFFFAOYSA-N N-[3-oxo-3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)propyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CCNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 AFCARXCZXQIEQB-UHFFFAOYSA-N 0.000 description 3
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- VZSRBBMJRBPUNF-UHFFFAOYSA-N 2-(2,3-dihydro-1H-inden-2-ylamino)-N-[3-oxo-3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)propyl]pyrimidine-5-carboxamide Chemical compound C1C(CC2=CC=CC=C12)NC1=NC=C(C=N1)C(=O)NCCC(N1CC2=C(CC1)NN=N2)=O VZSRBBMJRBPUNF-UHFFFAOYSA-N 0.000 description 2
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/073—Apertured devices mounted on one or more rods passed through the apertures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201810633941.7A CN108962768B (zh) | 2014-07-18 | 2015-06-25 | 电子零件封装体的制造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014148258A JP6242763B2 (ja) | 2014-07-18 | 2014-07-18 | 電子部品パッケージの製造方法 |
JP2014-148258 | 2014-07-18 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810633941.7A Division CN108962768B (zh) | 2014-07-18 | 2015-06-25 | 电子零件封装体的制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105321831A CN105321831A (zh) | 2016-02-10 |
CN105321831B true CN105321831B (zh) | 2018-07-06 |
Family
ID=55248958
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810633941.7A Active CN108962768B (zh) | 2014-07-18 | 2015-06-25 | 电子零件封装体的制造方法 |
CN201510358148.7A Active CN105321831B (zh) | 2014-07-18 | 2015-06-25 | 电子零件封装体的制造方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201810633941.7A Active CN108962768B (zh) | 2014-07-18 | 2015-06-25 | 电子零件封装体的制造方法 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP6242763B2 (ko) |
KR (2) | KR101724199B1 (ko) |
CN (2) | CN108962768B (ko) |
TW (2) | TWI576931B (ko) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102592327B1 (ko) | 2018-10-16 | 2023-10-20 | 삼성전자주식회사 | 반도체 패키지 |
TWI729453B (zh) * | 2019-08-14 | 2021-06-01 | 華暉興業有限公司 | 功率模組之結構改良 |
CN112992836B (zh) * | 2019-12-12 | 2023-01-17 | 珠海格力电器股份有限公司 | 一种铜桥双面散热的芯片及其制备方法 |
CN112017976B (zh) * | 2020-11-02 | 2021-02-05 | 甬矽电子(宁波)股份有限公司 | 光电传感器封装结构制作方法和光电传感器封装结构 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001244609A (ja) * | 2000-02-25 | 2001-09-07 | Sony Corp | 配線基板の製造方法及びそれにより得られた配線基板 |
JP2002124527A (ja) * | 2000-10-16 | 2002-04-26 | Sony Corp | チップ状電子部品の製造方法、及びその製造に用いる疑似ウェーハの製造方法 |
JP3560585B2 (ja) * | 2001-12-14 | 2004-09-02 | 松下電器産業株式会社 | 半導体装置の製造方法 |
US6900531B2 (en) * | 2002-10-25 | 2005-05-31 | Freescale Semiconductor, Inc. | Image sensor device |
US7944034B2 (en) * | 2007-06-22 | 2011-05-17 | Texas Instruments Incorporated | Array molded package-on-package having redistribution lines |
JP5215605B2 (ja) * | 2007-07-17 | 2013-06-19 | ラピスセミコンダクタ株式会社 | 半導体装置の製造方法 |
JP2009302505A (ja) * | 2008-05-15 | 2009-12-24 | Panasonic Corp | 半導体装置、および半導体装置の製造方法 |
US8030750B2 (en) * | 2009-11-19 | 2011-10-04 | Advanced Semiconductor Engineering, Inc. | Semiconductor device packages with electromagnetic interference shielding |
US8039275B1 (en) * | 2010-06-02 | 2011-10-18 | Stats Chippac Ltd. | Integrated circuit packaging system with rounded interconnect and method of manufacture thereof |
JP5674346B2 (ja) * | 2010-06-15 | 2015-02-25 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法、半導体装置、半導体装置の保管方法、半導体製造装置 |
US20120080787A1 (en) * | 2010-10-05 | 2012-04-05 | Qualcomm Incorporated | Electronic Package and Method of Making an Electronic Package |
JP5237346B2 (ja) * | 2010-10-14 | 2013-07-17 | Towa株式会社 | 半導体チップの圧縮成形方法及び圧縮成形型 |
KR20120041020A (ko) * | 2010-10-20 | 2012-04-30 | 하나 마이크론(주) | 반도체 패키지 및 그 제조 방법 |
KR20120042240A (ko) * | 2010-10-25 | 2012-05-03 | 삼성전자주식회사 | Tmv 패키지온패키지 제조방법 |
KR101075241B1 (ko) * | 2010-11-15 | 2011-11-01 | 테세라, 인코포레이티드 | 유전체 부재에 단자를 구비하는 마이크로전자 패키지 |
US8461691B2 (en) * | 2011-04-29 | 2013-06-11 | Infineon Technologies Ag | Chip-packaging module for a chip and a method for forming a chip-packaging module |
US8658464B2 (en) * | 2011-11-16 | 2014-02-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mold chase design for package-on-package applications |
TWI471952B (zh) * | 2012-07-18 | 2015-02-01 | 矽品精密工業股份有限公司 | 晶片尺寸封裝件之製法 |
-
2014
- 2014-07-18 JP JP2014148258A patent/JP6242763B2/ja active Active
-
2015
- 2015-04-28 TW TW104113508A patent/TWI576931B/zh active
- 2015-04-28 TW TW106100987A patent/TWI644372B/zh active
- 2015-06-18 KR KR1020150086549A patent/KR101724199B1/ko active IP Right Grant
- 2015-06-25 CN CN201810633941.7A patent/CN108962768B/zh active Active
- 2015-06-25 CN CN201510358148.7A patent/CN105321831B/zh active Active
-
2017
- 2017-03-30 KR KR1020170040944A patent/KR101807464B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
KR101724199B1 (ko) | 2017-04-06 |
CN108962768A (zh) | 2018-12-07 |
CN105321831A (zh) | 2016-02-10 |
JP6242763B2 (ja) | 2017-12-06 |
KR101807464B1 (ko) | 2017-12-08 |
TWI644372B (zh) | 2018-12-11 |
TW201604976A (zh) | 2016-02-01 |
CN108962768B (zh) | 2022-04-29 |
TWI576931B (zh) | 2017-04-01 |
JP2016025212A (ja) | 2016-02-08 |
KR20160010305A (ko) | 2016-01-27 |
TW201719778A (zh) | 2017-06-01 |
KR20170040150A (ko) | 2017-04-12 |
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