CN104538400B - 一种ltps阵列基板 - Google Patents

一种ltps阵列基板 Download PDF

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Publication number
CN104538400B
CN104538400B CN201410784820.4A CN201410784820A CN104538400B CN 104538400 B CN104538400 B CN 104538400B CN 201410784820 A CN201410784820 A CN 201410784820A CN 104538400 B CN104538400 B CN 104538400B
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layer
area
light shield
array base
patterning
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CN104538400A (zh
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杜鹏
胡宇彤
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to CN201410784820.4A priority Critical patent/CN104538400B/zh
Priority to US14/426,464 priority patent/US9620536B2/en
Priority to GB1710134.6A priority patent/GB2548753B/en
Priority to PCT/CN2014/095326 priority patent/WO2016095263A1/zh
Priority to KR1020177017249A priority patent/KR101978584B1/ko
Priority to JP2017531498A priority patent/JP6460584B2/ja
Publication of CN104538400A publication Critical patent/CN104538400A/zh
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02F2202/104—Materials and properties semiconductor poly-Si

Abstract

本发明提供一种LTPS阵列基板，其包括多个低温多晶硅薄膜晶体管及底层透明导电层、保护层以及顶层透明导电层。所述每一低温多晶硅薄膜晶体管包括依次叠加形成的基板，图形化的遮光层、缓冲层、图像化的多晶硅层、栅极绝缘层、栅电极线和公共电极线、绝缘层、漏极电极和源极电极、平坦层。所述遮光层覆盖所述扫描线与所述源漏极，所述底层透明导电层上与所述保护层之间形成有图案化的第三金属层，所述图案化的第三金属层包括第一区域及与第一区域相交设置的第二区域，所述第一区域遮盖所述源极线，所述第二区域的一部分与所述遮光层靠近源漏极的一侧位置叠加设置。

Description

一种LTPS阵列基板
技术领域
本发明涉及显示屏技术领域，尤其涉及一种LTPS阵列基板。
背景技术
低温多晶硅(low temperature poly-silicon，简称为LTPS)薄膜晶体管液晶显示器有别于传统的非晶硅薄膜晶体管液晶显示器，其电子迁移率可以达到200cm2/V-sec以上，可有效减小薄膜晶体管器件的面积，从而达到提高开口率，并且在增进显示器亮度的同时还可以降低整体的功耗。另外，较高的电子迁移率可以将部分驱动电路集成在玻璃基板上，减少了驱动IC，还可以大幅提升液晶显示面板的可靠度，从而使得面板的制造成本大幅降低。因此，LTPS薄膜晶体管液晶显示器逐步成为研究的热点。LTPS薄膜晶体管液晶显示器主要包括阵列基板和与其相对设置的彩膜基板。与此同时，触摸功能和液晶显示内部单元的集成(In-Cell)的电容屏，因可以使面板轻薄化及提高室外可视性等优点日渐盛行。
而现有技术中的LTPS的阵列基板，对于顶栅结构的TFT薄膜晶体管，会在玻璃上形成一层金属LS(Light Shield)的图案以遮挡TFT的沟道，与此同时会设置黑矩阵在彩膜基板一侧遮挡栅线、数据线和薄膜晶体管单元过孔等需遮光的结构，如此不仅制作工艺较多，会影响基板的开口率。
发明内容
本发明提供一种LTPS阵列基板，无需设置黑矩阵而节省光罩工艺步骤，并且提升开口率。
本发明提供一种LTPS阵列基板，其包括多个低温多晶硅薄膜晶体管、底层透明导电层、形成于底层透明导电层上的保护层以及形成于所述保护层上的顶层透明导电层，所述每一低温多晶硅薄膜晶体管包括基板；
形成于所述基板上的图形化的遮光层；
形成于所述基板和所述图形化的遮光层上的缓冲层；
形成于所述缓冲层上的图像化的多晶硅层；
形成于所述图形化的多晶硅层和所述缓冲层上的栅极绝缘层；
形成于所述栅极绝缘层上的第一金属层；第一金属层图案化后形成扫描线；
形成于所述图案化的第一金属层的绝缘层；
形成于所述绝缘层上的第二金属层，图案化所述第二金属层后形成源极线和源漏极，所述源级线与所述扫描线相交设置；
形成于所述绝缘层和图案化后的第二金属层上的平坦层；所述底层透明导电层形成于所述平坦层上；所述图案化的遮光层覆盖所述扫描线与所述源漏极，所述底层透明导电层上与所述保护层之间形成有图案化的呈网格状的第三金属层，所述图案化的第三金属层包括第一区域及与第一区域相交设置的第二区域，所述第一区域遮盖所述源极线，所述第二区域的一部分与所述遮光层靠近源漏极的一侧位置叠加设置。
其中，所述图案化的第三金属层为触控感应电极层。
其中，所述扫面线延伸有覆盖部分所述图形化的多晶硅层的延伸区域。
其中，所述第二区域与所述遮光层部分叠加设置，进而使所述第二区域与所述遮光层在宽度方向上形成遮蔽区，所述宽度方向是指由低温多晶硅薄膜晶体管的扫描线朝向源漏极延伸的方向。
其中，所述图案化的第二金属层通过过孔与所述多晶硅层电连接。
其中，所述顶层透明导电层形成于所述保护层上且通过过孔与所述源漏极电连接。
其中，所述栅极绝缘层采用氧化硅(SiOx)、氮化硅(SiNx)与氮氧化硅(SiNxOy)中的一种制成。
其中，所述第一金属层与第二金属层的材料为钼铝合金、铬金属等导电材料。
其中，所述底层透明导电层与顶层透明导电层为透明导电材料制成。
其中，所述第三金属层呈网格状。
本发明的LTPS阵列基板增加了图案化后的遮光层的宽度，使其可以遮蔽所述源漏极以及扫描线，并且与可作为触控感应电极层的图案化第三金属层部分叠加设置，可以遮蔽整个低温多晶硅薄膜晶体管可能产生漏光的位置，同时所述第一区域遮挡了所述源极线，整个阵列基板的设计节省了黑矩阵的制造，进而节省光罩工艺步骤，提升开口率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明较佳实施方式的LTPS阵列基板俯视结构示意图，属于透视图，不同的剖面线代表不同的层。
图2为图1所述的LTPS阵列基板俯视结构示意图，其中去掉了遮光层。
图3是图1中所述的LTPS阵列基板沿着所述的III-III方向的截面示意图。
图4是图2中所述的LTPS阵列基板沿着所述的VI-VI方向的截面示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图1、图2和图3，本发明的LTPS阵列基板包括多个低温多晶硅薄膜晶体管及底层透明导电层32、形成于底层透明导电层32上的保护层34以及形成于所述保护层34上的顶层透明导电层36。而本实施例以一个低温多晶硅薄膜晶体管为例进行说明。
所述每一低温多晶硅薄膜晶体管包括基板10，图形化的遮光层12、缓冲层14、图像化的多晶硅层16、栅极绝缘层18、第一金属层、绝缘层24、第二金属层及平坦层30。所述底层透明导电层32形成于所述平坦层30上。。第一金属层图案化后形成扫描线22。图案化所述第二金属层后形成数据线26和源漏极28，所述数据线26与所述扫描线22相交设置。所述底层透明导电层32上与所述保护层34之间形成图案化的第三金属层38。
请一并参阅他3与图4，具体如下：
所述基板10通常为透明玻璃板。
所述基板10上形成有所述图形化的遮光层12，其中图案化是指通过对涂于整个基板10上的遮光层材料进行曝光刻蚀等工艺进行加工而成，最终形成的图案化的遮光层12。所述遮光层12用遮挡所述薄膜晶体管的扫描线、源漏极等的遮光处。所述遮光层12的材质例如为钼铝合金、铬金属、钼金属或是其它同时具有遮光功能与导电性质的材质。
所述基板10和所述图形化的遮光层12上形成所述缓冲层14。
所述缓冲层14上形成所述图像化的多晶硅层16。其中图案化是指通过对涂于缓冲层14上的多晶硅进行曝光刻蚀等工艺进行加工形成。
所述图形化的多晶硅层16上和所述缓冲层14上形成所述的栅极绝缘层18。所述栅极绝缘层18采用氧化硅(SiOx)、氮化硅(SiNx)与氮氧化硅(SiNxOy)中的一种制成。
所述栅极绝缘层18上形成有第一金属层(图未标)，通过图形化所述第一金属层形成扫描线22，所述扫描线22正投影于所述遮光层12上。
所述绝缘层24形成于所述第一金属层上。通过刻蚀方式形成贯穿所述绝缘层24和栅极绝缘层18的第一过孔(图未标)，所述第一过孔暴露出部分所述图形化的多晶硅层16。
请参图1与图3，所述绝缘层24上形成有第二金属层(图未标)，通过图案化所述第二金属层形成所述的数据线26和源漏极28。所述数据线26与所述扫描线22交叉设置，本实施例中，所述扫描线22水平设置，数据线26竖直设置。所述源漏极28正投影于所述遮光层12上，所述数据线26部分正投影于所述遮光层12上。也就是说，沿着图3中箭头方向看上去，所述图案化的遮光层12遮挡所述扫描线22与所述源漏极28，并且所述遮光层12的宽度H远大于所述扫描线22与所述源漏极28最远边的距离S；利用所述遮光层12遮挡所述扫描线22与所述源漏极28，无需在扫描线22与所述源漏极28上在形成黑矩阵来遮光，如此可以节省制造工序，适当减小薄膜晶体管上遮光区的尺寸。
本实施例中，所述第二金属层形成于所述绝缘层24上且通过所述第一过孔与所述图形化的多晶硅层16电连接，即源漏极28通过所述第一过孔与所述图形化的多晶硅层16电连接。所述第一金属层与第二金属层的材料为钼铝合金、铬金属等导电材料。
所述平坦层30形成于所述绝缘层24和图案化后的第二金属层(数据线26和源漏极28)上。所述平坦层30材料为有机膜。
本实施例中，所述顶层透明导电层36与所述底层透明导电层32分别为像素电极层及阵列基板的公共电极层。所述顶层透明导电层36形成于所述保护层34上且通过贯穿所述底层透明导电层32、保护层34及平坦层30的第二过孔与所述源漏极28电连接。所述底层透明导电层32与顶层透明导电层36为透明导电材料制成。
更进一步的，所述底层透明导电层32上形成有图案化的呈网格状的第三金属层38，所述保护层34形成于所述底层透明导电层32、图案化的第三金属层38以及平坦层30上，所述图案化的第三金属层38位于所述底层透明导电层32与所述保护层34之间。
所述图案化的第三金属层38为触控感应电极层。所述图案化的第三金属层38呈网格状，包括第一区域381及与第一区域381相交设置的第二区域382，所述第一区域381遮盖所述数据线26，所述第二区域382的一部分与所述遮光层12一侧叠加设置，叠加区域位于靠近源漏极28的一侧。
具体的，所述第一区域381纵向设置，所述第二区域382垂直于所述第一区域381横向设置，多个第一区域381及与第一区域381构成网格状。所述第一区域381位于所述数据线16正上方，且所述第一区域381的宽度略大于所述数据线26的宽度，用以遮档数据线26出的漏光。所述第二区域382的宽度为L，所述第二区域382的一部分正投影于所述遮光层12一侧。所述第二区域382的宽度L与遮光层12宽度H的区域有部分叠加，所述第二区域382与所述遮光层12部分叠加设置，进而使所述第二区域382与所述遮光层12与所述遮光层12在宽度方向上形成较长的遮蔽区，所述遮蔽区可以遮蔽低温多晶硅薄膜晶体管以及薄膜晶体管以外其他地方的可能发生的漏光处。所述宽度方向是指由低温多晶硅薄膜晶体管的扫描线22向源漏极28延伸的方向。
本实施例中，所述扫描线22延伸有覆盖所述图形化的多晶硅层16的延伸区域221，所述延伸区域221被所述遮光层12遮蔽并延伸至所述第二区域382与所述遮光层12叠加区域内。
本发明的LTPS阵列基板增加了图案化后的遮光层12的宽度，使图案化后的遮光层12可以遮蔽扫描线22及所述源漏极28，并且与可作为触控感应电极层的图案化第三金属层部分叠加设置，可以遮蔽整个低温多晶硅薄膜晶体管可能产生漏光的位置，同时所述图案化第三金属层28的第一区域381遮挡了所述数据线26，整个阵列基板的设计节省了黑矩阵的制造，可以适当减小阵列基板上遮光区的尺寸，进而节省光罩工艺步骤，提升开口率。
以上所揭露的仅为本发明一种较佳实施例而已，当然不能以此来限定本发明之权利范围，本领域普通技术人员可以理解实现上述实施例的全部或部分流程，并依本发明权利要求所作的等同变化，仍属于发明所涵盖的范围。

Claims (10)

1.一种LTPS阵列基板，其包括多个低温多晶硅薄膜晶体管、底层透明导电层、形成于底层透明导电层上的保护层以及形成于所述保护层上的顶层透明导电层，每一所述低温多晶硅薄膜晶体管包括基板；
形成于所述基板上的图形化的遮光层；
形成于所述基板和所述图形化的遮光层上的缓冲层；
形成于所述缓冲层上的图像化的多晶硅层；
形成于所述图形化的多晶硅层和所述缓冲层上的栅极绝缘层；
形成于所述栅极绝缘层上的第一金属层；第一金属层图案化后形成扫描线；所述扫描线正投影于所述遮光层上；
形成于所述图案化的第一金属层上的绝缘层；
形成于所述绝缘层上的第二金属层，图案化所述第二金属层后形成数据线及源漏极，所述数据线与所述扫描线相交设置；
形成于所述绝缘层和图案化后的第二金属层上的平坦层；所述底层透明导电层形成于所述平坦层上；其特征在于：
所述图案化的遮光层覆盖所述扫描线与所述源漏极，所述底层透明导电层上与所述保护层之间形成有图案化的第三金属层，所述图案化的第三金属层包括第一区域及与第一区域相交设置的第二区域，所述第一区域遮盖所述数据线，所述第二区域的一部分与所述遮光层靠近源漏极的一侧位置叠加设置，与所述遮光层共同遮盖所述源漏极及部分扫描线。
2.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述图案化的第三金属层为触控感应电极层。
3.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述扫描线延伸有覆盖部分所述图形化的多晶硅层的延伸区域，所述延伸区域被所述遮光层及所述第二区域遮盖。
4.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述第二区域与所述遮光层部分叠加设置，进而使所述第二区域与所述遮光层在宽度方向上形成遮蔽区，所述宽度方向是指由低温多晶硅薄膜晶体管的扫描线朝向源漏极延伸的方向。
5.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述图案化的第二金属层通过过孔与所述多晶硅层电连接。
6.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述顶层透明导电层形成于所述保护层上且通过过孔与所述源漏极电连接。
7.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述栅极绝缘层采用氧化硅、氮化硅与氮氧化硅中的一种制成。
8.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述第一金属层与第二金属层的材料为钼铝合金或铬金属。
9.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述底层透明导电层与顶层透明导电层为透明导电材料制成。
10.如权利要求1所述的一种LTPS阵列基板，其特征在于，所述第三金属层呈网格状。
CN201410784820.4A 2014-12-16 2014-12-16 一种ltps阵列基板 Active CN104538400B (zh)

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