TWI540370B - 畫素結構 - Google Patents
畫素結構 Download PDFInfo
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- TWI540370B TWI540370B TW104129476A TW104129476A TWI540370B TW I540370 B TWI540370 B TW I540370B TW 104129476 A TW104129476 A TW 104129476A TW 104129476 A TW104129476 A TW 104129476A TW I540370 B TWI540370 B TW I540370B
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- 239000010410 layer Substances 0.000 claims description 223
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 20
- 229920005591 polysilicon Polymers 0.000 claims description 19
- 239000000758 substrate Substances 0.000 claims description 18
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 11
- 239000011241 protective layer Substances 0.000 claims description 11
- 229910052732 germanium Inorganic materials 0.000 claims description 10
- 239000000463 material Substances 0.000 description 32
- 229910052751 metal Inorganic materials 0.000 description 23
- 239000002184 metal Substances 0.000 description 23
- 238000000034 method Methods 0.000 description 15
- 239000011229 interlayer Substances 0.000 description 10
- 239000007769 metal material Substances 0.000 description 8
- 238000009413 insulation Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 229910052684 Cerium Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- BCZWPKDRLPGFFZ-UHFFFAOYSA-N azanylidynecerium Chemical compound [Ce]#N BCZWPKDRLPGFFZ-UHFFFAOYSA-N 0.000 description 2
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 description 2
- 229910000420 cerium oxide Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 229920000620 organic polymer Polymers 0.000 description 2
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000012356 Product development Methods 0.000 description 1
- -1 aluminum tin oxide Chemical compound 0.000 description 1
- 230000009194 climbing Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 238000005496 tempering Methods 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
- WHXAGNPBEKUGSK-UHFFFAOYSA-N zinc antimony(3+) indium(3+) oxygen(2-) Chemical compound [Sb+3].[Zn+2].[O-2].[In+3].[O-2].[O-2].[O-2] WHXAGNPBEKUGSK-UHFFFAOYSA-N 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
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- H01L29/41725—Source or drain electrodes for field effect devices
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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Description
本發明是有關於一種畫素結構,且特別是有關於一種兩相鄰的子畫素共用接觸圖案層的畫素結構。
近年來,低溫多晶矽(Low Temperature Poly-Silicon, LTPS)液晶顯示器是目前消費性產品開發的設計主流,其主要應用為高整合度與高解析度之中小尺寸液晶顯示器。然而,高解析度的顯示器具有較高畫素密度,因此,每一子畫素的尺寸亦相對縮小。由於子畫素的尺寸較小,作為子畫素中畫素電極以及汲極之間的接觸窗的製程難度亦相對的提高。更進一步來說,當接觸窗所需要的大小超出製程極限時,則無法形成接觸窗,使得畫素電極無法與汲極正確連接,造成畫素電極無法驅動液晶分子。在這樣的情況下,子畫素將會無法顯示畫面,進而使得顯示品質降低。
本發明提供一種畫素結構,可用以突破接觸窗製程極限的限制並提升顯示品質。
本發明提供一種畫素結構,適於配置於一基板上。畫素結構包括多個掃描線、多個資料線以及多個子畫素。子畫素包括多個開關元件、接觸圖案層、多個彩色濾光圖案層以及多個畫素電極。各開關元件分別與其中一條掃描線及其中一條資料線電性連接。接觸圖案層與彩色濾光圖案層配置於基板與開關元件上,其中接觸圖案層覆蓋至少二相鄰開關元件的部分區域,至少二彩色濾光圖案層分別具有一缺口,且接觸圖案層對應設置於缺口中。畫素電極配置於彩色濾光圖案層、觸圖案層與開關元件上,其中至少一畫素電極部分設置於彩色濾光圖案層與對應的開關元件之間且電性連接。
基於上述,本發明為相鄰的兩個子畫素共用接觸圖案層,並利用不同的圖案化透明導電層作為汲極的延伸部往上層延伸,能夠使得最上層的圖案化透明導電層經由在其之下的圖案化透明導電層與汲極電性連接。藉此,畫素結構中的接觸窗的製程能夠不受到畫素結構大小以及製程極限的限制,並使得最上層的圖案化透明導電層能夠確實與汲極電性連接,提供較佳的顯示品質。
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。
圖1A至圖11A是本發明一實施例的畫素結構製造流程上視示意圖。圖1B至圖11B是根據圖1A至圖11A的剖線A-A’以及剖線B-B’的剖面製造流程示意圖。以下將依序說明本發明的畫素結構的製程流程。
請同時參照圖1A以及圖1B,提供一基板100。基板100之材質可為玻璃、石英、有機聚合物、或是其它可適用的材料。緊接著,在基板100上形成一遮光層SM。遮光層SM的目的在於遮蔽之後的製程中所形成之金屬走線。換言之,遮光層SM實質上為本實施例的畫素結構的黑矩陣層。在本實施例中,遮光層SM的材質為金屬,但本發明不限於此。在其他實施例中,遮光層SM的材質亦可以是感光性樹脂材料或其他不透光材料。值得注意的是,在其他實施例中,亦可以不設置遮光層SM。
請同時參照圖2A以及圖2B,在形成遮光層SM之後,依序在基板100以及遮光層SM上形成緩衝層200以及多晶矽層300。緩衝層200的目的在於加強多晶矽層300的附著力。詳言之,由於基板100的材質為玻璃、石英或有機聚合物等材料,其與矽原子之間的附著力並不佳。因此,藉由使用例如是氮化矽材質的緩衝層200,能夠使得多晶矽層300較佳地沉積且附著於緩衝層200上。多晶矽層300的形成方法包括首先在緩衝層200形成一層非晶矽層(未繪示),接著對非晶矽層進行回火製程,使得非晶矽層轉變成多晶矽層300。然而,本發明不限於此,其他習知的多晶矽層形成方法亦可以用來形成本實施例的多晶矽層。在多晶矽層300中,部份部位含有摻雜物(dopant),以形成源極區以及汲極區(未繪示)。
請同時參照圖3A以及圖3B,在緩衝層200以及多晶矽層300上依序形成閘絕緣層GI以及第一圖案化金屬層350,其中閘絕緣層GI完全覆蓋緩衝層200以及多晶矽層300。閘絕緣層GI的材料包含無機材料(例如:氧化矽、氮化矽、氮氧化矽、其它合適的材料、或上述至少二種材料的堆疊層)、有機材料、或其它合適的材料、或上述之組合。也就是說,閘絕緣層GI的材料可以與緩衝層200相同或不同。第一圖案化金屬層350的材質可以是合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、金屬材料與其它導材料的堆疊層或其它合適的材料。第一圖案化金屬層350實質上為本實施例的畫素結構的多條訊號線SL。值得注意的是,第一圖案化金屬層350與多晶矽層300重疊的部分形成閘極G,且多晶矽層300與第一圖案化金屬層350重疊的部分形成通道CH。如前述,由於閘絕緣層GI全面性地覆蓋緩衝層200以及多晶矽層300,故第一圖案化金屬層350的閘極G以及多晶矽層300的通道CH藉由閘絕緣層GI分離而彼此電性絕緣。另一方面,如前所述,由於遮光層SM的目的在於遮蔽金屬走線,故遮光層SM會分布於基板100以及掃描線SL之間。換言之,遮光層SM會與掃描線SL至少部份重疊,如圖3A所示。
接著,請同時參照圖4A以及圖4B,形成層間介電層400,以覆蓋閘絕緣層GI以及第一圖案化金屬層350。其中,層間介電層400具有多個開口,以形成多個貫穿層間介電層400以及閘絕緣層GI的閘絕緣層接觸窗C1。也就是說,閘絕緣層接觸窗C1暴露部分的多晶矽層300。層間介電層400的材質可以與閘絕緣層GI相同或不同,只要層間介電層400的材質為絕緣材質,則本發明不針對層間介電層400的材質特別作限制。
請同時參照圖5A以及圖5B,在層間介電層400上形成第二圖案化金屬層500,其中填入閘絕緣層接觸窗C1的部分第二圖案化金屬層500分別形成源極S以及汲極D,而未填入閘絕緣層接觸窗C1的第二圖案化金屬層500則形成多條資料線DL。亦即,第二圖案化金屬層500包括源極S、汲極D以及資料線DL,且源極S以及汲極D分別透過閘絕緣層接觸窗C1與多晶矽層300連接。類似於第一圖案化金屬層350,第二圖案化金屬層500的材質可以是合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、金屬材料與其它導材料的堆疊層或其它合適的材料。換言之,第一圖案化金屬層350與第二圖案化金屬層500的材質可以是相同或是不同。另一方面,掃描線SL與資料線DL彼此交越設置。也就是說,掃描線SL的延伸方向與資料線DL的延伸方向不平行,較佳的是,掃描線SL的延伸方向與資料線DL的延伸方垂直。如前所述,由於遮光層SM的目的在於遮蔽金屬走線,故遮光層SM會分布於基板100以及資料線DL之間。換言之,遮光層SM會與資料線DL至少部份重疊,如圖5A所示。
承上述,圖5A中的閘極G、源極S、汲極D、以及通道CH構成開關元件TFT。另一方面,由於本實施例中通道CH是形成於多晶矽層300中,且源極S以及汲極D分別對應連接至多晶矽層300中的汲極區以及源極區(未繪示)中,故本實施例的開關元件TFT是一多晶矽電晶體。換言之,在本實施例中,各開關元件TFT的源極S以及汲極D是形成於多晶矽層300中。另一方面,如圖5A所示,開關元件TFT中的閘極G與掃描線SL電性連接,且開關元件TFT中的源極S與資料線DL電性連接。亦即,各開關元件TFT分別與一條掃描線SL以及一條資料線DL電性連接。
請同時參照圖6A以及圖6B,在層間介電層400以及第二圖案化金屬層500上形成接觸圖案層600,其中接觸圖案層600從一條資料線DL的一側延伸至另一側。具體來說,接觸圖案層600覆蓋本實施例的畫素結構中的至少一條資料線DL的部分區域。更進一步來說,接觸圖案層600覆蓋前述至少一條資料線DL兩側的汲極D的部分區域。亦即,接觸圖案層600覆蓋至少兩相鄰開關元件TFT的部分區域,如圖6A所示。接觸圖案層600的材質可以是有機絕緣材料,但本發明不限於此。請同時參照圖7A以及圖7B,緊接著形成第一圖案化透明導電層710。第一圖案化透明導電層710配置於接觸圖案層600以及開關元件TFT上,其中第一圖案化透明導電層710局部覆蓋接觸圖案層600且延伸至局部覆蓋對應的開關元件TFT上,以與對應的開關元件TFT直接接觸並電性連接。換言之,第一圖案化透明導電層710與開關元件TFT的汲極D直接接觸且電性連接,並延伸至接觸圖案層600的上方以覆蓋接觸圖案層600的局部。因此,第一圖案化透明導電層710由較低的地形藉由爬坡的方式延伸至較高的地形。另一方面,第一圖案化透明導電層710的材質包括金屬氧化物,例如是銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、其它合適的氧化物、或者是上述至少二者之堆疊層。
在完成第一圖案化透明導電層710之後,請同時參照圖8A以及圖8B,在接觸圖案層600的周邊形成彩色濾光圖案層CF,且彩色濾光圖案層CF包括第一彩色濾光圖案CF1以及第二彩色濾光圖案CF2。換言之,第一彩色濾光圖案CF1以及第二彩色濾光圖案CF2對應每一子畫素設置,且第一彩色濾光圖案CF1以及第二彩色濾光圖案CF2分別具有缺口OPN,而接觸圖案層600則是對應設置於缺口OPN中。值得注意的是,在本實施例中,兩相鄰的子畫素共用一個接觸圖案層600,故單一接觸圖案層600會配置於第一彩色濾光圖案CF1的缺口OPN以及第二彩色濾光圖案CF2的缺口OPN所形成的空間內。另一方面,在本實施例中,彩色濾光圖案層CF會覆蓋資料線DL,以確保資料線DL與後續製程中其他膜層的絕緣性。
承上述,第一彩色濾光圖案CF1以及第二彩色濾光圖案CF2可以是選自紅色、綠色或是藍色的彩色濾光圖案,本發明不限於此。另一方面,第一彩色濾光圖案CF1以及第二彩色濾光圖案CF2的顏色可以是相同或者是不同,本發明不限於此。除此之外,本實施例的彩色濾光圖案層CF以及開關元件TFT是設置在相同的基板100上,以構成彩色濾光層於畫素陣列上(color filter on array,COA)之結構。
請同時參照圖9A以及圖9B,在彩色濾光圖案層CF以及接觸圖案層600上形成第二圖案化透明導電層720。第二圖案化透明導電層720具有多個第一接觸窗C2,且第一接觸窗C2暴露出第一圖案化透明導電層710以及接觸圖案層600的部分區域。換言之,第二圖案化透明導電層720全面性地覆蓋畫素結構,而只暴露出第一圖案化透明導電層710以及接觸圖案層600的部分區域,以與第一圖案化透明導電層710形成一橫向電場(未繪示)。第二圖案化透明導電層720的材料可以與第一圖案化透明導電層710相同或不同,本發明不特別作限定。
接著,請同時參照圖10A以及圖10B,在完成第二圖案化透明導電層720後,更包括形成保護層800的步驟。換言之,保護層800覆蓋第二圖案化透明導電層720、接觸圖案層600以及彩色濾光圖案層CF,以達到保護這些元件的效果。保護層800的材料包含無機材料(例如:氧化矽、氮化矽、氮氧化矽、其它合適的材料、或上述至少二種材料的堆疊層)、有機材料、或其它合適的材料、或上述之組合。除此之外,保護層800更具有多個第二接觸窗C3。類似於第一接觸窗C2,第二接觸窗C3亦暴露第一圖案化透明導電層710以及接觸圖案層600的部分區域。
請同時參照圖11A以及圖11B,在保護層800上形成第三圖案化透明導電層730。第三圖案化透明導電層730的材料可以與第一圖案化透明導電層710以及第二圖案化透明導電層720相同或不同,且第三圖案化透明導電層730透過貫穿保護層800的第二接觸窗C3與第一圖案化透明導電層710直接接觸且電性連接。如前述,由於開關元件TFT的汲極D與第一圖案化透明導電層710電性連接,故第三圖案化透明導電層730實質上是藉由第一圖案化透明導電層710與開關元件TFT的汲極D電性連接。
在此步驟中,本實施例的畫素結構P已大致完成,且畫素結構P包含相鄰的兩個子畫素P1、P2。在本實施例中,相鄰的兩個子畫素P1、P2共用同一個接觸圖案層600,以使得子畫素P1、P2的開關元件TFT中的源極D能夠順著接觸圖案層600向較高的地形延伸,並使得第三圖案化透明導電層730能夠藉由延伸的第一圖案化透明導電層710與開關元件TFT中的源極D電性連接。因此,連接畫素電極700與源極D的接觸窗能夠不受製程極限的限制,進而降低製程難度。
綜上所述,本發明為相鄰的兩個子畫素共用接觸圖案層,並利用不同的圖案化透明導電層作為汲極的延伸部往上層延伸,能夠使得最上層的圖案化透明導電層經由在其之下的圖案化透明導電層與汲極電性連接。藉此,畫素結構中的接觸窗的製程能夠不受到畫素結構大小以及製程極限的限制,並使得最上層的圖案化透明導電層能夠確實與汲極電性連接,提供較佳的顯示品質。
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100‧‧‧基板
200‧‧‧緩衝層
300‧‧‧多晶矽層
350‧‧‧第一圖案化金屬層
400‧‧‧層間介電層
500‧‧‧第二圖案化金屬層
600‧‧‧接觸圖案層
700‧‧‧畫素電極
710‧‧‧第一圖案化透明導電層
720‧‧‧第二圖案化透明導電層
730‧‧‧第三圖案化透明導電層
800‧‧‧保護層
CH‧‧‧通道
DL‧‧‧資料線
D‧‧‧汲極
G‧‧‧閘極
GI‧‧‧閘絕緣層
C1‧‧‧閘絕緣層接觸窗
C2‧‧‧第一接觸窗
C3‧‧‧第二接觸窗
S‧‧‧源極
SM‧‧‧遮光層
SL‧‧‧訊號線
OPN‧‧‧缺口
CF‧‧‧彩色濾光圖案層
CF1‧‧‧第一彩色濾光圖案
CF2‧‧‧第二彩色濾光圖案
P‧‧‧畫素結構
P1、P2‧‧‧子畫素
圖1A至圖11A是本發明一實施例的畫素結構製造流程上視示意圖。 圖1B至圖11B是根據圖1A至圖11A的剖線A-A’以及剖線B-B’的剖面製造流程示意圖。
100‧‧‧基板
200‧‧‧緩衝層
300‧‧‧多晶矽層
400‧‧‧層間介電層
500‧‧‧第二圖案化金屬層
600‧‧‧接觸圖案層
700‧‧‧畫素電極
710‧‧‧第一圖案化透明導電層
720‧‧‧第二圖案化透明導電層
730‧‧‧第三圖案化透明導電層
800‧‧‧保護層
DL‧‧‧資料線
D‧‧‧汲極
GI‧‧‧閘絕緣層
C1‧‧‧閘絕緣層接觸窗
C2‧‧‧第一接觸窗
C3‧‧‧第二接觸窗
SM‧‧‧遮光層
OPN‧‧‧缺口
CF‧‧‧彩色濾光圖案層
CF1‧‧‧第一彩色濾光圖案
CF2‧‧‧第二彩色濾光圖案
Claims (9)
- 一種畫素結構,適於配置於一基板上,該畫素結構包括: 多個掃描線及多個資料線,互相交錯設置於該基板上; 多個子畫素,包括: 多個開關元件,各該開關元件分別與其中一條掃描線及其中一條資料線電性連接; 一接觸圖案層; 多個彩色濾光圖案層,該接觸圖案層與該些彩色濾光圖案層配置於該基板與該些開關元件上,其中該接觸圖案層覆蓋至少二相鄰開關元件的部分區域,至少二彩色濾光圖案層分別具有一缺口,且該接觸圖案層對應設置於該些缺口中;以及 多個畫素電極,配置於該些彩色濾光圖案層、該接觸圖案層與該些開關元件上,其中至少一畫素電極部分設置於彩色濾光圖案層與對應的該些開關元件之間且電性連接。
- 如申請專利範圍第1項所述的畫素結構,其中各該開關元件包括一與該掃描線電性連接的閘極、一與對應資料線電性連接的源極以及一與對應畫素電極電性連接的汲極。
- 如申請專利範圍第1項所述的畫素結構,其中各該開關元件包括一多晶矽電晶體,而各該開關元件中的源極與汲極形成於該多晶矽電晶體的一多晶矽層中。
- 如申請專利範圍第1項所述的畫素結構,其中該些畫素電極包括: 一第一圖案化透明導電層,配置於該接觸圖案層及該些開關元件上,其中各該第一圖案化透明導電層局部覆蓋該接觸圖案層且延伸至局部覆蓋對應的開關元件上,以與對應的開關元件直接接觸並電性連接; 一第二圖案化透明導電層,配置於該彩色濾光圖案層與該接觸圖案層上,且該第二圖案化透明導電層具有多個第一接觸窗以暴露出各該第一圖案化透明導電層的部分區域;以及 一第三圖案化透明導電層,配置於該第二圖案化透明導電層上,其中該第三圖案化透明導電層藉由該些第一接觸窗與該第一圖案化透明導電層直接接觸並電性連接。
- 如申請專利範圍第4項所述的畫素結構,更包括一保護層,其中該保護層覆蓋該些第二圖案化透明導電層、該接觸圖案層以及該些彩色濾光圖案層,且該保護層具有多個第二接觸窗以暴露出各該第一圖案化透明導電層的部分區域。
- 如申請專利範圍第5項所述的畫素結構,其中各該第一圖案化透明導電層透過各該第一接觸窗以及各該第二接觸窗與對應的第三圖案化透明導電層電性連接。
- 如申請專利範圍第1項所述的畫素結構,其中該接觸圖案層從其中一條資料線的一側延伸至另一側,以覆蓋該條資料線的部分區域。
- 如申請專利範圍第1項所述的畫素結構,更包括一遮光層,其中該遮光層分佈於該些開關元件與該基板之間。
- 如申請專利範圍第8項所述的畫素結構,其中該遮光層更分佈於該些掃描線與該基板之間以及該些資料線與該基板之間。
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US15/183,811 US9935132B2 (en) | 2015-09-07 | 2016-06-16 | Pixel structure |
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