CN104465319B - 低温多晶硅的制作方法及tft基板的制作方法 - Google Patents

低温多晶硅的制作方法及tft基板的制作方法 Download PDF

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CN104465319B
CN104465319B CN201410605937.1A CN201410605937A CN104465319B CN 104465319 B CN104465319 B CN 104465319B CN 201410605937 A CN201410605937 A CN 201410605937A CN 104465319 B CN104465319 B CN 104465319B
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layer
metal
preparation
nethike embrane
amorphous silicon
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CN104465319A (zh
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李亚
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明提供一种低温多晶硅的制作方法及TFT基板的制作方法。所述低温多晶硅制作方法包括如下步骤：步骤1、提供一基板(1)；步骤2、在基板(1)上沉积缓冲层(2)；步骤3、在缓冲层(2)上镀一层金属网膜(3)；步骤4、在金属网膜(3)上沉积非晶硅层(4)；步骤5、对非晶硅层(4)进行快速热退火处理，非晶硅层(4)结晶、转变为多晶硅层(5)；步骤6、移除金属网膜(3)。该方法能够有效降低结晶制程温度、缩短结晶制程时间，降低大面积制备多晶硅薄膜的成本，并改善结晶效果，使晶粒更大更均匀。

Description

低温多晶硅的制作方法及TFT基板的制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种低温多晶硅的制作方法及使用该方法的TFT基板的制作方法。
背景技术
随着平板显示的发展，高分辨率，低能耗的面板需求不断被提出。低温多晶硅(LowTemperature Poly-Silicon，LTPS)由于具有较高的电子迁移率，而在液晶显示器(LiquidCrystal Display，LCD)与有机发光二极管显示器Organic Light Emitting Diode，OLED)技术中得到了业界的重视，被视为实现低成本全彩平板显示的重要材料。对平板显示而言，采用低温多晶硅材料具有高分辨率、反应速度快、高亮度、高开口率、低能耗等优点，而且低温多晶硅可在低温下制作，并可用于制作C-MOS电路，因而被广泛研究，用以达到面板高分辨率，低能耗的需求。
低温多晶硅是多晶硅(poly-Si)技术的一个分支。多晶硅的分子结构在一颗晶粒中的排列状态是整齐而有方向性的，因此电子迁移率比排列杂乱的非晶硅(a-Si)快了200-300倍，极大的提高了平板显示的反应速度。目前制作低温多晶硅主要有：化学气相沉积(Chemical Vapor Deposition，CVD)、固相结晶(Solid Phase Crystallization，SPC)、金属诱导结晶(Metal-Induced Crystallization，MIC)、金属诱导横向结晶(Metal-InducedLateral Crystallization，MILC)、准分子激光退火(Excimer Laser Annealing，ELA)等多种结晶制程方法。
请参阅图1至图5，通常采用低温多晶硅的TFT基板的制作方法主要包括如下步骤：步骤1、提供一基板100；步骤2、在玻璃基板100上沉积缓冲层200；步骤3、在缓冲层200上沉积非晶硅层300；步骤4、采用现有的CVD、SPC、MIC、MILC、或ELA结晶制程方法使非晶硅层300转变为多晶硅层400；步骤5、通过黄光、蚀刻制程对多晶硅层400进行图案化处理，形成多晶硅半导体层450；步骤6、在多晶硅半导体层450上依次形成栅极绝缘层500、栅极600、层间绝缘层700、源/漏极800。
采用CVD结晶制程得到的多晶硅晶粒尺寸特别小，且沉积速率低；传统的SPC结晶制程需要高温且耗时长，导致基板易变形，成本较高；采用MIC或MILC结晶制程制得的多晶硅层金属残留较多，导致TFT电性变差；采用ELA结晶制程制得的多晶硅缺隙态密度低，难以制备大面积多晶硅薄膜，且ELA设备昂贵。
发明内容
本发明的目的首先在于提供一种低温多晶硅的制作方法，能够有效降低结晶制程温度、缩短结晶制程时间，降低大面积制备多晶硅薄膜的成本，并改善结晶效果，使晶粒更大更均匀。
本发明的另一目的在于提供一种TFT基板的制作方法，能够降低结晶制程温度、缩短结晶制程时间，并改善结晶效果，使晶粒更大更均匀，提高TFT的电性。
为实现上述目的，本发明首先提供一种低温多晶硅制作方法，包括如下步骤：
步骤1、提供一基板；
步骤2、在基板上沉积缓冲层；
步骤3、在缓冲层上镀一层金属网膜；
步骤4、在金属网膜上沉积非晶硅层；
步骤5、对非晶硅层进行快速热退火处理，金属网膜中的金属材料与非晶硅层中的硅结合成金属硅化物，诱导非晶硅层结晶、转变为多晶硅层；
具有金属硅化物的金属网膜上移至多晶硅层上方；
步骤6、移除具有金属硅化物的金属网膜。
所述金属网膜的材料为铝。
所述步骤5中，快速热退火处理的温度为600℃，时间为10分钟。
所述缓冲层为单层SiNx层、单层SiOx层、双层SiNx层、双层SiOx层、或者SiNx层与SiOx层二者的组合。
本发明还提供一种使用该低温多晶硅制作方法的TFT基板的制作方法，包括如下步骤：
步骤1、提供一基板；
步骤2、在基板上沉积缓冲层；
步骤3、在缓冲层上镀一层金属网膜；
步骤4、在金属网膜上沉积非晶硅层；
步骤5、对非晶硅层进行快速热退火处理，金属网膜中的金属材料与非晶硅层中的硅结合成金属硅化物，诱导非晶硅层结晶、转变为多晶硅层；
具有金属硅化物的金属网膜上移至多晶硅层上方；
步骤6、移除具有金属硅化物的金属网膜；
步骤7、对多晶硅层进行图案化处理，形成多晶硅半导体层；
步骤8、在多晶硅半导体层上依次形成栅极绝缘层、栅极、层间绝缘层、源/漏极，所述源/漏极与多晶硅半导体层连接。
所述金属网膜的材料为铝。
所述步骤5中，快速热退火处理的温度为600℃，时间为10分钟。
所述缓冲层为单层SiNx层、单层SiOx层、双层SiNx层、双层SiOx层、或者SiNx层与SiOx层二者的组合。
所述步骤7通过黄光、蚀刻制程对多晶硅层进行图案化处理。
本发明的有益效果：本发明的低温多晶硅的制作方法及TFT基板的制作方法，通过将非晶硅层沉积于金属网膜上，采用快速热退火处理使金属网膜中的金属材料与非晶硅层中的硅结合成金属硅化物，诱导非晶硅层结晶、转变为多晶硅层，再移除金属网膜，使得非晶硅层在较低的温度下快速晶化，
能够有效降低结晶制程温度、缩短结晶制程时间，降低大面积制备多晶硅薄膜的成本，并改善结晶效果，使晶粒更大更均匀，从而提高TFT的电性。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的采用低温多晶硅的TFT基板的制作方法的步骤2的示意图；
图2为现有的采用低温多晶硅的TFT基板的制作方法的步骤3的示意图；
图3为现有的采用低温多晶硅的TFT基板的制作方法的步骤4的示意图；
图4为现有的采用低温多晶硅的TFT基板的制作方法的步骤5的示意图；
图5为现有的采用低温多晶硅的TFT基板的制作方法的步骤6的示意图；
图6为本发明低温多晶硅的制作方法的流程图；
图7为本发明TFT基板的制作方法的流程图；
图8为本发明低温多晶硅的制作方法及TFT基板的制作方法的步骤2的示意图；
图9为本发明低温多晶硅的制作方法及TFT基板的制作方法的步骤3的示意图；
图10为本发明低温多晶硅的制作方法及TFT基板的制作方法的步骤4的示意图；
图11为本发明低温多晶硅的制作方法及TFT基板的制作方法的步骤5中进行快速热退火处理的示意图；
图12为本发明低温多晶硅的制作方法及TFT基板的制作方法的步骤5完成之后的示意图；
图13为本发明低温多晶硅的制作方法及TFT基板的制作方法的步骤6的示意图；
图14为本发明TFT基板的制作方法的步骤7的示意图；
图15为本发明TFT基板的制作方法的步骤8的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图6及图8至图13，本发明提供一种低温多晶硅的制作方法，包括如下步骤：
步骤1、提供一基板1。
所述基板1为普通的透明基板，优选的，所述基板1为玻璃基板。
步骤2、如图8所示，在基板1上沉积缓冲层2。
具体的，所述缓冲层2可为单层SiNx层、单层SiOx层、双层SiNx层、双层SiOx层、或者SiNx层与SiOx层二者的组合。
步骤3、如图9所示，在缓冲层2上镀一层金属网膜3。
具体的，所述金属网膜3的材料为铝。
步骤4、如图10所示，在在金属网膜3上沉积非晶硅层4。
完成该步骤4后，所述非晶硅层4、金属网膜3、缓冲层2由上至下依次层叠。
步骤5、如图11、图12所示，对非晶硅层4进行快速热退火(Rapid ThermalAnnealing，RTA)处理，金属网膜3中的金属材料与非晶硅层4中的硅结合成金属硅化物，诱导非晶硅层4结晶、转变为多晶硅层5。
进一步的，所述步骤5利用金属与硅界面的低共熔点特性，在600℃温度下用RTA处理10分钟即能够使非晶硅层4结晶、转变为多晶硅层5，有效降低了RTA温度，缩短了RTA时间，使得非晶硅层4在较低的温度下快速晶化，且对基板1没有特殊要求，普通基板即可耐受600℃温度，降低了制作成本，可用于制作大面积多晶硅薄膜。
在RTA处理过程中，金属网膜3中的金属材料与非晶硅层4中的硅结合成金属硅化物从而诱导非晶硅层4结晶，所述金属网膜3的网状结构有利于金属诱导侧向结晶，使得晶化更彻底，制得的多晶硅晶粒更大更均匀，结晶效果较好。
值得一提的是，完成该步骤5后，如图12所示，具有金属硅化物的金属网膜3上移至多晶硅层5上方。此时，所述具有金属硅化物的金属网膜3、多晶硅层5、缓冲层2由上至下依次层叠。
步骤6、如图13所示，移除具有金属硅化物的金属网膜3。
由于完成步骤5后，具有金属硅化物的金属网膜3、多晶硅层5、缓冲层2由上至下依次层叠，具有金属硅化物的金属网膜3位于最上方，在该步骤6中可方便的将其移除。
至此，完成低温多晶硅制作。
本发明的低温多晶硅的制作方法可用于制作顶栅型(Top-Gate)TFT基板、底栅型(Bottom-Gate)TFT基板以及主动型OLED(AMOLED)。
请参阅图7至图15，在上述低温多晶硅制作方法的基础上，本发明还提供一种使用该方法的TFT基板的制作方法，以顶栅型TFT基板为例，所述TFT基板的制作方法包括如下步骤：
步骤1、提供一基板1。
所述基板1为普通的透明基板，优选的，所述基板1为玻璃基板。
步骤2、如图8所示，在基板1上沉积缓冲层2。
具体的，所述缓冲层2可为单层SiNx层、单层SiOx层、双层SiNx层、双层SiOx层、或者SiNx层与SiOx层二者的组合。
步骤3、如图9所示，在缓冲层2上镀一层金属网膜3。
具体的，所述金属网膜3的材料为铝。
步骤4、如图10所示，在在金属网膜3上沉积非晶硅层4。
完成该步骤4后，所述非晶硅层4、金属网膜3、缓冲层2由上至下依次层叠。
步骤5、如图11、图12所示，对非晶硅层4进行快RTA处理，金属网膜3中的金属材料与非晶硅层4中的硅结合成金属硅化物，诱导非晶硅层4结晶、转变为多晶硅层5。
进一步的，所述步骤5利用金属与硅界面的低共熔点特性，在600℃温度下用RTA处理10分钟即能够使非晶硅层4结晶、转变为多晶硅层5，有效降低了RTA温度，缩短了RTA时间，使得非晶硅层4在较低的温度下快速晶化，且对基板1没有特殊要求，普通基板即可耐受600℃温度，降低了制作成本，可用于制作大面积多晶硅薄膜。
在RTA处理过程中，金属网膜3中的金属材料与非晶硅层4中的硅结合成金属硅化物从而诱导非晶硅层4结晶，所述金属网膜3的网状结构有利于金属诱导侧向结晶，使得晶化更彻底，制得的多晶硅晶粒更大更均匀，结晶效果较好。
值得一提的是，完成该步骤5后，如图12所示，具有金属硅化物的金属网膜3上移至多晶硅层5上方。此时，所述具有金属硅化物的金属网膜3、多晶硅层5、缓冲层2由上至下依次层叠。
步骤6、如图13所示，移除具有金属硅化物的金属网膜3。
由于完成步骤5后，具有金属硅化物的金属网膜3、多晶硅层5、缓冲层2由上至下依次层叠，具有金属硅化物的金属网膜3位于最上方，在该步骤6中可方便的将其移除。
步骤7、如图14所示，通过黄光(photo)、蚀刻(etch)制程对多晶硅层5进行图案化处理，形成多晶硅半导体层55。
步骤8、如图15所示，在多晶硅半导体层55上依次形成栅极绝缘层6、栅极7、层间绝缘层8、源/漏极9，所述源/漏极9与多晶硅半导体层55连接。
至此，完成该顶栅型TFT基板的制作。由于所述步骤5形成的多晶硅层5内的多晶硅晶粒更大更均匀，且步骤6中移除了具有金属硅化物的金属网膜3，能够使得步骤7中形成的多晶硅半导体层55的电性较好，从而改善TFT的电性。
综上所述，本发明的低温多晶硅的制作方法及TFT基板的制作方法，通过将非晶硅层沉积于金属网膜上，采用快速热退火处理使金属网膜中的金属材料与非晶硅层中的硅结合成金属硅化物，诱导非晶硅层结晶、转变为多晶硅层，再移除金属网膜，使得非晶硅层在较低的温度下快速晶化，能够有效降低结晶制程温度、缩短结晶制程时间，降低大面积制备多晶硅薄膜的成本，并改善结晶效果，使晶粒更大更均匀，并改善TFT的电性。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (7)

1.一种低温多晶硅的制作方法，其特征在于，包括如下步骤：
步骤1、提供一基板(1)；
步骤2、在基板(1)上沉积缓冲层(2)；
步骤3、在缓冲层(2)上镀一层金属网膜(3)；
步骤4、在金属网膜(3)上沉积非晶硅层(4)；
步骤5、对非晶硅层(4)进行快速热退火处理，金属网膜(3)中的金属材料与非晶硅层(4)中的硅结合成金属硅化物，诱导非晶硅层(4)结晶、转变为多晶硅层(5)；
具有金属硅化物的金属网膜(3)上移至多晶硅层(5)上方，使具有金属硅化物的金属网膜(3)、多晶硅层(5)、缓冲层(2)由上至下依次层叠；
步骤6、移除具有金属硅化物的金属网膜(3)；
所述步骤5中，快速热退火处理的温度为600℃，时间为10分钟。
2.如权利要求1所述的低温多晶硅的制作方法，其特征在于，所述金属网膜(3)的材料为铝。
3.如权利要求1所述的低温多晶硅的制作方法，其特征在于，所述缓冲层(2)为单层SiNx层、单层SiOx层、双层SiNx层、双层SiOx层、或者SiNx层与SiOx层二者的组合。
4.一种TFT基板的制作方法，其特征在于，包括如下步骤：
步骤1、提供一基板(1)；
步骤2、在基板(1)上沉积缓冲层(2)；
步骤3、在缓冲层(2)上镀一层金属网膜(3)；
步骤4、在金属网膜(3)上沉积非晶硅层(4)；
步骤5、对非晶硅层(4)进行快速热退火处理，金属网膜(3)中的金属材料与非晶硅层(4)中的硅结合成金属硅化物，诱导非晶硅层(4)结晶、转变为多晶硅层(5)；
具有金属硅化物的金属网膜(3)上移至多晶硅层(5)上方，使具有金属硅化物的金属网膜(3)、多晶硅层(5)、缓冲层(2)由上至下依次层叠；
步骤6、移除具有金属硅化物的金属网膜(3)；
步骤7、对多晶硅层(5)进行图案化处理，形成多晶硅半导体层(55)；
步骤8、在多晶硅半导体层(55)上依次形成栅极绝缘层(6)、栅极(7)、层间绝缘层(8)、源/漏极(9)，所述源/漏极(9)与多晶硅半导体层(55)连接；
所述步骤5中，快速热退火处理的温度为600℃，时间为10分钟。
5.如权利要求4所述的TFT基板的制作方法，其特征在于，所述金属网膜(3)的材料为铝。
6.如权利要求4所述的TFT基板的制作方法，其特征在于，所述缓冲层(2)为单层SiNx层、单层SiOx层、双层SiNx层、双层SiOx层、或者SiNx层与SiOx层二者的组合。
7.如权利要求4所述的TFT基板的制作方法，其特征在于，所述步骤7通过黄光、蚀刻制程对多晶硅层(5)进行图案化处理。
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