CN104538429B - Amoled背板的制作方法及其结构 - Google Patents

Amoled背板的制作方法及其结构 Download PDF

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CN104538429B
CN104538429B CN201410837308.1A CN201410837308A CN104538429B CN 104538429 B CN104538429 B CN 104538429B CN 201410837308 A CN201410837308 A CN 201410837308A CN 104538429 B CN104538429 B CN 104538429B
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drain
source
layer
grid
amoled
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CN104538429A (zh
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徐源竣
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201410837308.1A priority Critical patent/CN104538429B/zh
Priority to US14/429,082 priority patent/US9590020B2/en
Priority to PCT/CN2015/072505 priority patent/WO2016101392A1/zh
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Abstract

本发明提供一种AMOLED背板的制作方法及其结构。该AMOLED背板的制作方法为:依次在基板(1)上沉积缓冲层(2)、非晶硅层,使非晶硅层结晶、转变为多晶硅层并图案化多晶硅层,然后沉积一层P型重掺杂微晶硅层(P+uc‑Si),接着进行黄光制程定义出沟道(40)的位置,再对P型重掺杂微晶硅层(P+uc‑Si)进行蚀刻,形成源/漏极(41),后续依次形成栅极绝缘层(5)、栅极(61)、层间绝缘层(7)、金属源/漏极(81)、平坦层(9)、阳极(10)、像素定义层(11)、及光阻间隙物(12);所述源/漏极(41)与栅极(61)在水平方向上不重叠,相互间隔。该方法能够改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量。

Description

AMOLED背板的制作方法及其结构
技术领域
本发明涉及显示技术领域,尤其涉及一种AMOLED背板的制作方法及其结构。
背景技术
在显示技术领域,液晶显示器(Liquid Crystal Display,LCD)与有机发光二极管显示器(Organic Light Emitting Diode,OLED)等平板显示技术已经逐步取代CRT显示器。其中,OLED具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽,可实现柔性显示与大面积全色显示等诸多优点,被业界公认为是最有发展潜力的显示装置。
OLED按照驱动类型可分为无源OLED(PMOLED)和有源OLED(AMOLED)。其中,AMOLED通常是由低温多晶硅(Low Temperature Poly-Silicon,LTPS)驱动背板和电激发光层组成自发光组件。低温多晶硅具有较高的电子迁移率,对AMOLED而言,采用低温多晶硅材料具有高分辨率、反应速度快、高亮度、高开口率、低能耗等优点。
现有的一种AMOLED背板的结构如图1所示。该AMOLED背板的制作过程大体为:
步骤1、在基板100上沉积缓冲层200;
步骤2、在缓冲层200上沉积非晶硅(a-Si)层,经激光(Laser)处理使非晶硅层结晶、转变为多晶硅(Poly-Si)层;
步骤3、通过黄光、蚀刻制程对多晶硅层进行图案化处理,形成间隔排列的第一多晶硅段301与第二多晶硅段303;
步骤4、在所述缓冲层200、第一多晶硅段301、与第二多晶硅段303上沉积N型重掺杂非晶硅层N+a-Si,并用黄光制程定义出沟道400的位置后再进行蚀刻,使N型重掺杂非晶硅层N+a-Si图案化,形成除沟道400对应区域以外位于第一多晶硅段301上的源/漏极401、及位于第二多晶硅段303上的电极403;
步骤5、在所述缓冲层200、源/漏极401、与电极403上沉积并图案化栅极绝缘层500;
步骤6、在所述栅极绝缘层500上沉积并图案化第一金属层,形成栅极601、及金属电极603;所述栅极601位于源/漏极401上方,并在水平方向上与源/漏极401有部分重叠;
步骤7、通过沉积、黄光、蚀刻制程在栅极绝缘层500、栅极601及金属电极603上依次形成层间绝缘层700、金属源/漏极801、平坦层900、阳极1000、像素定义层1100、及光阻间隙物1200。
金属源/漏极801电性连接于源/漏极401;阳极1000电性连接于金属源/漏极801。
所述第一多晶硅段301、源/漏极401、栅极601与金属源/漏极801构成驱动TFT,所述第二多晶硅段303、电极403与金属电极603构成存储电容。
由于如图1所示的AMOLED背板的驱动TFT为NMOS,AMOLED面板比较容易产生图像残留(Image Sticking)的现象,另外由N型重掺杂非晶硅层N+a-Si形成的源/漏极401与由第一多晶硅段301的接触阻抗较高,会导致驱动TFT的导通电流较低,而源/漏极401与栅极601在水平方向上有部分重叠,还会导致驱动TFT漏电流过高。
发明内容
本发明的目的在于提供一种AMOLED背板的制作方法,能够改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量。
本发明的目的还在于提供一种AMOLED背板结构,能够改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量。
为实现上述目的,本发明提供一种AMOLED背板的制作方法,依次在基板上沉积缓冲层、非晶硅层,使非晶硅层结晶、转变为多晶硅层并图案化多晶硅层,然后沉积一层P型重掺杂微晶硅层,接着进行黄光制程定义出沟道的位置,再对P型重掺杂微晶硅层进行蚀刻,形成源/漏极,后续依次形成栅极绝缘层、栅极、层间绝缘层、金属源/漏极、平坦层、阳极、像素定义层、及光阻间隙物;所述源/漏极与栅极在水平方向上不重叠,相互间隔。
所述AMOLED背板的制作方法,包括如下步骤:
步骤1、提供一基板,在该基板上沉积缓冲层;
步骤2、在缓冲层上沉积非晶硅层,并对非晶硅层进行准分子激光退火处理,使得该非晶硅层结晶、转变为多晶硅层;
步骤3、通过黄光、蚀刻制程对多晶硅层进行图案化处理,形成间隔排列的第一多晶硅段与第二多晶硅段;
步骤4、在所述缓冲层、第一多晶硅段、与第二多晶硅段上沉积P型重掺杂微晶硅层,接着进行黄光制程定义出沟道的位置,再对P型重掺杂微晶硅层进行蚀刻,使P型重掺杂微晶硅层图案化,形成除沟道对应区域以外位于第一多晶硅段上的源/漏极、及位于第二多晶硅段上的电极;
步骤5、在所述缓冲层、源/漏极、与电极上沉积并图案化栅极绝缘层;
步骤6、在所述栅极绝缘层上沉积并图案化第一金属层,形成栅极、及金属电极;
所述栅极位于沟道上方;所述源/漏极与栅极在水平方向上相互间隔一定距离;
步骤7、通过沉积、黄光、蚀刻制程在栅极绝缘层、栅极及金属电极上依次形成层间绝缘层、金属源/漏极、平坦层、阳极、像素定义层、及光阻间隙物;
所述金属源/漏极电性连接于源/漏极;所述阳极电性连接于金属源/漏极;
所述第一多晶硅段、源/漏极、栅极与金属源/漏极构成驱动TFT,所述第二多晶硅段、电极与金属电极构成存储电容。
所述步骤4中采用CVD法沉积P型重掺杂微晶硅层。
所述源/漏极与栅极在水平方向上相互间隔的距离为0.1~0.5μm。
所述栅极的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
所述缓冲层的材料为氮化硅、氧化硅、或二者的组合;所述层间绝缘层的材料为氧化硅、氮化硅、或二者的组合。
所述阳极的材料为氧化铟锡/银/氧化铟锡复合薄膜。
本发明还提供一种AMOLED背板结构,包括基板、设于所述基板上的缓冲层、设于所述缓冲层上的间隔排列的第一多晶硅段与第二多晶硅段、分别设于所述第一多晶硅段与第二多晶硅段上的源/漏极与电极、设于所述缓冲层、源/漏极、与电极上的栅极绝缘层、设于所述栅极绝缘层上的栅极与金属电极、及依次设于所述栅极绝缘层、栅极与金属电极上的层间绝缘层、金属源/漏极、平坦层、阳极、像素定义层、光阻间隙物;所述金属源/漏极电性连接于源/漏极;所述阳极电性连接于金属源/漏极;
所述源/漏极的材料为P型重掺杂微晶硅;所述源/漏极之间具有沟道;所述栅极位于沟道上方;所述源/漏极与栅极在水平方向上不重叠,相互间隔;
所述第一多晶硅段、源/漏极、栅极与金属源/漏极构成驱动TFT,所述第二多晶硅段、电极与金属电极构成存储电容。
所述源/漏极与栅极在水平方向上相互间隔的距离为0.1~0.5μm。所述栅极的材料为钼、钛、铝、铜中的一种或多种的堆栈组合;所述缓冲层的材料为氮化硅、氧化硅、或二者的组合;所述层间绝缘层的材料为氧化硅、氮化硅、或二者的组合;所述阳极的材料为氧化铟锡/银/氧化铟锡复合薄膜。
本发明的有益效果:本发明提供的一种AMOLED背板的制作方法,通过沉积并图案化P型重掺杂微晶硅层形成源/漏极,并使源/漏极与栅极在水平方向上相互间隔,能够降低源/漏极与第一多晶硅段之间的接触阻抗,改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量;本发明提供的一种AMOLED背板结构,通过设置以P型重掺杂微晶硅为材料的源/漏极,并设置源/漏极与栅极在水平方向上相互间隔,能够降低源/漏极与第一多晶硅段之间的接触阻抗,改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为一种现有的AMOLED背板结构的示意图;
图2为本发明AMOLED背板制作方法的流程图;
图3为本发明AMOLED背板制作方法的步骤3的示意图;
图4为本发明AMOLED背板制作方法的步骤4的示意图;
图5为本发明AMOLED背板制作方法的步骤5的示意图;
图6为本发明AMOLED背板制作方法的步骤6的示意图;
图7为本发明AMOLED背板制作方法的步骤7暨本发明AMOLED背板结构的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请同时参阅图2至图7,本发明提供一种AMOLED背板的制作方法,包括如下步骤:
步骤1、提供一基板1,在该基板1上沉积缓冲层2。
所述基板1为透明基板,优选的,所述基板1为玻璃基板或塑料基板。
所述缓冲层2的材料为氮化硅(SiNx)、氧化硅(SiOx)、或二者的组合。
步骤2、在缓冲层2上沉积非晶硅层,并对非晶硅层进行准分子激光退火处理,使得该非晶硅层结晶、转变为多晶硅层。
步骤3、如图3所示,通过黄光、蚀刻制程对多晶硅层进行图案化处理,形成间隔排列的第一多晶硅段31与第二多晶硅段33。
步骤4、如图4所示,采用化学气相沉积(Chemical Vapor Deposition,CVD)法在所述缓冲层2、第一多晶硅段31、与第二多晶硅段33上沉积P型重掺杂微晶硅(P+micro-crystallized Si)层P+uc-Si,接着进行黄光制程定义出沟道40的位置,再对P型重掺杂微晶硅层P+uc-Si进行蚀刻,使P型重掺杂微晶硅层P+uc-Si图案化,形成除沟道40对应区域以外位于第一多晶硅段31上的源/漏极41、及位于第二多晶硅段33上的电极43。
步骤5、如图5所示,在所述缓冲层2、源/漏极41、与电极43上沉积并图案化栅极绝缘层5。
步骤6、如图6所示,在所述栅极绝缘层5上沉积并图案化第一金属层,形成栅极61、及金属电极63。
所述栅极61位于沟道40上方;所述源/漏极41与栅极61在水平方向上相互间隔一定距离。进一步的,所述源/漏极41与栅极61在水平方向上相互间隔的距离为0.1~0.5μm。
所述栅极61及金属电极63的材料可为钼(Mo)、钛(Ti)、铝(Al)、铜(Cu)中的一种或多种的堆栈组合。
步骤7、如图7所示,通过沉积、黄光、蚀刻制程在栅极绝缘层5、栅极61及金属电极63上依次形成层间绝缘层7、金属源/漏极81、平坦层9、阳极10、像素定义层11、及光阻间隙物12。
所述金属源/漏极81电性连接于源/漏极41;所述阳极10电性连接于金属源/漏极81。
所述层间绝缘层7的材料为氧化硅、氮化硅、或二者的组合。所述阳极10的材料为氧化铟锡/银/氧化铟锡(ITO/Ag/ITO)复合薄膜。
所述第一多晶硅段31、源/漏极41、栅极61与金属源/漏极81构成驱动TFT,所述第二多晶硅段33、电极43与金属电极63构成存储电容。
上述AMOLED背板的制作方法中,所述源/漏极41通过沉积并图案化P型重掺杂微晶硅层P+uc-Si得到,从而所述驱动TFT为P型TFT,由该P型TFT驱动AMOLED可以减少图像残留,提高AMOLED的显示质量;同时,由于P型重掺杂微晶硅与多晶硅的材料特性较为接近,所述源/漏极41与第一多晶硅段31之间的接触阻抗得以降低,改善了驱动TFT的电特性,使导通电流较高;所述源/漏极41与栅极61在水平方向上相互间隔,没有重叠区域,能够降低驱动TFT的漏电流。
请参阅图7,本发明还提供一种AMOLED背板结构,包括基板1、设于所述基板1上的缓冲层2、设于所述缓冲层2上的间隔排列的第一多晶硅段31与第二多晶硅段33、分别设于所述第一多晶硅段31与第二多晶硅段33上的源/漏极41与电极43、设于所述缓冲层2、源/漏极41、与电极43上的栅极绝缘层5、设于所述栅极绝缘层5上的栅极61与金属电极63、及依次设于所述栅极绝缘层5、栅极61与金属电极63上的层间绝缘层7、金属源/漏极81、平坦层9、阳极10、像素定义层11、光阻间隙物12。
所述金属源/漏极81电性连接于源/漏极41。所述阳极10电性连接于金属源/漏极81。所述第一多晶硅段31、源/漏极41、栅极61与金属源/漏极81构成驱动TFT,所述第二多晶硅段33、电极43与金属电极63构成存储电容。
所述源/漏极41的材料为P型重掺杂微晶硅(P+uc-Si);所述源/漏极41之间具有沟道40;所述栅极61位于沟道40上方;所述源/漏极41与栅极61在水平方向上不重叠,相互间隔,进一步的,所述源/漏极41与栅极61在水平方向上相互间隔的距离为0.1~0.5μm。
具体的,所述基板1为透明基板,优选的,所述基板1为玻璃基板或塑料基板。所述栅极61的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。所述缓冲层2的材料为氮化硅、氧化硅、或二者的组合。所述层间绝缘层7的材料为氧化硅、氮化硅、或二者的组合。所述阳极10的材料为氧化铟锡/银/氧化铟锡复合薄膜。
上述AMOLED背板结构,设置所述源/漏极41的材料为P型重掺杂微晶硅P+uc-Si,从而所述驱动TFT为P型TFT,由该P型TFT驱动AMOLED可以减少图像残留,提高AMOLED的显示质量;同时,由于P型重掺杂微晶硅与多晶硅的材料特性较为接近,所述源/漏极41与第一多晶硅段31之间的接触阻抗得以降低,改善了驱动TFT的电特性,使导通电流较高;设置所述源/漏极41与栅极61在水平方向上相互间隔,没有重叠区域,能够降低驱动TFT的漏电流。
综上所述,本发明的AMOLED背板的制作方法,通过沉积并图案化P型重掺杂微晶硅层形成源/漏极,并使源/漏极与栅极在水平方向上相互间隔,能够降低源/漏极与第一多晶硅段之间的接触阻抗,改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量;本发明的AMOLED背板结构,通过设置以P型重掺杂微晶硅为材料的源/漏极,并设置源/漏极与栅极在水平方向上相互间隔,能够降低源/漏极与第一多晶硅段之间的接触阻抗,改善驱动TFT的电特性,使导通电流较高、漏电流较低,并减少图像残留,提高AMOLED的显示质量。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (9)

1.一种AMOLED背板的制作方法,其特征在于,包括如下步骤:
步骤1、提供一基板(1),在该基板(1)上沉积缓冲层(2);
步骤2、在缓冲层(2)上沉积非晶硅层,并对非晶硅层进行准分子激光退火处理,使得该非晶硅层结晶、转变为多晶硅层;
步骤3、通过黄光、蚀刻制程对多晶硅层进行图案化处理,形成间隔排列的第一多晶硅段(31)与第二多晶硅段(33);
步骤4、在所述缓冲层(2)、第一多晶硅段(31)、与第二多晶硅段(33)上沉积P型重掺杂微晶硅层(P+uc-Si),接着进行黄光制程定义出沟道(40)的位置,再对P型重掺杂微晶硅层(P+uc-Si)进行蚀刻,使P型重掺杂微晶硅层(P+uc-Si)图案化,形成除沟道(40)对应区域以外位于第一多晶硅段(31)上的源/漏极(41)、及位于第二多晶硅段(33)上的电极(43);
步骤5、在所述缓冲层(2)、源/漏极(41)、与电极(43)上沉积并图案化栅极绝缘层(5);
步骤6、在所述栅极绝缘层(5)上沉积并图案化第一金属层,形成栅极(61)、及金属电极(63);
所述栅极(61)位于沟道(40)上方;所述源/漏极(41)与栅极(61)在水平方向上相互间隔一定距离,使沟道(40)具有位于栅极(61)在竖直方向上的投影与源/漏极(41)之间的部分;
步骤7、通过沉积、黄光、蚀刻制程在栅极绝缘层(5)、栅极(61)及金属电极(63)上依次形成层间绝缘层(7)、金属源/漏极(81)、平坦层(9)、阳极(10)、像素定义层(11)、及光阻间隙物(12);
所述金属源/漏极(81)电性连接于源/漏极(41);所述阳极(10)电性连接于金属源/漏极(81);
所述第一多晶硅段(31)、源/漏极(41)、栅极(61)与金属源/漏极(81)构成驱动TFT,所述第二多晶硅段(33)、电极(43)与金属电极(63)构成存储电容。
2.如权利要求1所述的AMOLED背板的制作方法,其特征在于,所述步骤4中采用CVD法沉积P型重掺杂微晶硅层(P+uc-Si)。
3.如权利要求1所述的AMOLED背板的制作方法,其特征在于,所述源/漏极(41)与栅极(61)在水平方向上相互间隔的距离为0.1~0.5μm。
4.如权利要求1所述的AMOLED背板的制作方法,其特征在于,所述栅极(61)的材料为钼、钛、铝、铜中的一种或多种的堆栈组合。
5.如权利要求1所述的AMOLED背板的制作方法,其特征在于,所述缓冲层(2)的材料为氮化硅、氧化硅、或二者的组合;所述层间绝缘层(7)的材料为氧化硅、氮化硅、或二者的组合。
6.如权利要求1所述的AMOLED背板的制作方法,其特征在于,所述阳极(10)的材料为氧化铟锡/银/氧化铟锡复合薄膜。
7.一种AMOLED背板结构,其特征在于,包括基板(1)、设于所述基板(1)上的缓冲层(2)、设于所述缓冲层(2)上的间隔排列的第一多晶硅段(31)与第二多晶硅段(33)、分别设于所述第一多晶硅段(31)与第二多晶硅段(33)上的源/漏极(41)与电极(43)、设于所述缓冲层(2)、源/漏极(41)、与电极(43)上的栅极绝缘层(5)、设于所述栅极绝缘层(5)上的栅极(61)与金属电极(63)、及依次设于所述栅极绝缘层(5)、栅极(61)与金属电极(63)上的层间绝缘层(7)、金属源/漏极(81)、平坦层(9)、阳极(10)、像素定义层(11)、光阻间隙物(12);所述金属源/漏极(81)电性连接于源/漏极(41);所述阳极(10)电性连接于金属源/漏极(81);
所述源/漏极(41)的材料为P型重掺杂微晶硅(P+uc-Si);所述源/漏极(41)之间具有沟道(40);所述栅极(61)位于沟道(40)上方;所述源/漏极(41)与栅极(61)在水平方向上不重叠,相互间隔,使沟道(40)具有位于栅极(61)在竖直方向上的投影与源/漏极(41)之间的部分;
所述第一多晶硅段(31)、源/漏极(41)、栅极(61)与金属源/漏极(81)构成驱动TFT,所述第二多晶硅段(33)、电极(43)与金属电极(63)构成存储电容。
8.如权利要求7所述的AMOLED背板结构,其特征在于,所述源/漏极(41)与栅极(61)在水平方向上相互间隔的距离为0.1~0.5μm。
9.如权利要求7所述的AMOLED背板结构,其特征在于,所述栅极(61)的材料为钼、钛、铝、铜中的一种或多种的堆栈组合;所述缓冲层(2)的材料为氮化硅、氧化硅、或二者的组合;所述层间绝缘层(7)的材料为氧化硅、氮化硅、或二者的组合;所述阳极(10)的材料为氧化铟锡/银/氧化铟锡复合薄膜。
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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104810382A (zh) * 2015-05-07 2015-07-29 深圳市华星光电技术有限公司 Amoled背板的制作方法及其结构
CN106098628B (zh) * 2016-06-07 2019-04-02 深圳市华星光电技术有限公司 Tft背板的制作方法及tft背板
KR20170143082A (ko) * 2016-06-17 2017-12-29 삼성디스플레이 주식회사 유기 발광 표시 장치 및 유기 발광 표시 장치의 제조 방법
CN106298645B (zh) * 2016-08-17 2019-04-02 深圳市华星光电技术有限公司 一种tft基板的制备方法
CN107046048B (zh) * 2016-09-30 2020-09-04 广东聚华印刷显示技术有限公司 像素界定层及其制备方法和应用
KR20180050478A (ko) 2016-11-04 2018-05-15 삼성디스플레이 주식회사 박막 트랜지스터, 그의 제조 방법, 및 이를 포함하는 표시 장치
CN106601778B (zh) * 2016-12-29 2019-12-24 深圳市华星光电技术有限公司 Oled背板及其制作方法
CN107221554B (zh) * 2017-06-08 2020-06-05 深圳市华星光电技术有限公司 一种oled器件及制造方法
CN107706224B (zh) * 2017-09-30 2020-09-04 武汉华星光电技术有限公司 一种显示面板及其制作方法
CN109065749A (zh) 2018-07-23 2018-12-21 武汉华星光电半导体显示技术有限公司 Oled显示装置
CN110349974A (zh) * 2019-06-25 2019-10-18 武汉华星光电半导体显示技术有限公司 一种阵列基板及其制备方法、显示装置
CN110534549A (zh) * 2019-08-08 2019-12-03 深圳市华星光电半导体显示技术有限公司 阵列基板、显示面板及阵列基板的制作方法
CN110911466B (zh) * 2019-11-29 2022-08-19 京东方科技集团股份有限公司 一种基板及其制备方法、母板的制备方法、掩膜版和蒸镀装置
CN111276546B (zh) * 2020-02-20 2022-07-29 武汉华星光电技术有限公司 显示面板及其制作方法
CN111834431B (zh) * 2020-07-16 2023-01-13 Oppo广东移动通信有限公司 显示屏驱动结构和显示屏驱动结构的制造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1832171A (zh) * 2004-12-03 2006-09-13 株式会社半导体能源研究所 半导体电路、显示装置及具有该显示装置的电子设备
CN101118913A (zh) * 2006-08-04 2008-02-06 三菱电机株式会社 显示装置及其制造方法
CN101355088A (zh) * 2007-07-19 2009-01-28 统宝光电股份有限公司 显示面板及其方法
CN102270656A (zh) * 2010-06-04 2011-12-07 三星移动显示器株式会社 有机发光二极管显示器及其制造方法
CN104143533A (zh) * 2014-08-07 2014-11-12 深圳市华星光电技术有限公司 高解析度amoled背板制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2501451B2 (ja) * 1987-08-10 1996-05-29 日本電信電話株式会社 薄膜トランジスタ及びその製造方法
GB9113979D0 (en) * 1991-06-28 1991-08-14 Philips Electronic Associated Thin-film transistors and their manufacture
KR0136066B1 (ko) * 1994-05-06 1998-04-24 한민구 오프셋구조로 이루어지는 박막 트랜지스터의 제조방법
US6524877B1 (en) * 1999-10-26 2003-02-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, and method of fabricating the same
KR100770266B1 (ko) * 2006-11-10 2007-10-25 삼성에스디아이 주식회사 유기전계발광표시장치 및 그 제조방법
JP5500771B2 (ja) * 2006-12-05 2014-05-21 株式会社半導体エネルギー研究所 半導体装置及びマイクロプロセッサ
TWI367565B (en) * 2008-02-05 2012-07-01 Chimei Innolux Corp Double-layered active area structure with a polysilicon layer and a microcrystalline silicon layer, method for manufactruing the same and its application
TWI371223B (en) * 2008-02-20 2012-08-21 Chimei Innolux Corp Organic light emitting display device and fabrications thereof and electronic device
TW201009434A (en) * 2008-08-29 2010-03-01 Au Optronics Corp Method for fabricating pixel structure, display panel and electro-optical apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1832171A (zh) * 2004-12-03 2006-09-13 株式会社半导体能源研究所 半导体电路、显示装置及具有该显示装置的电子设备
CN101118913A (zh) * 2006-08-04 2008-02-06 三菱电机株式会社 显示装置及其制造方法
CN101355088A (zh) * 2007-07-19 2009-01-28 统宝光电股份有限公司 显示面板及其方法
CN102270656A (zh) * 2010-06-04 2011-12-07 三星移动显示器株式会社 有机发光二极管显示器及其制造方法
CN104143533A (zh) * 2014-08-07 2014-11-12 深圳市华星光电技术有限公司 高解析度amoled背板制造方法

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