CN104423110A - 液晶显示器的阵列基板 - Google Patents

液晶显示器的阵列基板 Download PDF

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CN104423110A
CN104423110A CN201310407236.2A CN201310407236A CN104423110A CN 104423110 A CN104423110 A CN 104423110A CN 201310407236 A CN201310407236 A CN 201310407236A CN 104423110 A CN104423110 A CN 104423110A
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public electrode
base palte
array base
liquid crystal
crystal display
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CN104423110B (zh
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蔡五柳
高逸群
林欣桦
施博理
李志隆
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Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
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New Photoelectric Technology Co ltd
Ye Xin Technology Consulting Co Ltd
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    • H01L27/1255Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
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    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer

Abstract

本发明提供了一种液晶显示器的阵列基板,包括一存储电容,该存储电容包括一第一公共电极、一设置在该第一公共电极上的第一保护层与一设置在第一保护层上的像素电极,一设置在像素电极上的第二保护层与一设置在第二保护层上的第二公共电极。该第二公共电极具有多数个狭缝,且与第一公共电极电连接。本发明提供的阵列基板可提高单位面积的存储电容,适用于高分辨率的液晶显示器。

Description

液晶显示器的阵列基板
技术领域
本发明涉及一种液晶显示器,尤其涉及一种液晶显示器的阵列基板。
背景技术
目前,显示器市场上的边缘电场(Fringe Field Switching,FFS) 型液晶显示器广受欢迎。该边缘场电场型液晶显示器是在阵列基板上形成像素电极与公共电极,对该像素电极与该公共电极之间施加电压,使之产生边缘电场以在与该阵列基板基本平行的面内驱动液晶分子。这种液晶显示器具有广视角、低色偏及高开口率的特性。
近年来,市场对显示器的分辨率的要求越来越高。为了提高分辨率,需提高液晶显示器阵列基板的像素密度。然而,像素密度越大,存储电容值则越小,存储电容的不足将引起液晶显示器的质量下降,例如在显示画面中产生闪烁(flicker)或串扰(cross-talk)等不良现象。
现有技术中阵列基板的存储电容由公共电极、像素电极及夹设于两者之间的绝缘层构成,其电容按如下公式计算:
CST=εA/d
上述公式中,CST表示存储电容值,ε表示绝缘层的介电常数,A表示像素电极与公共电极的有效面积,d表示绝缘层的厚度。因此,该存储电容的电容值CST与有效面积A成正比,与厚度d成反比。为了实现高分辨率,先前技术的做法是减薄绝缘层的厚度,然而,由于制程控能力有限,并不能过度减薄绝缘层的厚度。
发明内容
鉴于以上内容,有必要提供一种液晶显示器阵列基板,其可以在提高阵列基板分辨率的情况下,增大存储电容值。
本发明提供一种液晶显示器的阵列基板,包括一存储电容,该存储电容包括一第一公共电极、一设置在该第一公共电极上的第一保护层与一设置在第一保护层上的像素电极,其中该存储电容还包括一设置在像素电极上的第二保护层与一设置在第二保护层上的第二公共电极,该第二公共电极具有多数个狭缝,且与第一公共电极电连接。
相较于现有技术,根据本发明提供的阵列基板以增加单位面积存储电容的方式,增加了阵列基板设计的灵活度与制程边界(process window),尤其可适用于高分辨率的液晶显示器。对于液晶显示器而言,即使为了提高分辨率而增大像素密度,也不会因存储电容不足而影响显示质量。
附图说明
图1为本发明提供的第一实施方式的液晶显示器阵列基板的俯视图。
图2为图1中所示的阵列基板沿线Ⅱ-Ⅱ的剖示图。
图3为图1中所示的部分阵列基板中三层电极结构的示意图。
图4为图1中所示的阵列基板公共电极接垫区的剖示图。
图5为图1中所示的阵列基板沿线Ⅳ-Ⅳ的剖示图。
图6为本发明提供的第二实施方式中阵列基板的俯视图。
图7为图6中所示的部分阵列基板中三层电极结构的示意图。
图8为本发明提供的第三实施方式中阵列基板的俯视图。
图9为本发明提供的第四实施方式中阵列基板的俯视图。
主要元件符号说明
阵列基板 100、200、300、400
存储电容 10
扫描线 GL
数据线 DL
公共电极线 CL
基板 110
TFT 120
栅极 121
栅极绝缘层 122
通道层 123
源极 124
漏极 125
钝化层 130
平坦层 140
第一公共电极 150、250
第一保护层 160
像素电极 170、270
第二保护层 180
第二公共电极 190、290、390、490
狭缝 192、392、492
第一开孔 141
第二开孔 151
第三开孔 161
第四开孔 191
通孔 182
平板状公共电极 252
第一公共电极连接部 253
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
将参照附图表述根据本发明的实施例用于液晶显示器的阵列基板。
图1是本发明第一实施方式的部分液晶显示器阵列基板100的俯视图。本实施方式中液晶显示器是FFS型液晶显示器。该阵列基板100包括多条平行排列的扫描线GL与多条平行排列的数据线DL,该扫描线GL与该数据线DL交叉以限定多个子像素。每个子像素中包括一薄膜晶体管(TFT)120与一像素电极170。其中,像素电极170为平板状电极,分别位于每个子像素中,并与TFT 120电连接。
阵列基板100还包括第一公共电极150与第二公共电极190。本实施方式中,该阵列基板100共包括三层电极结构。其中,第一公共电极150与第二公共电极190重迭,且都覆盖所有的子像素。第二公共电极190位于第一公共电极150上方,第一公共电极150为平板状电极。第二公共电极190具有多个平行排列的狭缝192,使得第二公共电极190与像素电极170之间可形成边缘电场,以驱动液晶(未绘出)旋转。请参照图1,该狭缝192为条型,但并不限于此,该狭缝192还可以是“<”字型或其它弯折形状。在该实施方式中,狭缝192与数据线DL均不与扫描线GL垂直。
图2是图1中阵列基板100沿线Ⅱ-Ⅱ的剖面图。如图2所示,阵列基板100包括基板110、TFT 120、钝化层130、平坦层140、第一公共电极150、第一保护层160、像素电极170以及第二公共电极190。其中,TFT 120设置于基板110上。每一TFT 120包括栅极121、栅极绝缘层122、通道层123、源极124与漏极125。栅极121位于基板110上,栅极绝缘层122覆盖栅极121与基板110,通道层123位于该栅极绝缘层122上方,并对应栅极121上方设置。源极124与漏极125分别位于通道层123两侧并彼此分离。请同时参照图1与图2。在该实施方式中,TFT 120的栅极121凸出于扫描线GL之外。源极124包含在数据线DL中,大致呈马蹄形状(C),并与栅极121重迭。漏极125与源极124相对设置,并与栅极121部分重迭。当然,TFT 120的形状并不限于此,也可以为其它形状。在每个子像素中,数据线DL以一定的角度与扫描线倾斜交错设置,并包括马蹄形状的源极124。
钝化层130覆盖TFT 120与基板110,平坦层140覆盖钝化层130。本实施方式中,平坦层140的材质是有机材料,与钝化层130相比,其厚度较厚,起到平坦化的作用。平坦层140与钝化层130具有第一开孔141,露出部分漏极125。
为使漏极125与像素电极170连接,第一公共电极150开设有第二开孔151,该第二开孔151位于第一开孔141上方且大于第一开孔141。第一保护层160具有第三开孔161,第三开孔161位于第一开孔141与第二开孔151中并露出部分漏极125,像素电极170位于第一保护层上方,并通过第三开孔161与漏极125电连接。
第二保护层180位于像素电极170上方,并覆盖该像素电极170。第二公共电极190位于第二保护层180上方,并具有第四开孔191,第四开孔191与第二开孔151重迭,且大小一致。由于该第二公共电极190具有第四开孔191,可避免第二公共电极190与像素电极170之间发生短路(short)。
图3是图1中部分阵列基板100所包含的三层电极结构的示意图。如图3所示,第一公共电极150为一整面连续的电极,连续覆盖所有子像素,并在每个子像素中均开设有第二开孔151。多个像素电极170为不连续分布的平板状电极,每个像素电极170分别设于每个子像素中。第二公共电极190也是连续覆盖所有子像素的一整面电极,与第一公共电极150重迭。第二公共电极190对应每个子像素开设有第四开孔191。第四开孔191优选与第二开孔151在垂直面板的方向完全重迭。另外,第二公共电极190在每个子像素中还具有多个如图2所示的狭缝192。相邻两行的子像素中,第二公共电极190的狭缝192的倾斜方向是对称的,因此,相邻两行的子像素所对应的液晶会形成两种不同的配向。
请参照图4,图4是该阵列基板100周边区域的公共电极接垫区(pad)的剖示图。该阵列基板100包括一公共电极线CL,该公共电极线CL位于该基板110上。该第一公共电极150与第二公共电极190之间夹有第一保护层160与第二保护层180,该第一保护层160与该第二保护层180具有通孔182,以露出部分第一公共电极150,使该第二公共电极190通过该通孔182与该第一公共电极150电连接。该第一公共电极150与该公共电极线CL电连接,以接入公共电极讯号。第一公共电极可通过一位于公共电极线CL上方的金属层126与公共电极线CL电连接,也可直接与公共电极线CL电连接。该金属层126与数据线DL、源极124与漏极125的材质相同,并位于同一金属层。
请参照图5,图5是图1中的阵列基板100沿线Ⅳ-Ⅳ的剖面图。图5示出了该阵列基板100的存储电容10的结构。该存储电容10位于平坦层140上,包括第一公共电极150、设置在该第一公共电极150上的第一保护层160与设置在第一保护层160上的像素电极170、设置在像素电极170上的第二保护层180与设置在第二保护层180上的第二公共电极190。像素电极170、该第一公共电极150与该第二公共电极190的材质是导电材料,例如氧化铟锡(ITO)或者氧化铟锌(IZO)。该第一保护层与该第二保护层的材质是绝缘材料,例如氧化硅(SiOX)或者氮化硅(SiNx)。
第一公共电极150与像素电极170部分重迭,形成第一存储电容;第二公共电极190与像素电极170部分重迭,形成第二存储电容。第一存储电容与第二存储电容并联,相较于先前技术,公共电极与像素电极之间仅有一种存储电容,因此,该阵列基板100单位面积的存储电容值较大。换句话说,在保持像素电极与公共电极有效面积不变的情况下,本发明提供的阵列基板100的单位面积的存储电容值较大。
该阵列基板100藉由增加一层第二公共电极190,可以增加单位面积的存储电容,并且不需要减薄电极之间绝缘层的厚度,因此,增加了阵列基板100的设计灵活度与制程边界,尤其可适用于高分辨率的液晶显示器。对于液晶显示器而言,即使为了提高分辨率,增大像素密度,也不会因存储电容不足而影响显示质量,避免产生闪烁或串扰等不良现象。另外,没有开口的第一公共电极150位于像素电极170下方,可以有效遮蔽数据线DL的电场,减少数据线DL与像素电极170的电场耦合,从而可避免串扰,提高显示质量。
图6是本发明提供的第二实施方式中的阵列基板200。图7是图6中部分阵列基板200所包括的三层电极的示意图。请同时参考图6与图7。阵列基板200与阵列基板100的结构相似,都包括三层电极结构,分别是第一公共电极250、像素电极270与第二公共电极290。阵列基板200与阵列基板100的差异在于:第一公共电极250重叠在数据线DL上方的部分基本被省略,即第一公共电极250仅覆盖部分数据线DL。本实施方式中,第一公共电极250重迭在数据线DL上方的部分完全被省略。由于第一公共电极250与数据线DL重迭的面积较小,如此可以降低第一公共电极250与数据线DL之间的寄生电容。具体而言,第一公共电极250包括位于每个子像素中的平板状公共电极252以及每一列相邻子像素之间的第一公共电极连接部253。该多个平板状公共电极252经第一公共电极连接部253串接后基本平行扫描线方向延伸。位于子像素中的平板状公共电极252与数据线DL相互不重迭。每条第一公共电极连接部253基本平行扫描线GL延伸且与数据线DL绝缘交叉,使得每条第一公共电极连接部253覆盖数据线DL的面积较少。
本发明第二实施方式中的阵列基板200所包含的第一公共电极连接部253位于每一列相邻的子像素之间,但本发明并不限于此,每一行相邻的子像素之间也可设置第一公共电极连接部,使每一行相邻的子像素所对应的第一公共电极连接。
以上仅为本发明的两种实施方式,阵列基板100、200中的一个子像素对应的液晶层都仅形成一种配向方向,位于相邻两行的两个子像素对应的液晶层则形成不同的配向方向,因此,该液晶显示器的阵列基板100、200对应的液晶层均包括两种配向方向,广视角效果更佳。
图8是本发明第三实施方式的阵列基板300的俯视图。阵列基板300与阵列基板100的结构相似,差异在于:数据线DL及第二公共电极390的狭缝392为“<”字型,因此,一个子像素对应的液晶层包括两种配向方向。该阵列基板300同样可以达到广视角效果。
图9是本发明第四实施方式的阵列基板400的俯视图。阵列基板400与阵列基板100的结构相似,差异在于:该数据线DL与第二公共电极490的狭缝492是都直条状且与扫描线GL基本垂直,第二公共电极490的狭缝492为条型狭缝。因此,一个子像素对应的液晶层仅包括一种配向方向,该阵列基板400对应的液晶层也仅包括一种配向方向。
本发明阵列基板中的TFT可以是非晶硅型TFT,也可以是金属氧化物半导体薄膜晶体管,或者低温多晶硅型薄膜晶体管。
本发明提供的液晶显示器的阵列基板,藉由设置两层公共电极层,可以增加单位面积的存储电容,并且不需要减薄电极之间绝缘层的厚度,因此,增加了阵列基板的设计灵活度与制程边界,尤其可适用于高分辨率的液晶显示器。对于液晶显示器而言,即使为了提高分辨率,增大像素密度,也不会因存储电容不足而影响显示质量,避免产生闪烁或串扰等不良现象。
本领域的普通技术人员应当理解,其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的精神和范围。

Claims (14)

1.一种液晶显示器的阵列基板,包括一存储电容,该存储电容包括一第一公共电极、一设置在该第一公共电极上的第一保护层与一设置在第一保护层上的像素电极,其改良在于:该存储电容还包括一设置在像素电极上的第二保护层与一设置在第二保护层上的第二公共电极,该第二公共电极具有多数个狭缝,且与该第一公共电极电连接。
2.如权利要求1所述的液晶显示器的阵列基板,其特征在于:该阵列基板还包括一基板、一薄膜晶体管设置于该基板上、一钝化层覆盖该薄膜晶体管与该基板,以及一平坦层覆盖该钝化层。
3.如权利要求2所述的液晶显示器的阵列基板,其特征在于:该存储电容位于该平坦层上。
4.如权利要求2所述的液晶显示器的阵列基板,其特征在于:该平坦层与该钝化层具有第一开孔以露出部分薄膜晶体管,该第一公共电极具有第二开孔,该第二开孔位于第一开孔上方且大于第一开孔,该第一保护层具有第三开孔,该第三开孔位于该第一开孔与该第二开孔中并露出部分该薄膜晶体管。
5.如权利要求4所述的液晶显示器的阵列基板,其特征在于:该像素电极通过该第三开孔与该薄膜晶体管电连接。
6.如权利要求4所述的液晶显示器的阵列基板,其特征在于:该第二公共电极具有第四开孔,该第四开孔与该第二开孔重迭且大小一致。
7.如权利要求1所述的液晶显示器的阵列基板,其特征在于该第一公共电极与该像素电极之间形成第一存储电容,该第二公共电极与该像素电极之间形成第二存储电容。
8.如权利要求1所述的液晶显示器的阵列基板,其特征在于:该第一公共电极与该第二公共电极电性连接。
9.如权利要求1所述的液晶显示器的阵列基板,其特征在于:该阵列基板还包括多条扫描线、多条数据线与该多条扫描线交叉以限定多个子像素。
10.如权利要求9所述的液晶显示器的阵列基板,其特征在于:其中该像素电极为平板状电极且分别位于每个子像素中。
11.如权利要求9所述的液晶显示器的阵列基板,其特征在于:该第一公共电极为平板状电极且连续覆盖所有子像素。
12.如权利要求9所述的液晶显示器的阵列基板,其特征在于:该第二公共电极与该第一公共电极重迭,且连续覆盖所有子像素。
13.如权利要求9所述的液晶显示器的阵列基板,其特征在于:该第一公共电极包括位于子像素中的平板状公共电极以及位于相邻子像素之间的第一公共电极连接部,位于子像素中的平板状公共电极与数据线相互不重迭。
14.如权利要求13所述的液晶显示器的阵列基板,其特征在于:该第一公共电极连接部重迭覆盖部分该数据线。
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