CN104270885A - 具有聚合物基质的插件框架及其制造方法 - Google Patents
具有聚合物基质的插件框架及其制造方法 Download PDFInfo
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- CN104270885A CN104270885A CN201410498486.6A CN201410498486A CN104270885A CN 104270885 A CN104270885 A CN 104270885A CN 201410498486 A CN201410498486 A CN 201410498486A CN 104270885 A CN104270885 A CN 104270885A
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/224—Housing; Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
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- H—ELECTRICITY
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- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/33—Thin- or thick-film capacitors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L28/60—Electrodes
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/269,884 | 2014-05-05 | ||
| US14/269,884 US20150296617A1 (en) | 2014-04-09 | 2014-05-05 | Interposer frame with polymer matrix and methods of fabrication |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104270885A true CN104270885A (zh) | 2015-01-07 |
Family
ID=52162346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410498486.6A Pending CN104270885A (zh) | 2014-05-05 | 2014-09-25 | 具有聚合物基质的插件框架及其制造方法 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2015213152A (ko) |
| KR (2) | KR101670666B1 (ko) |
| CN (1) | CN104270885A (ko) |
| TW (1) | TWI652864B (ko) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101951284B1 (ko) * | 2017-07-04 | 2019-02-22 | 주식회사 이노글로벌 | 초정밀 가공기술을 활용한 검사용 인터포저 지지 프레임의 제조방법 |
| JP7068460B2 (ja) | 2018-07-25 | 2022-05-16 | 株式会社Fuji | 決定装置及びこれを備えるチップ装着装置 |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040042140A1 (en) * | 2002-09-03 | 2004-03-04 | United Test Center Inc. | Double-sided thermally enhanced IC chip package |
| CN101241861A (zh) * | 2006-06-01 | 2008-08-13 | Amitec多层互连技术有限公司 | 新型多层无芯支撑结构及其制作方法 |
| US20100013081A1 (en) * | 2008-07-18 | 2010-01-21 | United Test And Assembly Center Ltd. | Packaging structural member |
| US20120228754A1 (en) * | 2011-03-08 | 2012-09-13 | Georgia Tech Research Corporation | Chip-last embedded interconnect structures and methods of making the same |
| CN102792520A (zh) * | 2010-03-03 | 2012-11-21 | 株式会社村田制作所 | 无线通信模块以及无线通信设备 |
| CN103187365A (zh) * | 2012-06-25 | 2013-07-03 | 珠海越亚封装基板技术股份有限公司 | 多层电子支撑结构的层间对准 |
| CN104332414A (zh) * | 2014-04-09 | 2015-02-04 | 珠海越亚封装基板技术股份有限公司 | 嵌入式芯片的制造方法 |
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| JP2003229656A (ja) * | 2002-02-04 | 2003-08-15 | Nec Access Technica Ltd | はんだパターン形成方法及び多面取り回路基板 |
| JP5127315B2 (ja) * | 2007-06-22 | 2013-01-23 | パナソニック株式会社 | 部品内蔵モジュール |
| JP5280079B2 (ja) * | 2008-03-25 | 2013-09-04 | 新光電気工業株式会社 | 配線基板の製造方法 |
| JP4343254B1 (ja) * | 2008-06-02 | 2009-10-14 | 株式会社東芝 | 多層プリント配線基板 |
| JP5617846B2 (ja) * | 2009-11-12 | 2014-11-05 | 日本電気株式会社 | 機能素子内蔵基板、機能素子内蔵基板の製造方法、及び、配線基板 |
| JP4978709B2 (ja) * | 2010-03-12 | 2012-07-18 | 大日本印刷株式会社 | 電子部品内蔵配線基板 |
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| JP5189672B2 (ja) * | 2011-09-01 | 2013-04-24 | 株式会社フジクラ | 部品内蔵基板およびその製造方法 |
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| JP6152254B2 (ja) * | 2012-09-12 | 2017-06-21 | 新光電気工業株式会社 | 半導体パッケージ、半導体装置及び半導体パッケージの製造方法 |
| JP2014072279A (ja) * | 2012-09-28 | 2014-04-21 | Dainippon Printing Co Ltd | 部品内蔵配線基板の製造方法 |
| WO2014065035A1 (ja) * | 2012-10-22 | 2014-05-01 | 株式会社村田製作所 | 電子部品内蔵モジュール |
| JP5400235B1 (ja) * | 2012-11-09 | 2014-01-29 | 太陽誘電株式会社 | 電子部品内蔵基板 |
-
2014
- 2014-09-25 CN CN201410498486.6A patent/CN104270885A/zh active Pending
- 2014-09-26 TW TW103133412A patent/TWI652864B/zh active
- 2014-09-29 KR KR1020140129904A patent/KR101670666B1/ko active IP Right Grant
- 2014-12-10 JP JP2014250272A patent/JP2015213152A/ja active Pending
-
2016
- 2016-09-21 KR KR1020160120381A patent/KR101770148B1/ko active IP Right Grant
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040042140A1 (en) * | 2002-09-03 | 2004-03-04 | United Test Center Inc. | Double-sided thermally enhanced IC chip package |
| CN101241861A (zh) * | 2006-06-01 | 2008-08-13 | Amitec多层互连技术有限公司 | 新型多层无芯支撑结构及其制作方法 |
| US20100013081A1 (en) * | 2008-07-18 | 2010-01-21 | United Test And Assembly Center Ltd. | Packaging structural member |
| CN102792520A (zh) * | 2010-03-03 | 2012-11-21 | 株式会社村田制作所 | 无线通信模块以及无线通信设备 |
| US20120228754A1 (en) * | 2011-03-08 | 2012-09-13 | Georgia Tech Research Corporation | Chip-last embedded interconnect structures and methods of making the same |
| CN103187365A (zh) * | 2012-06-25 | 2013-07-03 | 珠海越亚封装基板技术股份有限公司 | 多层电子支撑结构的层间对准 |
| CN104332414A (zh) * | 2014-04-09 | 2015-02-04 | 珠海越亚封装基板技术股份有限公司 | 嵌入式芯片的制造方法 |
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| Publication number | Publication date |
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| KR20160114016A (ko) | 2016-10-04 |
| KR101670666B1 (ko) | 2016-10-31 |
| JP2015213152A (ja) | 2015-11-26 |
| KR101770148B1 (ko) | 2017-08-22 |
| KR20150126764A (ko) | 2015-11-13 |
| TW201543776A (zh) | 2015-11-16 |
| TWI652864B (zh) | 2019-03-01 |
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