CN104204992B - 具有内置电平移位器及可编程上升边缘和脉冲宽度的脉冲时钟产生逻辑 - Google Patents
具有内置电平移位器及可编程上升边缘和脉冲宽度的脉冲时钟产生逻辑 Download PDFInfo
- Publication number
- CN104204992B CN104204992B CN201380016930.XA CN201380016930A CN104204992B CN 104204992 B CN104204992 B CN 104204992B CN 201380016930 A CN201380016930 A CN 201380016930A CN 104204992 B CN104204992 B CN 104204992B
- Authority
- CN
- China
- Prior art keywords
- pulse
- clock
- pulse clock
- rising edge
- delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Pulse Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/433,891 | 2012-03-29 | ||
| US13/433,891 US8638153B2 (en) | 2012-03-29 | 2012-03-29 | Pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width |
| PCT/US2013/034414 WO2013149040A1 (en) | 2012-03-29 | 2013-03-28 | A pulse clock generation logic with built-in level shifter and programmable rising edge and pulse width |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104204992A CN104204992A (zh) | 2014-12-10 |
| CN104204992B true CN104204992B (zh) | 2017-05-17 |
Family
ID=48083683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380016930.XA Expired - Fee Related CN104204992B (zh) | 2012-03-29 | 2013-03-28 | 具有内置电平移位器及可编程上升边缘和脉冲宽度的脉冲时钟产生逻辑 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8638153B2 (enExample) |
| EP (1) | EP2831694B1 (enExample) |
| JP (1) | JP6242852B2 (enExample) |
| KR (1) | KR20140139595A (enExample) |
| CN (1) | CN104204992B (enExample) |
| WO (1) | WO2013149040A1 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BR122016006764B1 (pt) | 2013-03-15 | 2022-02-01 | Intel Corporation | Aparelhos e métodos de memória |
| CN104680991B (zh) * | 2015-03-03 | 2017-03-08 | 深圳市华星光电技术有限公司 | 用于goa架构液晶面板的电平移位电路及电平移位方法 |
| KR102295058B1 (ko) | 2015-08-19 | 2021-08-31 | 삼성전자주식회사 | 반도체 메모리 시스템 및 반도체 메모리 장치 및 반도체 메모리 장치의 동작방법 |
| US9564901B1 (en) | 2015-12-17 | 2017-02-07 | Apple Inc. | Self-timed dynamic level shifter with falling edge generator |
| CN106940423B (zh) * | 2016-01-05 | 2023-02-24 | 华润微集成电路(无锡)有限公司 | 多功能芯片内置的测试电路 |
| US9607674B1 (en) * | 2016-01-06 | 2017-03-28 | Qualcomm Incorporated | Pulse latch reset tracking at high differential voltage |
| US10163508B2 (en) | 2016-02-26 | 2018-12-25 | Intel Corporation | Supporting multiple memory types in a memory slot |
| US10615796B2 (en) * | 2016-07-29 | 2020-04-07 | Qualcomm Incorporated | Level shifter |
| US10163474B2 (en) * | 2016-09-22 | 2018-12-25 | Qualcomm Incorporated | Apparatus and method of clock shaping for memory |
| US9990984B1 (en) | 2016-12-06 | 2018-06-05 | Qualcomm Incorporated | Pulse-stretcher clock generator circuit for high speed memory subsystems |
| CN106941347B (zh) * | 2017-03-17 | 2019-08-06 | 中国电子科技集团公司第二十四研究所 | 占空比调节装置及方法 |
| US10389335B1 (en) | 2018-05-04 | 2019-08-20 | Apple Inc. | Clock pulse generation circuit |
| US10790826B1 (en) * | 2019-05-19 | 2020-09-29 | Novatek Microelectronics Corp. | Level shifter with low power consumption |
| US11972834B2 (en) * | 2019-11-11 | 2024-04-30 | Qualcomm Incorporated | Low power and robust level-shifting pulse latch for dual-power memories |
| CN114006605B (zh) * | 2021-12-31 | 2022-05-10 | 峰岹科技(深圳)股份有限公司 | 单边沿延时电路 |
| US12340864B2 (en) * | 2022-02-11 | 2025-06-24 | Synopsys, Inc. | Interface level-shifter dual-rail memory architecture |
| CN118538263A (zh) * | 2024-07-25 | 2024-08-23 | 中科亿海微电子科技(苏州)有限公司 | 一种对fpga bram读写冲突的时序控制方法及电路 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2544466Y (zh) * | 2002-01-25 | 2003-04-09 | 威盛电子股份有限公司 | 无突波干扰的时钟脉冲输出电路 |
| US6850460B1 (en) * | 2004-05-12 | 2005-02-01 | International Business Machines Corporation | High performance programmable array local clock generator |
| CN101847991A (zh) * | 2009-03-27 | 2010-09-29 | 台湾积体电路制造股份有限公司 | 时钟脉冲产生器、存储器电路及产生内部时钟脉冲信号的方法 |
| CN102246236A (zh) * | 2008-12-17 | 2011-11-16 | 高通股份有限公司 | 使用多个电压域的电路中的信号路径延迟的自调谐 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5027323A (en) | 1988-01-14 | 1991-06-25 | Hitachi, Ltd. | Write pulse signal generating circuit for a semiconductor memory device |
| US6072348A (en) * | 1997-07-09 | 2000-06-06 | Xilinx, Inc. | Programmable power reduction in a clock-distribution circuit |
| US5929684A (en) * | 1998-03-06 | 1999-07-27 | Siemens Aktiengesellschaft | Feedback pulse generators |
| JP2003030991A (ja) * | 2001-07-12 | 2003-01-31 | Sanyo Electric Co Ltd | メモリ |
| US6975154B1 (en) * | 2003-04-29 | 2005-12-13 | Altera Corporation | Reduced power consumption clock network |
| JP4173887B2 (ja) * | 2003-08-13 | 2008-10-29 | 富士通株式会社 | パルス生成回路 |
| US7180353B2 (en) | 2005-02-03 | 2007-02-20 | Mediatek Incorporation | Apparatus and method for low power clock distribution |
| US7609583B2 (en) | 2007-11-12 | 2009-10-27 | Micron Technology, Inc. | Selective edge phase mixing |
| US8102720B2 (en) | 2009-02-02 | 2012-01-24 | Qualcomm Incorporated | System and method of pulse generation |
-
2012
- 2012-03-29 US US13/433,891 patent/US8638153B2/en not_active Expired - Fee Related
-
2013
- 2013-03-28 JP JP2015503586A patent/JP6242852B2/ja not_active Expired - Fee Related
- 2013-03-28 WO PCT/US2013/034414 patent/WO2013149040A1/en not_active Ceased
- 2013-03-28 EP EP13715579.2A patent/EP2831694B1/en not_active Not-in-force
- 2013-03-28 KR KR1020147029964A patent/KR20140139595A/ko not_active Withdrawn
- 2013-03-28 CN CN201380016930.XA patent/CN104204992B/zh not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2544466Y (zh) * | 2002-01-25 | 2003-04-09 | 威盛电子股份有限公司 | 无突波干扰的时钟脉冲输出电路 |
| US6850460B1 (en) * | 2004-05-12 | 2005-02-01 | International Business Machines Corporation | High performance programmable array local clock generator |
| CN102246236A (zh) * | 2008-12-17 | 2011-11-16 | 高通股份有限公司 | 使用多个电压域的电路中的信号路径延迟的自调谐 |
| CN101847991A (zh) * | 2009-03-27 | 2010-09-29 | 台湾积体电路制造股份有限公司 | 时钟脉冲产生器、存储器电路及产生内部时钟脉冲信号的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2831694B1 (en) | 2017-08-23 |
| JP6242852B2 (ja) | 2017-12-06 |
| US8638153B2 (en) | 2014-01-28 |
| WO2013149040A1 (en) | 2013-10-03 |
| EP2831694A1 (en) | 2015-02-04 |
| CN104204992A (zh) | 2014-12-10 |
| KR20140139595A (ko) | 2014-12-05 |
| JP2015520434A (ja) | 2015-07-16 |
| US20130257498A1 (en) | 2013-10-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170517 |
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| CF01 | Termination of patent right due to non-payment of annual fee |