CN104022079A - 薄膜晶体管基板的制造方法 - Google Patents

薄膜晶体管基板的制造方法 Download PDF

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CN104022079A
CN104022079A CN201410277297.6A CN201410277297A CN104022079A CN 104022079 A CN104022079 A CN 104022079A CN 201410277297 A CN201410277297 A CN 201410277297A CN 104022079 A CN104022079 A CN 104022079A
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layer
film transistor
thin film
base plate
manufacture method
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李文辉
曾志远
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201410277297.6A priority Critical patent/CN104022079A/zh
Priority to PCT/CN2014/081433 priority patent/WO2015192397A1/zh
Priority to US14/381,920 priority patent/US9685471B2/en
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Abstract

本发明提供一种薄膜晶体管基板的制造方法,在同一道光刻制程中同时对栅极绝缘层进行过孔处理及图案化刻蚀阻挡层,即栅绝缘层成膜后,先不进行光刻制程,直接线制作氧化物半导体图案,然后在刻蚀阻挡层成膜后,栅绝缘层过孔与刻蚀阻挡层图案化合并为同一道光刻制程,与现有的薄膜晶体管基板的制造方法相比,可减少一道光刻制程,提高了制备效率。同时通过在透明导电层上开口,提高了开口率。

Description

薄膜晶体管基板的制造方法
技术领域
本发明涉及平面显示领域,尤其涉及一种薄膜晶体管基板的制造方法。
背景技术
平面显示器件具有机身薄、省电、无辐射等众多优点,得到了广泛的应用。现有的平面显示器件主要包括液晶显示器件(Liquid Crystal Display,LCD)及有机电致发光显示器件(Organic Light Emitting Display,OLED)。
有机电致发光器件由于同时具备自发光,不需背光源、对比度高、厚度薄、视角广、反应速度快、可用于挠曲性面板、使用温度范围广、构造及制程较简单等优异之特性,被认为是下一代的平面显示器新兴应用技术。OLED显示器件按照驱动类型可分为PM-OLED(无源OLED)和AM-OLED(有源OLED)。
AM-OLED的像素驱动电路通常采用TFT(Thin Film Transistor,薄膜场效应晶体管),AM-OLED的TFT基板通过需要2种TFT来驱动:开关晶体管与驱动晶体管,所述开关晶体管与驱动晶体管需通过GI via(栅极绝缘层过孔)桥接,GI via需额外一道光刻制程,包括成膜制程、黄光制程、蚀刻、剥离等制程工序。
氧化物半导体由于具有较高的电子迁移率(氧化物半导体迁移率>10cm2/Vs,非晶硅(a-Si)迁移率仅0.5~0.8cm2/Vs),而且相比低温多晶硅(LTPS),氧化物半导体制程简单,与非晶硅制程相容性较高,可以应用于液晶显示装置、有机发光显示装置、柔性显示(Flexible)等领域,且与高世代生产线兼容,可应用于大中小尺寸显示,具有良好的应用发展前景,为当前业界研究热门。
目前,常见的氧化物半导体薄膜晶体管有:刻蚀阻挡(Etch Stopper,ES)结构的氧化物半导体薄膜晶体管和背沟道(Back channel etching,BCE)结构的氧化物半导体薄膜晶体管。
当前较为成熟的结构是ESL(刻蚀阻挡层)结构,通常ESL的制作需额外一道光刻制程(包括成膜制程、黄光制程、蚀刻、剥离等制程工序),增加成本,降低良率。
请参阅图1,为现有的刻蚀阻挡结构的氧化物半导体薄膜晶体管的结构示意图,其在氧化物半导体层100形成后及金属源/漏电极200形成前,制作一层刻蚀阻挡层(Etch Stopper Layer,ESL)300,用于保护氧化物半导体层100,避免其在后续的制程(如金属源/漏电极200蚀刻等制程)中遭破坏,进而提升了氧化物半导体薄膜晶体管稳定性,但制作一层刻蚀阻挡层需增加一道光刻制程,一道光刻制程包括成膜、曝光、显影、蚀刻、剥离等工序,因而额外制作一层刻蚀阻挡层将大大增加生产成本,进而降低生产良率。
发明内容
本发明的目的在于提供一种薄膜晶体管基板的制造方法,在同一道光刻制程中同时对栅极绝缘层进行过孔处理及图案化刻蚀阻挡层,与现有的薄膜晶体管基板的制造方法相比,可减少一道光刻制程,提高了制备效率。同时通过在透明导电层上开口,提高了开口率。
为实现上述目的,本发明提供一种薄膜晶体管基板的制造方法,包括以下步骤:
步骤1、提供基板;
步骤2、在所述基板上沉积第一金属层,并图案化该第一金属层,以形成开关晶体管和驱动晶体管的栅极;
步骤3、在所述栅极与基板上沉积栅极绝缘层;
步骤4、在所述栅极绝缘层上沉积氧化物半导体层,并图案化所述氧化物半导体层;
步骤5、在所述栅极绝缘层和氧化物半导体层上沉积刻蚀阻挡层;
步骤6、采用一道光刻制程对栅极绝缘层进行过孔处理并图案化刻蚀阻挡层;
步骤7、在所述刻蚀阻挡层上形成源/漏极;
步骤8、在所述刻蚀阻挡层及源/漏极上依次形成保护层、平坦层;
步骤9、在所述平坦层及露出的部分源/漏极上形成透明导电层,并图案化该透明导电层;
步骤10、在所述平坦层及透明导电层上依次形成像素定义层及光阻间隙物。
所述基板为透明基板。
所述基板为玻璃基板。
所述步骤6中,所述光刻制程可采用半色调/灰色调进行曝光,曝光后进行干蚀刻或者灰化处理,并剥除光阻层,以形成预定图案的刻蚀阻挡层,并对栅极绝缘层进行过孔处理。
所述步骤6中,所述光刻制程也可采用常规方法进行曝光,曝光后进行干蚀刻,并剥除光阻层,以形成预定图案的刻蚀阻挡层,并对栅极绝缘层进行过孔处理。
所述步骤6中,所述过孔处理是通过将过孔处的栅极绝缘层、刻蚀阻挡层刻蚀掉,露出驱动晶体管的栅极。
所述氧化物半导体层为铟镓锌氧化物半导体层。
所述透明导电层由氧化铟锡制成。
所述步骤9中,在透明导电层上开口以提高开口率。
本发明的有益效果:本发明提供的一种薄膜晶体管基板的制造方法,在同一道光刻制程中同时对栅极绝缘层进行过孔处理及图案化刻蚀阻挡层,即栅绝缘层成膜后,先不进行光刻制程,直接线制作氧化物半导体图案,然后在刻蚀阻挡层成膜后,栅绝缘层过孔与刻蚀阻挡层图案化合并为同一道光刻制程,与现有的薄膜晶体管基板的制造方法相比,可减少一道光刻制程,提高了制备效率。同时通过在透明导电层上开口,提高了开口率。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为现有的具有刻蚀阻挡结构的氧化物半导体薄膜晶体管的结构示意图;
图2为本发明薄膜晶体管基板的制造方法的流程图;
图3至图10为本发明薄膜晶体管基板的制造方法的各步骤的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2,并参考图3至图10,本发明提供一种薄膜晶体管基板的制造方法,包括以下步骤:
步骤1、提供基板20。
所述基板20为透明基板,优选玻璃基板或塑料基板,在本实施例中,所述基板20为玻璃基板。
步骤2、在所述基板20上沉积第一金属层,并图案化该第一金属层,以形成开关晶体管(Switching TFT)和驱动晶体管(Driving TFT)的栅极21。
具体地,在所述基板20上通过沉积形成所述第一金属层,再通过掩模板或半掩模板对该第一金属层进行曝光、显影、蚀刻以形成预定图案的栅极21。
步骤3、在所述栅极21与基板20上沉积栅极绝缘层22。
所述栅极绝缘层22一般包括氧化硅、氮化硅其中之一或其组合。
步骤4、在所述栅极绝缘层22上沉积氧化物半导体层23,并图案化所述氧化物半导体层23。
所述氧化物半导体层23为IGZO(铟镓锌氧化物)半导体层。
所述氧化物半导体层23的形成方式与上述栅极22的形成方式类似,在此不作赘述。
步骤5、在所述栅极绝缘层22和氧化物半导体层23上沉积刻蚀阻挡层24。
步骤6、采用一道光刻制程对栅极绝缘层22进行过孔处理并图案化刻蚀阻挡层24。
具体的,所述光刻制程可采用半色调/灰色调进行曝光,曝光后进行干蚀刻或者灰化处理,并剥除光阻层,以形成预定图案的刻蚀阻挡层24,并对栅极绝缘层22进行过孔处理。
所述光刻制程也可采用常规方法进行曝光,曝光后进行干蚀刻,并剥除光阻层,以形成预定图案的刻蚀阻挡层24,并对栅极绝缘层22进行过孔处理。
所述过孔处理是通过将过孔处的栅极绝缘层22、刻蚀阻挡层24刻蚀掉,露出驱动晶体管的栅极21。
步骤7、在所述刻蚀阻挡层24上形成源/漏极25。
所述源/漏极25的形成方式与上述栅极22的形成方式类似,在此不作赘述。
步骤8、在所述刻蚀阻挡层24及源/漏极25上依次形成保护层26、平坦层27。
所述保护层26、平坦层27的形成方式与上述栅极22的形成方式类似,在此不作赘述。
步骤9、在所述平坦层27及露出的部分源/漏极24上形成透明导电层28,并图案化该透明导电层28。
所述透明导电层28由氧化铟锡制成,其形成方式与上述栅极22的形成方式类似,在此不作赘述。
具体的,在透明导电层28上开口以提高开口率。
步骤10、在所述平坦层27及透明导电层28上依次形成像素定义层29及光阻间隙物30。
所述像素定义层29及光阻间隙物30的形成方式与上述栅极22的形成方式类似,在此不作赘述。
综上所述,本发明提供的一种薄膜晶体管基板的制造方法,在同一道光刻制程中同时进行过孔处理及蚀刻阻挡层,即栅绝缘层成膜后,先不进行光刻制程,直接线制作氧化物半导体图案,然后在刻蚀阻挡层成膜后,栅绝缘层过孔与刻蚀阻挡层图案化合并为同一道光刻制程,与现有的薄膜晶体管基板的制造方法相比,可减少一道光刻制程,提高了制备效率。同时通过在透明导电层上开口,提高了开口率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (9)

1.一种薄膜晶体管基板的制造方法,其特征在于,包括以下步骤:
步骤1、提供基板(20);
步骤2、在所述基板(20)上沉积第一金属层,并图案化该第一金属层,以形成开关晶体管和驱动晶体管的栅极(21);
步骤3、在所述栅极(21)与基板(20)上沉积栅极绝缘层(22);
步骤4、在所述栅极绝缘层(22)上沉积氧化物半导体层(23),并图案化所述氧化物半导体层(23);
步骤5、在所述栅极绝缘层(22)和氧化物半导体层(23)上沉积刻蚀阻挡层(24);
步骤6、采用一道光刻制程对栅极绝缘层(22)进行过孔处理并图案化刻蚀阻挡层(24);
步骤7、在所述刻蚀阻挡层(24)上形成源/漏极(25);
步骤8、在所述刻蚀阻挡层(24)及源/漏极(25)上依次形成保护层(26)、平坦层(27);
步骤9、在所述平坦层(27)及露出的部分源/漏极(25)上形成透明导电层(28),并图案化该透明导电层(28);
步骤10、在所述平坦层(27)及透明导电层(28)上依次形成像素定义层(29)及光阻间隙物(30)。
2.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述基板(20)为透明基板。
3.如权利要求2所述的薄膜晶体管基板的制造方法,其特征在于,所述基板(20)为玻璃基板。
4.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述步骤6中,所述光刻制程采用半色调/灰色调进行曝光,曝光后进行干蚀刻或者灰化处理,并剥除光阻层,以形成预定图案的刻蚀阻挡层(24),并对栅极绝缘层(22)进行过孔处理。
5.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述步骤6中,所述光刻制程进行曝光,曝光后进行干蚀刻,并剥除光阻层,以形成预定图案的刻蚀阻挡层(24),并对栅极绝缘层(22)进行过孔处理。
6.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述步骤6中,所述过孔处理是通过将过孔处的栅极绝缘层(22)、刻蚀阻挡层(24)刻蚀掉,露出驱动晶体管的栅极(21)。
7.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述氧化物半导体层(23)为铟镓锌氧化物半导体层。
8.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述透明导电层(28)由氧化铟锡制成。
9.如权利要求1所述的薄膜晶体管基板的制造方法,其特征在于,所述步骤9中,在透明导电层(28)上开口以提高开口率。
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