CN103943600B - 在芯片和基板之间的新型端接和连接 - Google Patents
在芯片和基板之间的新型端接和连接 Download PDFInfo
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- CN103943600B CN103943600B CN201410080786.2A CN201410080786A CN103943600B CN 103943600 B CN103943600 B CN 103943600B CN 201410080786 A CN201410080786 A CN 201410080786A CN 103943600 B CN103943600 B CN 103943600B
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
Abstract
一种将芯片贴附至基板的方法,所述基板具有外层,所述外层包括嵌入在如阻焊层的电介质中的通孔柱,所述通孔柱的端部与所述电介质齐平,所述方法包括以下步骤:(o)任选地移除有机清漆,(p)将包括端接有焊料凸点的引脚的芯片定位为接触所述通孔柱的暴露端部,和(q)加热熔融所述焊料凸点并使所述通孔的端部被焊料润湿。
Description
技术领域
本发明涉及端接互连结构以及在芯片和基板之间的连接。
背景技术
在对于越来越复杂的电子元件的小型化需求越来越大的带动下,诸如计算机和电信设备等消费电子产品的集成度越来越高。这已经导致要求支撑结构如IC基板和IC插件具有通过介电材料彼此电绝缘的高密度的多个导电层和通孔。
这种支撑结构的总体要求是可靠性和适当的电气性能、薄度、刚度、平整度、散热性好和有竞争力的单价。
在实现这些要求的各种途径中,一种广泛实施的创建层间互连通孔的制造技术是采用激光钻孔,所钻出的孔穿透后续布设的介电基板直到最后的金属层,后续填充金属,通常是铜,该金属通过镀覆技术沉积在其中。这种成孔方法有时也被称为“钻填”,由此产生的通孔可称为“钻填通孔”。
但是,钻填孔方法存在大量缺点。因为每个通孔需要单独钻孔,所以生产率受限,并且制造复杂的多通孔IC基板和插件的成本变得高昂。在大型阵列中,通过钻填方法难以生产出高密度和高品质、彼此紧密相邻且具有不同的尺寸和形状的通孔。此外,激光钻出的通孔具有穿过介电材料厚度的粗糙侧壁和内向锥度。该锥形减小了通孔的有效直径。特别是在超小通孔直径的情况下,也可能对于在先的导电金属层的电接触产生不利影响,由此导致可靠性问题。而且,在被钻的电介质是包括聚合物基质中的玻璃或陶瓷纤维的复合材料时,侧壁特别粗糙,并且这种粗糙度可能会导致产生杂散电感。
钻出的通孔的填充过程通常是通过铜电镀来完成的。在钻出的孔中进行电镀可能会导致凹痕,其中在通孔端部出现小坑。或者,当通孔通道被填充超过其容纳量的铜时,可能造成溢出,从而产生突出超过周围材料的半球形上表面。凹痕和溢出往往在如制造高密度基板和插件时所需的后续上下堆叠通孔时造成困难。此外,应该认识到,大的通孔通道难以均匀填充,特别是在其位于插件或IC基板设计的同一互连层内的小通孔附近时。
虽然可接受的尺寸和可靠性范围正在随着时间的推移而改善,但是上文所述的缺点是钻填技术的内在缺陷,并且会限制可制造的通孔的尺寸范围。还应该注意的是,激光钻孔是制造圆形通孔通道的最好方法。虽然理论上可以通过激光铣削制造狭缝形状的通孔通道,但是,实际上可制造的钻填孔的几何形状范围比较有限,并且在给定支撑结构中的通孔通常是圆柱形的并且基本相同。
通过钻填工艺制造通孔是昂贵的,并且难以利用相对具有成本效益的电镀工艺用铜来均匀和一致地填充由此形成的通孔通道。
在复合介电材料中激光钻出的通孔实际上被限制在60×10-6m的最小直径,并且由于所涉及的烧蚀过程以及所钻的复合材料的性质,甚至因此而遭受到显著的锥度形状以及粗糙侧壁的不利影响。
除了上文所述的激光钻孔的其它限制外,钻填技术的另一限制在于难以在同一层中产生不同直径的通孔,这是因为当钻出不同尺寸的通孔通道并随后用金属填充以制造不同尺寸通孔时,通孔通道的填充速率不同。因此,作为钻填技术的特征性的凹痕或溢出的典型问题被恶化,因为不可能对不同尺寸通孔同时优化沉积技术。
克服钻填方法的许多缺点的可选解决方案是利用又称为“图案镀覆(patternplating)”的技术,通过将铜或其它金属沉积到在光刻胶中形成的图案内来制造。
在图案镀覆中,首先沉积种子层。然后在其上沉积光刻胶层,随后曝光形成图案,并且选择性移除该图案以制成暴露出种子层的沟槽。通过将铜沉积到光刻胶沟槽中来形成通孔柱。然后移除剩余的光刻胶,蚀刻掉种子层,并在其上及其周围层压通常为聚合物浸渍玻璃纤维毡的介电材料,以包围所述通孔柱。然后,可以使用各种技术和工艺来减薄所述介电材料,将其一部分移除并暴露出所述通孔柱端部以允许由此导电接地,用于在其上构建下一金属层。可在其上通过重复该过程来沉积后续的金属导体层和通孔柱,以形成所需的多层结构。
在一个替代但紧密关联的技术即下文所称的“面板镀覆(panel plating)”中,将连续的金属层或合金层沉积到基板上。在基板端部沉积光刻胶层,并在其中显影出图案。剥除显影光刻胶的图案,选择性地暴露出其下的金属,该金属可随后被蚀刻掉。未显影的光刻胶保护其下方的金属不被蚀刻掉,并留下直立的特征结构和通孔的图案。
在剥除未显影的光刻胶后,在所述直立的铜特征结构和/或通孔柱上及其周围可以层压介电材料,如聚合物浸渍玻璃纤维毡。在平坦化后,可以通过重复上述过程在其上沉积后续的金属导体层和通孔柱以构建所需的多层结构。
通过上述图案镀覆或面板镀覆方法创建的通孔层通常被称为铜制的“通孔柱”和特征层。
应该认识到,微电子演化的一般推动力涉及制造更小、更薄、更轻和更大功率的高可靠性产品。使用厚且有芯的互连不能得到超轻薄的产品。为了在互连IC基板或“插件”中形成更高密度的结构,需要具有甚至更小连接的更多层。事实上,有时希望在彼此的端部上堆叠元件。
如果在铜或其它合适的牺牲基板上镀覆沉积层压结构,则可以蚀刻掉基板,留下独立的无芯层压结构。可以在预先附着在牺牲基板上的侧面上沉积其它层,由此能够形成双面累积,从而最大限度地减少翘曲并有助于实现平坦化。
一种制造高密度互连的灵活技术是构建由在介电基质中的具有各种几何形状和形式的金属通孔或通孔柱特征结构构成的图案或面板镀覆多层结构。所述金属可以是铜,所述电介质可以是纤维增强聚合物,通常使用的是具有高玻璃化转变温度(Tg)的聚合物,例如聚酰亚胺。这些互连可以是有芯的或无芯的,并可包括用于堆叠元件的空腔。它们可具有奇数或偶数层,并且所述通孔可具有非圆形形状。实现技术描述在授予Amitec-AdvancedMultilayer Interconnect Technologies Ltd.的现有专利中。
例如,赫尔维茨(Hurwitz)等人的题为“先进多层无芯支撑结构及其制造方法(Advanced multilayer coreless support structures and method for theirfabrication)”的美国专利US 7,682,972描述了一种制造包括在电介质中的通孔阵列的独立膜的方法,所述膜用作构建优异的电子支撑结构的前体。该方法包括以下步骤:在包围牺牲载体的电介质中制造导电通孔膜,和将所述膜与牺牲载体分离以形成独立的层压阵列。基于该独立膜的电子基板可通过将所述层压阵列减薄和平坦化,随后端接通孔来形成。该公报通过引用全文并入本文。
赫尔维茨(Hurwitz)等人的题为“用于芯片封装的无芯空腔基板及其制造方法(Coreless cavity substrates for chip packaging and their fabrication)”的美国专利US 7,669,320描述了一种制造IC支撑体的方法,所述IC支撑体用于支撑与第二IC芯片串联的第一IC芯片;所述IC支撑体包括在绝缘周围材料中的铜特征结构和通孔的交替层的堆叠,所述第一IC芯片可粘合至所述IC支撑体,所述第二IC芯片可粘合在所述IC支撑体内部的空腔中,其中所述空腔是通过蚀刻掉铜基座和选择性蚀刻掉累积的铜而形成的。该公报通过引用全文并入本文。
赫尔维茨(Hurwitz)等人的题为“集成电路支撑结构及其制造方法(integratedcircuit support structures and their fabrication)”的美国专利US7,635,641描述了一种制造电子基板的方法,包括以下步骤:(A)选择第一基础层;(B)将第一蚀刻阻挡层沉积到所述第一基础层上;(C)形成交替的导电层和绝缘层的第一半堆叠体,所述导电层通过贯穿绝缘层的通孔而互连;(D)将第二基础层施加到所述第一半堆叠体上;(E)将光刻胶保护涂层施加到第二基础层上;(F)蚀刻掉所述第一基础层;(G)移除所述光刻胶保护涂层;(H)移除所述第一蚀刻阻挡层;(I)形成交替的导电层和绝缘层的第二半堆叠体,导电层通过贯穿绝缘层的通孔而互连;其中所述第二半堆叠体具有与第一半堆叠体基本对称的构造;(J)将绝缘层施加到交替的导电层和绝缘层的所述第二半堆叠体上;(K)移除所述第二基础层,以及,(L)通过将通孔末端暴露在所述堆叠体的外表面上并对其施加端子来端接基板。该公报通过引用全文并入本文。
在美国专利US7,682,972、US 7,669,320和US 7,635,641中描述的通孔柱技术适合大规模生产,同时电镀极大数目的通孔。如上所述,现有技术的钻填通孔具有约60微米的最小有效直径。与之对比的是,利用光刻胶和电镀的通孔柱技术能够获得更高密度的通孔。通孔直径可以小到30微米,并且可以在同一层内共同制造不同几何形状和尺寸的通孔。
随着时间的推移,期望钻填技术和通孔柱沉积技术二者均能够制造进一步微型化并且具有更高密度的通孔和特征结构的基板。然而,似乎通孔柱技术的开发有可能保持竞争优势。
基板能够实现芯片与其它元件的连接。芯片必须接合至基板上,从而提供可靠的电连接以实现芯片与基板之间的电通信。
将基板与芯片互连的高密度引线技术之一是成熟的“倒装芯片技术”,其中在芯片端接焊盘上生长焊料凸点(bump)、无铅焊料凸点或在其端部具有焊料或无铅焊料的铜凸点,然后将芯片倒装与基板上表面焊盘上的凸点以互连。随着芯片凸点和引脚变得越来越密集,先进基板常常配备有自身辅助与芯片凸点互连的凸点。在基板焊盘上的这种凸点也称为“SoP”(焊盘上焊料)凸点,通常由焊料或无铅焊料构成。它们通常通过模板印刷并随后回流焊或者通过化学镀或电镀工艺并随后回流焊施加至基板端接焊盘上。
当芯片凸点与SoP凸点通过回流焊接触时,SoP凸点的焊料有助于产生与芯片凸点的可靠的机械及电接触。如果没有SoP,则芯片凸点的焊料可能不足或者可能不能充分流动和润湿基板端接焊盘的整个表面,由此造成可靠性风险或甚至是在芯片与基板之间断开连接。这种担忧尤为必要,因为大部分基板具有阻焊外保护层,其本来就铺展在端接基板焊盘上由此遮蔽这些焊盘使得难以在没有SoP凸点的情况下接触这些焊盘。
在现有技术中熟知的是,芯片凸点的尺寸和间距必须与SoP凸点的尺寸和间距尽可能对准。随着芯片技术的不断发展,芯片变得越来越密集,因为需要甚至更高的接触密度,使得连接凸点也变得甚至更为密集。由此,在基板上施加SoP凸点也变得甚至更加具有挑战性。与前期基板制造步骤相比,施加SoP本来就是一个更低良品率的制程,并且它是基板制造中的最终工艺步骤之一,由此增加了废品率、返工率、测试和成本。此外,下一代SoP凸点的间距越微细,则在回流焊之后和芯片组装期间相邻凸点之间发生短路故障的可能性就越高,从而进一步降低良品率并增加整体封装成本。
随着柱尺寸的缩减,保持各个引线彼此电绝缘以防止短路变得越来越困难。焊接也变得复杂,焊料过少会导致部分连接断开,而焊料过多则存在导致附近连接短路的风险。
本发明的实施方案解决了这些问题。
发明内容
需要发现一种在基板端接焊盘与倒装芯片凸点之间进行互连的新结构。该新结构要求具有当前可制造的SoP凸点结构所达到的高良品率,较少间距限制以及较低单位成本。
新结构要求确保具有低或有限体积焊料的更细间距的倒装芯片凸点仍能够可靠地直接连接基板端接焊盘。
期望该技术在基板上导体表面上使用低成本的现有阻焊溶液结构,而且该结构与铜端接焊盘具有基本相同的水平,以允许焊料易于进入和流动至这些焊盘上。
还期望发现一种能够支撑具有非圆形焊盘端子的端接倒装芯片基板焊盘的技术,以有助于在这些焊盘与倒装芯片凸点之间创造更大的接触面积以及有助于在基板面受到该焊盘限制的基板区域上进行导体布线。
本发明的实施方案涉及一种多层复合电子结构,包括至少一对在X-Y平面内延伸的特征层,每个相邻对的特征层由内通孔层隔开,所述通孔层包括在垂直于X-Y平面的Z方向上连接相邻特征层的通孔柱,所述通孔柱嵌入在内电介质层中,所述多层复合电子结构还包括由嵌入在外介电材料中的外通孔柱层构成的端子,其被减薄以暴露出外通孔柱层的端部。
通常,暴露的外通孔柱层与倒装芯片凸点可互联。
优选地,嵌入在外介电材料中的具有暴露端部的减薄的外通孔柱层是基本平坦的。
通常,嵌入在外介电材料中的具有暴露端部的减薄的外通孔柱层具有小于3微米的粗糙度。
任选地,所述通孔柱利用可焊接金属通过回流焊连接至所述倒装芯片凸点。
作为替代方案,所述通孔柱通过Z-导电各向异性粘接材料连接至所述倒装芯片凸点。
在一些实施方案中,所述通孔柱或下方端接焊盘中的至少其一的形状不是圆形。
在一些实施方案中,所述通孔柱或下方端接焊盘中的至少其一的形状选自椭圆形、正方形、矩形和长方形。
通常,所述外介电层包括聚合物。
任选地,所述外介电层包括阻焊层。
任选地,所述外通孔柱包括铜。
在一些实施方案中,发送给用户的所述多层复合电子结构还包括施加在所述外通孔柱的暴露端部上的有机清漆,用以防止通孔柱金属氧化。
在一些实施方案中,发送给用户的所述多层复合电子结构具有端接金或镍的外通孔柱,以防其氧化。
任选地,至少一个外层通孔柱具有小于50微米的直径。
任选地,至少一个外层通孔柱具有小于40微米的直径。
任选地,至少一个外层通孔柱具有30微米或30微米以下的直径。
任选地,所述多层复合电子结构在Z方向上的厚度超过50微米。
任选地,端接焊盘层和至少一个外通孔柱层可通过包括以下步骤的方法制造:
(a)获得基板,所述基板包括经处理暴露出铜的下方通孔柱层;
(b)用种子层覆盖所述基板;
(c)在所述种子层上施加第一光刻胶层;
(d)曝光和显影所述光刻胶以形成端接焊盘的负性图案;
(e)在所述负性图案中沉积金属以制造特征层;
(f)剥除所述第一光刻胶层;
(g)施加第二光刻胶层;
(h)曝光和显影出负性图案,在所述负性图案中包括多个外通孔柱;
(i)在所述负性图案中沉积金属层;
(j)剥除所述第二光刻胶,留下所述特征层和直立的多个外通孔柱;
(k)移除所述种子层;
(l)在外通孔层中的所述多个通孔柱上层压介电材料;
(m)平坦化所述介电材料以暴露出所述多个通孔柱的端部。
在一些实施方案中,所述介电材料层是阻焊层。
在一些实施方案中,施加以下限制条件中至少其一:
(i)所述种子层包括铜;(ii)所述金属层包括铜;(iii)所述介电材料包括聚合物;(iv)所述介电材料还包括陶瓷或玻璃内含物。
在一些实施方案中,所述方法还包括附加步骤(n1)在所述外通孔柱层中的铜柱的暴露端部上施加有机清漆。
在其它实施方案中,所述方法还包括附加步骤(n2)在所述外通孔柱层中的铜通孔柱的暴露端部上沉积镍或金。
在一个替代方法中,所述至少一个外通孔柱层通过以下步骤制造:
(i)获得基板,所述基板包括暴露出铜的下方特征层;
(ii)用种子层覆盖所述基板;
(iii)在所述种子层上沉积金属层;
(iv)在所述金属层上施加光刻胶层;
(v)曝光和显影出外通孔柱的正性图案;
(vi)蚀刻掉暴露的所述金属层;
(vii)剥除所述光刻胶,留下直立在所述外通孔层中的多个通孔柱;
(viii)移除所述种子层;
(xi)在所述外层中的所述多个通孔柱上层压外介电材料;
(x)平坦化并减薄,以暴露出所述外通孔柱层的金属。
在一些实施方案中,施加以下限制条件至少其一:
(a)所述种子层包括铜;(b)所述通孔柱层包括铜;(c)所述外介电材料包括聚合物;(d)所述外介电材料包括阻焊层。
在一些实施方案中,所述方法还包括步骤(x)a在所述通孔柱的暴露端部上沉积清漆。
在其它实施方案中,所述方法还包括步骤(x)b在所述外通孔柱的暴露端部上沉积金或镍。
第三方面涉及一种将芯片贴附至基板的方法,所述基板具有外层,所述外层包括嵌入在电介质中的通孔柱,所述通孔柱的端部与所述电介质齐平,所述方法包括以下步骤:
(p)将包括端接有焊料凸点的引脚的芯片定位为接触所述通孔柱的暴露端部;
(q)加热熔融所述焊料凸点并使所述外通孔的端部被焊料润湿。
任选地,所述方法还包括预备步骤(o)移除有机清漆以暴露出所述铜通孔柱的端部。
一种将芯片贴附至基板的替代方法,所述基板具有外层,所述外层包括嵌入在电介质中的通孔柱,所述通孔柱的端部与所述电介质齐平,所述方法包括以下步骤:
(p)将具有端接有Z方向各向异性导电膜的引脚的芯片定位为接触所述基板的通孔柱的暴露端部;
(q)在Z方向上施加压力。
术语微米或μm是指微米或10-6米。
附图说明
为了更好地理解本发明并示出本发明的实施方式,纯粹以举例的方式参照附图进行参考描述。
具体参照附图时,必须强调的是特定的图示是示例性的并且目的仅在于说明性地讨论本发明的优选实施方案,并且基于提供被认为是对于本发明的原理和概念方面的描述最有用和最易于理解的图示的原因而被呈现。就此而言,没有试图将本发明的结构细节以超出对本发明基本理解所必需的详细程度来图示;参照附图的说明使本领域技术人员认识到本发明的几种形式可如何实际体现出来。在附图中:
图1是现有技术的多层复合支撑结构的简化截面图,该结构具有连接至基板上端接焊盘的SoP凸点,还示出具有对应焊料凸点的芯片,该焊料凸点定位为用于与倒装芯片连接;
图2是具有用于接收图1芯片的新基板端接结构的图1基板的示意性截面图;
图3是示出可由此制造本发明的结构的一种方法的第一流程图;
图4是示出可由此制造本发明的结构的一种变化方法的第二流程图;
图5是示出可由此将芯片贴附在基板结构上的方法的流程图;
不同附图中的相同附图标记和指示表示相同的要素。
具体实施方式
在以下说明中,涉及的是包括在介电基质中的金属通孔的支撑结构,特别是在聚合物基质中的铜通孔柱,所述聚合物基质例如是玻璃纤维增强的聚酰亚胺、环氧树脂或BT(双马来酰亚胺/三嗪)树脂或它们的共混物。
Access公司的光刻胶及图案或面板镀覆以及层压技术的特征是可以制造包括具有非常多通孔柱的基板的非常大阵列的大面板,如在赫尔维茨(Hurwitz)等人的美国专利US 7,682,972,US 7,669,320和US 7,635,641中所描述的,这些文件通过引用并入本文。这种面板是基本平坦和基本光滑的。
Access公司的技术的另一特征在于利用光刻胶通过电镀制成的通孔可以比通过钻填形成的通孔更窄。目前,最窄的钻填通孔为约60微米。利用光刻胶通过电镀,可实现低于50微米,甚至小至30微米的分辨率。
图1示出包括芯片101自身的端接芯片100,在其端接焊盘103上配置有铜凸点102并且具有保护性钝化层104。铜凸点102具有焊料或无铅焊料顶部105,其备用于通过回流焊与基板200的SoP凸点210接触。现有技术的基板200通常包括特征层204,特征层204通过通孔层206连接,包封在通常为玻璃纤维增强聚合物的介电材料205中,并且终止于被阻焊层202彼此隔离绝缘的大量端接基板焊盘208。提供连接基板焊盘208的SoP凸点210。当芯片凸点105接触SoP凸点210并且在回流焊过程中被加热时,SoP凸点205的焊料与芯片凸点105一起熔化并生成可靠的粘接和电子接触。
在通孔通过钻填技术制造时,通孔通常具有基本圆形的截面,因为它们首先是在电介质中钻出激光孔的。由于电介质是非均匀的和各向异性的并且由具有无机填料和玻璃纤维增强体的聚合物基质构成,所以其圆形截面通常具有粗糙边缘,并且其截面可能略微偏离真正的圆形形状。此外,通孔趋于具有一定的锥度,成为逆截头圆锥,而不是圆柱形。最后,可得到的最窄通孔具有约60微米的直径。但是,预期随着时间的推移,该尺寸将缩减,从而实现更加微型化和更密集的封装。
如美国专利US 7,682,972,US 7,669,320和US 7,635,641中所述,例如,图1的基板200的主结构或者可以通过在光刻胶中显影的图案内镀覆(图案镀覆)制造,或者通过面板镀覆接着选择性蚀刻来制造,任何一种方法均会留下直立的通孔柱,然后在其上层压介电材料。为了便于加工和满足刚度要求,所用的用于制造内通孔层的电介质可为由用聚合物基质浸渍的玻璃纤维织造束构成的预浸料。
利用“钻填通孔”的方法,由于截面控制和形状方面的困难,使得不能制造非圆形孔。由于激光钻孔的限制,还存在约50-60微米直径的最小通孔尺寸。这些困难在上文的背景技术部分中作了详细描述,并且这些困难特别涉及由于铜通孔填充电镀过程导致的凹痕和/或半球形顶部、由于激光钻孔过程导致的通孔锥度形状和侧壁粗糙、以及由于在“布线模式(routing mode)”中用以产生在聚合物/玻璃电介质中的沟槽而使用的用于铣削狭缝的昂贵的激光钻孔机所导致的较高成本。
除了前文所述的激光钻孔的其它限制外,钻填技术的另一限制在于难以在同一层中产生不同直径的通孔,这是因为当钻出不同尺寸的通孔通道然后用金属填充以制造不同尺寸通孔时,通孔通道是以不同的速率被填充的。因此,作为钻填技术特征的凹痕或溢出(圆顶)的典型问题被恶化,因为不可能同时对不同尺寸通孔来优化沉积技术。因此,在实际应用中,钻填通孔具有基本圆形截面,尽管由于基板的不均匀特性导致有时略微变形,并且所有通孔具有基本相同的截面。
此外,应该注意的是,在复合介电材料如聚酰亚胺/玻璃或环氧树脂/玻璃或BT(双马来酰亚胺/三嗪)树脂/玻璃或它们与陶瓷和/或其它填料颗粒的共混物中的激光钻出的通孔实际上被限于约60×10-6米直径的最小尺寸,即使如此,由于所钻的复合材料的特性而导致存在显著的锥度形状以及侧壁粗糙,这均为所涉及的剥蚀过程的结果。
利用镀覆和光刻胶技术的灵活性,已经发现可以成本有效地制造出形状和尺寸范围广泛的通孔。此外,可以在同一层中制造出不同形状和尺寸的通孔。这在使用铜图案镀覆方法时尤其有利,通过首先沉积金属种子层,接着沉积光刻胶材料并在其中显影光滑、笔直,无锥度的沟槽,随后在通过在暴露的种子层上图案镀覆而得的这些沟槽中沉积铜来填充这些沟槽。与钻填通孔方法相反的是,通孔柱技术使得光刻胶层中的沟槽被填充从而得到无凹痕、无圆顶的铜连接器。在铜沉积后,随后剥除光刻胶,然后移除金属种子层并在其上和其周围施加一个永久的电介质。由此产生的“通孔导体”结构可使用在赫尔维茨(Hurwitz)等人的美国专利US 7,682,972,US 7,669,320和US 7,635,641中描述的工艺流程。
利用电镀,已经实现了直径约30微米的微通孔。微通孔之间的间隔可小于20微米。钻填技术不允许制造这么小的通孔,现有技术中对于钻填通孔而言存在约60微米直径的有效下限。
任选地,如现有技术那样,各个通孔可具有在X-Y平面内基本圆形的截面。此外,因为通孔柱是通过在光刻胶中镀覆并随后在其周围施加电介质制成,所以可以通过电镀技术实现比钻填技术可得到的光滑得多的通孔,因为在钻填技术中电介质的非均匀性和各向异性会导致粗糙表面的孔。
然而,与钻填技术产生的通孔不同,通过镀覆方式制造的通孔不必是圆形的。通孔可以在X-Y平面内不对称。例如,它们在X-Y平面的第一方向上延伸量可以是在垂直于第一方向的X-Y平面的第二方向上的延伸量的至少3倍,并且更加线性。
鉴于钻填通孔由于凹痕和圆顶效应而被有效地限制在约60微米直径,在通过电镀形成通孔的一些实施方案中,至少一个通孔具有小于50微米的直径,可能小于40微米。事实上,在一些实施方案中,至少一个通孔可具有30微米或30微米以下的直径。
通过将通孔柱嵌入电介质中并且抛光以暴露出通孔柱的端部,可以获得表面粗糙度小于3微米的基本平坦的阵列。
端接焊盘208可具有更细的间距(pitch),但是这使得将其与芯片进行精确连接变得更具挑战性。
参照图2,示出图1的芯片100以及基板300和二者的连接对准。
基板300包括通过通孔206连接在一起的铜特征层204,与基板200比照基本相似。应当认识到,基板200的内层数目、通孔和特征结构密度可以极大地变化。所示的基板300具有2个内特征层和3个通孔堆,只是用于图示目的的简化示意图。
接着描述有利于进一步微型化并且具有高可靠性、良好的良品率和较少浪费的新型端接结构和方法。
通常通过在光刻胶中进行图案电镀或者通过利用下述方法面板电镀然后蚀刻掉多余材料来制造铜端接柱阵列306。接着在铜端接柱306上方和周围布设阻焊层202,并且将阻焊层202和铜端接柱306结构抛光平坦,暴露出柱306的顶部。可以采用机械、化学或化学机械抛光(CMP)。利用CMP可以实现基本光滑、平坦并且在整个阵列上起伏变化小于3微米的表面处理。
铜柱306的暴露顶部可用有机清漆218覆盖,有机清漆218可用合适的有机溶剂移除,该有机溶剂溶解清漆218,但不溶解阻焊层202。作为替代方案,铜柱306外层暴露的铜可用镍或金220涂覆。
通过将端接芯片100的焊料凸点105与铜柱306连接,焊料用量最小。然而,主要是因为用于暴露出通孔306的外层端部的减薄工艺所致的基本平坦和光滑,使得所形成的焊接连接极为可靠。并且与图1所示的现有技术相比,可以实现在低短路和断路概率下具有高可靠性和良好的良品率。
参照图3,在一些实施方案中,至少一个外通孔层通过包括以下步骤的方法制造:获得基板,所述基板包括经处理暴露出铜的下方通孔层206’–步骤(a);和用种子层(通常是铜)覆盖所述基板–步骤(b)。在所述种子层上施加第一光刻胶薄层–步骤(c);以及曝光和显影所述第一光刻胶薄层以形成特征结构的负性图案–步骤(d)。在所述特征结构的负性图案中沉积金属,通常是铜–步骤(e)以形成焊盘层208;以及剥除所述第一光刻胶薄层–步骤(f),留下直立的焊盘层208。接着,施加第二光刻胶厚层–步骤(g)以及在其中曝光和显影出通孔柱306的第二负性图案–步骤(h)。在所述第二图案中显影出的沟槽内沉积金属层,通常是铜–步骤(i);以制造包括通孔柱306的外通孔柱层。应该注意的是,各个通孔柱306可具有彼此不同的尺寸。此外,它们的截面不必是圆形的,而可以是例如椭圆形、正方形或矩形。这种灵活性能够实现高封装密度。
剥除所述第二光刻胶层–步骤(j),留下直立的外通孔柱层306和下方的焊盘层208;移除暴露的种子层–步骤(k)。这可以通过将结构暴露于湿蚀刻过程来完成,例如采用氢氧化铵或氯化铜。随后,在外通孔柱层306上沉积阻焊层材料–步骤(l)。
沉积外通孔柱层306的方法基本类似于对内通孔柱层206所使用的方法,其中为了进一步积层和提高刚性,介电材料通常是复合材料,其包含聚合物基质例如聚酰亚胺、环氧树脂、双马来酰亚胺树脂、三嗪树脂及其共混物并且还包含陶瓷或玻璃。通常,用于基板200的内层的电介质提供为织造纤维束浸渍在含陶瓷填料的聚合物树脂预浸料中构成的预浸料。至于外层,可以使用较廉价的材料,例如阻焊层202。可将阻焊层202或其它介电材料减薄以暴露出外通孔柱306的金属端部–步骤(m)。该减薄可利用机械研磨或抛光、化学抛光或化学机械抛光(CMP)完成。该减薄也使得基板200的外表面平坦化。
制造成型通孔的设备由于允许形成正方形、矩形或椭圆形的通孔端部和端接焊盘而能够实现更高的封装密度。这可以在具有更高的X-Y平面封装密度的同时,允许在Z(穿过基板)方向上沿着这些通孔306进行导体布线。
端接芯片100可焊接至外通孔柱306的暴露铜端部上。由于铜易于氧化,所以为了运输和储存,外通孔柱306端部暴露的铜可用有机清漆218覆盖–步骤(n1),有机清漆218可用合适的有机溶剂移除,该有机溶剂溶解清漆218,但不溶解阻焊层202。作为替代方案,外通孔层306暴露的铜可用镍或金220涂覆–步骤(n2)。
参照图4,在一个变化的制造方法中,外通孔端接柱层306可通过以下步骤制造:获得基板,所述基板包括经平坦化而暴露出铜的下方通孔柱层206–步骤(i),接着用种子层覆盖下方通孔层206–步骤(ii),其通常为铜并且通常通过溅射或化学镀沉积。在所述种子层上沉积金属层–步骤(iii)。该金属层通常为铜并且可通过电镀沉积。在所述金属层上施加光刻胶层–步骤(iv),然后在其中曝光和显影出端接焊盘208的正性图案–步骤(v)。蚀刻掉暴露的所述金属层–步骤(vi)。蚀刻铜可利用铜蚀刻剂例如氢氧化铵或氯化铜进行。接着,剥除所述光刻胶–步骤(vii),留下直立的通孔层,然后在端接焊盘层208上层压介电材料202–步骤(viii)。介电材料202可以是预浸料,但是为了降低成本,也可以是例如简单聚合物或阻焊层。
可以减薄介电层202–步骤(ix)以暴露出端接焊盘208的表面,例如利用化学或机械抛光或研磨或化学机械抛光。该减薄也使端接焊盘层208平坦化。
可以重复步骤(i)~(ix)以在端接焊盘208上沉积通孔柱306用以连接端接芯片105的端子102。
作为替代方案,端接焊盘可以制作得更厚。
由于铜易于氧化,所以为了运输和储存,暴露的铜可用有机清漆218覆盖–步骤(x)a,有机清漆218可用合适的溶剂移除,保留阻焊层216。作为替代方案,暴露的铜可用镍或金220涂覆–步骤(x)b。如下文参照图5所述,芯片100可焊接至外通孔层306暴露的铜上。
现在参照图2~5,描述一种将芯片100贴附至基板300的方法,基板300具有外层,该外层包括嵌入在电介质202(通常是阻焊层)中的通孔柱306,通孔柱306的端部与电介质202齐平。该方法包括以下步骤:(o)如果提供了防止通常为铜的通孔柱306氧化的有机清漆218,则移除有机清漆218;(p)将包括端接有焊料凸点105的引脚102的端接芯片100定位为接触通孔柱306的暴露端部;和(q)加热熔融焊料凸点105并使通孔柱306的端部被焊料润湿。
由于利用化学、机械或化学机械抛光暴露出外层的通孔柱306的端部,所以基板300的整个阵列基本平坦并且可以光滑至粗糙度小于3微米。这有利于仅在端接芯片100的芯片引脚102上使用微凸点105进行焊接,因为基板300的平坦性使得不接触的风险很小。因为只需要非常少的焊料,所以相邻通孔柱之间短路的风险被降到最低。
由此,可以形成具有直径小于60微米的端子306的基板300,目前直径可以为30微米。芯片100可以利用最小量的焊料105焊接至这些端子306上。
事实上,可以利用Z-导电各向异性粘接材料,完全不使用焊料,将芯片100的倒装芯片凸点102连接至通孔柱306。
各向异性导电膜(通常称为ACF)是一种无铅的环境友好型粘接体系,其已在平板显示器工业中使用超过30年,用以制造驱动电子器件与显示器的玻璃基板之间的电连接和机械连接。
玻璃上芯片(COG)应用现在通常以间距小至25微米间隔10微米方式使用ACF,而各向异性的柔性薄膜上芯片(aCOF)已经稳定在40微米间距范围,成为一种标准技术。这些驱动器芯片中的单独一个可具有超过1300个焊盘,它们在ACF组装工艺中均同时互连。与COG和aCOF相比,aCOB(各向异性的板上芯片)组装仍不成熟。然而,它们已经在坚固且成本敏感的封装需要高密度和低剖面特征的应用中在过去数年取得了长足的进展。
上述说明只是以解释性的方式提供。应当认识到本发明能够具有多种变化形式。
已经描述了本发明的若干实施方案。然而,应当理解的是,可以进行各种改变而不偏离本发明的实质和范围。因此,其它实施方案也在所附权利要求书的范围之内。
因此,本领域技术人员将会认识到,本发明不限于上文中具体图示和描述的内容。而且,本发明的范围由所附权利要求限定,包括上文所述的各个技术特征的组合和子组合以及其变化和改进,本领域技术人员在阅读前述说明后将会预见到这样的组合、变化和改进。
在权利要求书中,术语“包括”及其变体例如“包含”、“含有”等是指所列举的要素被包括在内,但一般不排除其它要素。
Claims (25)
1.一种多层复合电子结构,包括至少一对在X-Y平面内延伸的特征层,每个相邻对的特征层由内通孔层间隔开,所述内通孔层包括在垂直于X-Y平面的Z方向上连接相邻特征层的内通孔柱,所述内通孔柱嵌入在内层电介质中,所述多层复合电子结构还包括嵌入在外介电材料中的外通孔柱层,其被减薄以暴露出外通孔柱层的端部,外通孔柱层的暴露端部的表面是平坦的并且与外介电材料齐平,具有暴露端部的外通孔柱层作为连接端接芯片凸点的端子。
2.如权利要求1所述的多层复合电子结构,其中暴露的外通孔柱层与倒装芯片凸点可互连。
3.如权利要求1所述的多层复合电子结构,其中嵌入在外介电材料中的具有暴露端部的减薄的外通孔柱层具有小于3微米的粗糙度。
4.如权利要求2所述的多层复合电子结构,其中所述外通孔柱层的暴露端部利用可焊接金属通过回流焊连接至所述倒装芯片凸点。
5.如权利要求2所述的多层复合电子结构,其中所述外通孔柱的暴露端部通过Z-导电各向异性粘接材料连接至所述倒装芯片凸点。
6.如权利要求2所述的多层复合电子结构,其中所述外通孔柱沉积在端接焊盘上,并且所述外通孔柱或其下方的端接焊盘中的至少其一的形状不是圆形。
7.如权利要求6所述的多层复合电子结构,其中所述外通孔柱或其下方的端接焊盘中的至少其一的形状选自椭圆形、正方形、矩形和长方形。
8.如权利要求1所述的多层复合电子结构,其中所述外介电材料包括聚合物。
9.如权利要求1所述的多层复合电子结构,其中所述外介电层包括阻焊层。
10.如权利要求1所述的多层复合电子结构,其中所述外通孔柱包括铜。
11.如权利要求1所述的多层复合电子结构,还包括施加在所述外通孔柱的暴露端部上的有机清漆,用以防止外通孔柱金属氧化。
12.如权利要求1所述的多层复合电子结构,其中所述外通孔柱端接金或镍以防止氧化。
13.如权利要求1所述的多层复合电子结构,其中至少一个所述外通孔柱具有小于50微米的直径。
14.如权利要求1所述的多层复合电子结构,其中至少一个所述外通孔柱具有小于40微米的直径。
15.如权利要求1所述的多层复合电子结构,其中至少一个所述外通孔柱具有30微米或30微米以下的直径。
16.如权利要求1所述的多层复合电子结构,其中所述多层复合电子结构在Z方向上的厚度超过50微米。
17.一种制造如权利要求1所述的多层复合电子结构的方法,其中至少一个外通孔柱层通过包括以下步骤的方法制造:
(a)获得基板,所述基板包括经处理暴露出铜的下方通孔柱层;
(b)用种子层覆盖所述基板;
(c)在所述种子层上施加第一光刻胶层;
(d)曝光和显影所述第一光刻胶层以形成端接焊盘的第一负性图案;
(e)在所述第一负性图案中沉积金属以制造特征层;
(f)剥除所述第一光刻胶层;
(g)施加第二光刻胶层;
(h)曝光和显影出第二负性图案,在所述第二负性图案中包括多个外通孔柱;
(i)在所述第二负性图案中沉积金属层;
(j)剥除所述光刻胶,留下所述特征层和直立在外通孔柱层中的多个外通孔柱;
(k)移除所述种子层;
(l)在外通孔柱层中的所述多个外通孔柱上层压介电材料;
(m)平坦化所述介电材料以暴露出所述多个外通孔柱的端部。
18.如权利要求17所述的方法,其中所述介电层是阻焊层。
19.如权利要求17所述的方法,其中施加以下限制条件中的至少其一:
(i)所述种子层包括铜;(ii)所述金属层包括铜;(iii)所述介电材料包括聚合物;(iv)所述介电材料还包括陶瓷或玻璃内含物。
20.如权利要求17所述的方法,其中所述方法包括附加步骤:(n1)在所述外通孔柱层中的外通孔柱的暴露端部上施加有机清漆。
21.如权利要求17所述的方法,其中所述方法包括附加步骤:(n2)在所述外通孔柱层中的外通孔柱的暴露端部上沉积镍或金。
22.一种制造如权利要求1所述的多层复合电子结构的方法,其中至少一个外通孔柱层通过以下步骤制造:
(i)获得基板,所述基板包括暴露出铜的下方特征层;
(ii)用种子层覆盖所述基板;
(iii)在所述种子层上沉积金属层;
(iv)在所述金属层上施加光刻胶层;
(v)曝光和显影出外通孔柱的正性图案;
(vi)蚀刻掉暴露的所述金属层;
(vii)剥除所述光刻胶层,留下直立在所述外通孔柱层中的多个外通孔柱;
(viii)移除所述种子层;
(ix)在所述外通孔柱层中的所述多个外通孔柱上层压外介电材料;
(x)平坦化并减薄,以暴露出所述外通孔柱层的金属。
23.如权利要求22所述的方法,其中施加以下限制条件中的至少其一:
(a)所述种子层包括铜;
(b)所述外通孔柱层包括铜;
(c)所述外介电材料包括聚合物;
(d)所述外介电材料包括阻焊层。
24.如权利要求22所述的方法,其中所述方法还包括步骤:(xi)a在所述外通孔柱的暴露端部上沉积清漆。
25.如权利要求22所述的方法,其中所述方法还包括步骤:(x)b在所述外通孔柱的暴露端部上沉积金或镍。
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KR20100048114A (ko) * | 2008-10-30 | 2010-05-11 | 삼성전기주식회사 | 범프기판을 갖는 인쇄회로기판 및 그 제조방법 |
KR20100132358A (ko) * | 2009-06-09 | 2010-12-17 | 엘지이노텍 주식회사 | 범프비아를 구비한 인쇄회로기판의 제조방법 |
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CN103943600A (zh) | 2014-07-23 |
US20140363927A1 (en) | 2014-12-11 |
KR20140143678A (ko) | 2014-12-17 |
TWI637672B (zh) | 2018-10-01 |
JP2014239200A (ja) | 2014-12-18 |
TW201448700A (zh) | 2014-12-16 |
US9049791B2 (en) | 2015-06-02 |
KR101575172B1 (ko) | 2015-12-07 |
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