CN103828036B - 在3d集成处理中转移材料层的方法以及相关结构和装置 - Google Patents
在3d集成处理中转移材料层的方法以及相关结构和装置 Download PDFInfo
- Publication number
- CN103828036B CN103828036B CN201280046870.1A CN201280046870A CN103828036B CN 103828036 B CN103828036 B CN 103828036B CN 201280046870 A CN201280046870 A CN 201280046870A CN 103828036 B CN103828036 B CN 103828036B
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- Prior art keywords
- ion
- donor structure
- region
- donor
- material layer
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Element Separation (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/246,580 US8673733B2 (en) | 2011-09-27 | 2011-09-27 | Methods of transferring layers of material in 3D integration processes and related structures and devices |
US13/246,580 | 2011-09-27 | ||
FR1159358 | 2011-10-17 | ||
FR1159358A FR2981501B1 (fr) | 2011-10-17 | 2011-10-17 | Procédé de transfert de couches matériau dans des processus d’intégration 3d et structures et dispositifs associes |
PCT/IB2012/001578 WO2013045985A1 (en) | 2011-09-27 | 2012-08-13 | Methods of transferring layers of material in 3d integration processes and related structures and devices |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103828036A CN103828036A (zh) | 2014-05-28 |
CN103828036B true CN103828036B (zh) | 2017-02-15 |
Family
ID=46889374
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280046870.1A Active CN103828036B (zh) | 2011-09-27 | 2012-08-13 | 在3d集成处理中转移材料层的方法以及相关结构和装置 |
Country Status (6)
Country | Link |
---|---|
JP (1) | JP6141853B2 (de) |
KR (1) | KR101955375B1 (de) |
CN (1) | CN103828036B (de) |
DE (1) | DE112012004024T5 (de) |
TW (1) | TWI573198B (de) |
WO (1) | WO2013045985A1 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8984463B2 (en) | 2012-11-28 | 2015-03-17 | Qualcomm Incorporated | Data transfer across power domains |
US9064077B2 (en) | 2012-11-28 | 2015-06-23 | Qualcomm Incorporated | 3D floorplanning using 2D and 3D blocks |
US20140225218A1 (en) * | 2013-02-12 | 2014-08-14 | Qualcomm Incorporated | Ion reduced, ion cut-formed three-dimensional (3d) integrated circuits (ic) (3dics), and related methods and systems |
US9536840B2 (en) | 2013-02-12 | 2017-01-03 | Qualcomm Incorporated | Three-dimensional (3-D) integrated circuits (3DICS) with graphene shield, and related components and methods |
US9041448B2 (en) | 2013-03-05 | 2015-05-26 | Qualcomm Incorporated | Flip-flops in a monolithic three-dimensional (3D) integrated circuit (IC) (3DIC) and related methods |
US9177890B2 (en) | 2013-03-07 | 2015-11-03 | Qualcomm Incorporated | Monolithic three dimensional integration of semiconductor integrated circuits |
US9171608B2 (en) | 2013-03-15 | 2015-10-27 | Qualcomm Incorporated | Three-dimensional (3D) memory cell separation among 3D integrated circuit (IC) tiers, and related 3D integrated circuits (3DICS), 3DIC processor cores, and methods |
FR3034569B1 (fr) * | 2015-04-02 | 2021-10-22 | Soitec Silicon On Insulator | Electrolyte solide avance et sa methode de fabrication |
FR3041364B1 (fr) * | 2015-09-18 | 2017-10-06 | Soitec Silicon On Insulator | Procede de transfert de paves monocristallins |
FR3073083B1 (fr) * | 2017-10-31 | 2019-10-11 | Soitec | Procede de fabrication d'un film sur un feuillet flexible |
FR3079659B1 (fr) * | 2018-03-29 | 2020-03-13 | Soitec | Procede de fabrication d'un substrat donneur pour la realisation d'une structure integree en trois dimensions et procede de fabrication d'une telle structure integree |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6020252A (en) * | 1996-05-15 | 2000-02-01 | Commissariat A L'energie Atomique | Method of producing a thin layer of semiconductor material |
US6103597A (en) * | 1996-04-11 | 2000-08-15 | Commissariat A L'energie Atomique | Method of obtaining a thin film of semiconductor material |
US6335258B1 (en) * | 1996-11-05 | 2002-01-01 | Commissariat A L'energie Atomique | Method for making a thin film on a support and resulting structure including an additional thinning stage before heat treatment causes micro-cavities to separate substrate element |
CN1708844A (zh) * | 2002-11-07 | 2005-12-14 | 原子能委员会 | 通过共注入而在基底中形成弱化区的方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
JPH10135147A (ja) * | 1996-11-01 | 1998-05-22 | Nippon Telegr & Teleph Corp <Ntt> | 結晶薄膜の製造方法及び太陽電池の製造方法 |
FR2758907B1 (fr) * | 1997-01-27 | 1999-05-07 | Commissariat Energie Atomique | Procede d'obtention d'un film mince, notamment semiconducteur, comportant une zone protegee des ions, et impliquant une etape d'implantation ionique |
FR2767416B1 (fr) | 1997-08-12 | 1999-10-01 | Commissariat Energie Atomique | Procede de fabrication d'un film mince de materiau solide |
JPH1174208A (ja) * | 1997-08-27 | 1999-03-16 | Denso Corp | 半導体基板の製造方法 |
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
FR2774510B1 (fr) | 1998-02-02 | 2001-10-26 | Soitec Silicon On Insulator | Procede de traitement de substrats, notamment semi-conducteurs |
JP2000012864A (ja) * | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
FR2795865B1 (fr) | 1999-06-30 | 2001-08-17 | Commissariat Energie Atomique | Procede de realisation d'un film mince utilisant une mise sous pression |
FR2818010B1 (fr) | 2000-12-08 | 2003-09-05 | Commissariat Energie Atomique | Procede de realisation d'une couche mince impliquant l'introduction d'especes gazeuses |
FR2830983B1 (fr) * | 2001-10-11 | 2004-05-14 | Commissariat Energie Atomique | Procede de fabrication de couches minces contenant des microcomposants |
JP4814498B2 (ja) * | 2004-06-18 | 2011-11-16 | シャープ株式会社 | 半導体基板の製造方法 |
US7202124B2 (en) * | 2004-10-01 | 2007-04-10 | Massachusetts Institute Of Technology | Strained gettering layers for semiconductor processes |
EP1911085B1 (de) * | 2005-07-08 | 2011-10-12 | S.O.I.Tec Silicon on Insulator Technologies | Verfahren zur herstellung eines films |
FR2935537B1 (fr) | 2008-08-28 | 2010-10-22 | Soitec Silicon On Insulator | Procede d'initiation d'adhesion moleculaire |
US7816225B2 (en) * | 2008-10-30 | 2010-10-19 | Corning Incorporated | Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation |
-
2012
- 2012-07-30 TW TW101127515A patent/TWI573198B/zh active
- 2012-08-13 CN CN201280046870.1A patent/CN103828036B/zh active Active
- 2012-08-13 DE DE112012004024.4T patent/DE112012004024T5/de active Pending
- 2012-08-13 KR KR1020147008836A patent/KR101955375B1/ko active IP Right Grant
- 2012-08-13 WO PCT/IB2012/001578 patent/WO2013045985A1/en active Application Filing
- 2012-08-13 JP JP2014532486A patent/JP6141853B2/ja active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6103597A (en) * | 1996-04-11 | 2000-08-15 | Commissariat A L'energie Atomique | Method of obtaining a thin film of semiconductor material |
US6020252A (en) * | 1996-05-15 | 2000-02-01 | Commissariat A L'energie Atomique | Method of producing a thin layer of semiconductor material |
US6335258B1 (en) * | 1996-11-05 | 2002-01-01 | Commissariat A L'energie Atomique | Method for making a thin film on a support and resulting structure including an additional thinning stage before heat treatment causes micro-cavities to separate substrate element |
CN1708844A (zh) * | 2002-11-07 | 2005-12-14 | 原子能委员会 | 通过共注入而在基底中形成弱化区的方法 |
Also Published As
Publication number | Publication date |
---|---|
CN103828036A (zh) | 2014-05-28 |
DE112012004024T5 (de) | 2014-07-24 |
KR101955375B1 (ko) | 2019-03-07 |
JP2014531768A (ja) | 2014-11-27 |
TWI573198B (zh) | 2017-03-01 |
JP6141853B2 (ja) | 2017-06-07 |
TW201330117A (zh) | 2013-07-16 |
WO2013045985A1 (en) | 2013-04-04 |
KR20140065435A (ko) | 2014-05-29 |
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