CN103534796B - 半导体装置和半导体装置的制造方法 - Google Patents
半导体装置和半导体装置的制造方法 Download PDFInfo
- Publication number
- CN103534796B CN103534796B CN201280023267.1A CN201280023267A CN103534796B CN 103534796 B CN103534796 B CN 103534796B CN 201280023267 A CN201280023267 A CN 201280023267A CN 103534796 B CN103534796 B CN 103534796B
- Authority
- CN
- China
- Prior art keywords
- lead frame
- semiconductor device
- electronic unit
- metal wire
- conductive pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04034—Bonding areas specifically adapted for strap connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/3701—Shape
- H01L2224/37011—Shape comprising apertures or cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/37147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4009—Loop shape
- H01L2224/40091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4009—Loop shape
- H01L2224/40095—Kinked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/40139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous strap daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/40227—Connecting the strap to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4099—Auxiliary members for strap connectors, e.g. flow-barriers, spacers
- H01L2224/40991—Auxiliary members for strap connectors, e.g. flow-barriers, spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/40993—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73221—Strap and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73263—Layer and strap connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/77—Apparatus for connecting with strap connectors
- H01L2224/7725—Means for applying energy, e.g. heating means
- H01L2224/77272—Oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8412—Aligning
- H01L2224/84136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/84138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92162—Sequential connecting processes the first connecting process involving a wire connector
- H01L2224/92166—Sequential connecting processes the first connecting process involving a wire connector the second connecting process involving a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Geometry (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Abstract
本发明提供一种半导体装置和半导体装置的制造方法,其确保接合大电流容量的导线框的焊锡的寿命和导线框的散热性,提高伴随小型化的可靠性和组装性。半导体装置中,通过矩形形状的导线框(22)使形成有作为导电图案(12)的金属层的绝缘基板上的电子部件(23、24)之间电连接。此时,通过在贯通导线框(22)形成的开口(21)中插通跨电子部件(23、24)配置的金属线部件(27),能够使导线框(22)正确地定位。在各电子部件(23、24)的电极面与导线框(22)的接合部(22a、22b)之间,分别夹着焊锡板(28、29),在之后的回流焊工序中溶解。在焊锡板(28、29)上,形成与导线框(22)的开口(21)的宽度对应的大小的缝隙(28s、29s)。
Description
技术领域
本发明涉及在形成有金属层的绝缘基板上搭载有多个电子部件的模块结构的半导体装置和半导体装置的制造方法,特别涉及通过在绝缘基板上使半导体芯片等电子部件彼此之间或者金属层与电子部件之间电连接而构成的半导体装置和半导体装置的制造方法。
背景技术
在小型且搭载有大电流的电子部件的结构的半导体装置中,有的在绝缘基板上的金属层(导电图案)上通过焊锡层固定半导体芯片。该半导体装置中,在绝缘基板上形成的金属层上搭载电子部件时,焊锡层可能在金属层上向周边流动而扩展至金属层的端部,进而可能扩展至搭载于金属层上的其他电子部件的配置位置。
焊锡层扩展至金属层的端部时,半导体装置整体因电子部件的发热而被加热时,对金属层的端部附近的绝缘基板施加较大的应力。因此,可能从焊锡层的周边产生裂纹,损害电连接。此外,焊锡层扩展至其他电子部件的配置位置时,也可能对其他电子部件的接合状态造成影响。
于是,在小型且搭载有大电流的电子部件的半导体装置中,通过使用金属板构成的导线框代替现有的铝线或铜线构成的金属线接合等作为配线部件,能够确保电流容量,并且实现在吸收电子部件的发热的同时提高向外部的散热性的冷却结构。导线框例如在其两端分别通过软钎焊与电子部件例如半导体芯片的电极和在绝缘基板上形成的导电图案相连接。由此,在确保半导体芯片相互间和与导电图案的电连接的同时,导线框本身具有将半导体芯片的发热向外部散热的功能。这样的导线框,一般由铜板或铜合金(Cu-Fe-Cu、Al-Fe、CuMo)等构成。
图11是表示现有的半导体装置的一例的图,(A)是半导体装置的俯视图,(B)是沿着B-B线表示的剖视图。
陶瓷基板11是在其两面分别接合形成了由规定形状的金属层构成的导电图案12、13而成为绝缘基板10,构成在未图示的底座基材的上表面被软钎焊的具有模块结构的半导体装置。此处,在表面侧的导电图案12上,分别通过焊锡层16、17在规定的位置安装构成绝缘栅型双极晶体管(InsulatedGateBipolarTransistor:IGBT)的半导体芯片(以下称为IGBT芯片)14和二极管芯片15,配置金属板18作为配线部件。该金属板18如上所述作为使IGBT芯片14、二极管芯片15相互之间和导电图案12电连接的导线框,为了吸收各芯片14、15的发热同时向外部散热而较宽地形成。
构成这样的导线框的金属板18,在绝缘基板10上隔着规定大小的焊锡板19a、19b、19c被定位,在1次回流焊工序中使焊锡板19a、19b、19c熔解而与绝缘基板10接合。因此,在回流焊工序之前,金属板18的各接合面18a、18b、18c必须分别与焊锡板19a、19b、19c一同配置在绝缘基板10上的规定的位置。特别是在组装小型且大电流结构的半导体装置的情况下,要求金属板18被正确地定位。
图12是表示现有的半导体装置中的导线框的定位中使用的定位用框体的俯视图。
定位用框体20是在导电图案12上用其上搭载的IGBT芯片14、二极管芯片15在规定的位置定位配置的框体(格子)。该定位用框体20用在IGBT芯片14的图示左侧确定导电图案12的范围的框20a、IGBT芯片14的外周框20b、二极管芯片15的外周框20c、和连接外周框20b、20c的连接框20d规定单一的闭区域。由此确定图11所示的金属板18要在导电图案12上配置的位置(图中用假想线18i表示)。
专利文献1:日本特开2009-170543号公报
专利文献2:日本特开2009-253131号公报
发明内容
这样的现有的半导体装置中,将通常使用的导线框软钎焊在各芯片14、15上时,焊锡板19b、19c较多地在前后左右方向上发生错位。因此,难以使焊锡板19b、19c相对于IGBT芯片14和二极管芯片15的电极位置正确地定位。此外,难以使焊锡板19a、19b、19c在1次回流焊工序中熔解,难以使在绝缘基板10上接合金属板18的各焊锡层加工为均匀的厚度。特别是,金属板18与各芯片14、15的热膨胀系数的差较大的情况下,如果各焊锡层的厚度变得不均匀,或者焊点的面积不充分,则会发生因为热应力而不能够充分确保焊锡接合部的长期可靠性的问题。
进而,随着半导体装置自身的小型化,即使使用现有的定位用框体20也难以使金属板18和焊锡板19a、19b、19c同时正确地定位,如何使芯片14、15的发热向外部效率良好地散热成为课题。这样,在组装现有的半导体装置的导线框的问题上,存在不容易进行绝缘基板10上的定位、接合位置不稳定的问题。
本发明鉴于这些点,目的在于提供一种半导体装置及其制造方法,其确保接合大电流容量的导线框的焊锡的寿命和导线框的散热性,同时提高伴随小型化的可靠性和组装性。
本发明中,为了解决上述问题,提供一种半导体装置,其在形成有金属层的绝缘基板上搭载有多个电子部件,通过使上述电子部件彼此之间或者上述金属层与上述电子部件之间电连接而构成。该半导体装置具备:定位用的金属线部件,其具有规定的直径和长度,与上述多个电子部件或上述金属层分别接合;导线框,其跨上述多个电子部件相互之间、或者上述金属层与上述电子部件之间地配置,使上述多个电子部件相互之间、或者上述金属层与上述电子部件之间电连接;开口,其为了在上述电子部件或上述金属层的规定位置上接合上述导线框,以上述金属线部件能够插通的大小贯通上述导线框而形成;通过在上述开口插通上述金属线部件而使上述导线框在上述绝缘基板上定位。
此外,本发明的半导体装置的制造方法,其使在形成有导电图案的绝缘基板上搭载的多个半导体芯片相互之间、或者上述半导体芯片与上述导电图案之间通过导线框电连接,包括:第一接合工序,在上述绝缘基板上的上述导电图案上通过接合材料接合上述半导体芯片;金属线接合工序,将具有规定的直径和长度的定位用的金属线与上述半导体芯片或上述导电图案的主面上的接合上述导线框的位置分别接合;定位工序,准备具有能够插入上述定位用的金属线的大小的开口部的上述导线框,在上述绝缘基板上使上述多个半导体芯片相互之间、或者上述半导体芯片与所述导电图案之间连接时,用上述定位用的金属线使上述导线框定位;第二接合工序,使上述导线框的接合部在上述半导体芯片或上述导电图案上的规定位置通过焊锡层接合。
发明效果
根据本发明,能够不使用现有的定位用框体,简单且可靠地使导线框和焊锡板同时正确地定位。此外,可以不使在绝缘基板上接合导线框的焊锡层的寿命降低,确保导线框的散热性。从而,能够提高伴随大电流小型化的半导体装置的可靠性和组装性。
本发明的上述和其他的目的、特征和优点将通过表示优选为本发明的例子的实施方式的附图和相关的以下说明而说明。
附图说明
图1是表示第一实施方式的半导体装置的一例的图,(A)是半导体装置的俯视图,(B)是沿着B-B线表示的剖视图。
图2是表示用于接合导线框的焊锡板的形状的俯视图。
图3是表示在导线框的接合部的下表面侧形成的突起部的图。
图4是表示第一实施方式的半导体装置的制造工序的图。
图5是表示第一实施方式的半导体装置中使用的导线框的变形例的俯视图。
图6是表示第二实施方式的半导体装置的一例的图,(A)是半导体装置的俯视图,(B)是沿着B-B线表示的剖视图。
图7是表示第二实施方式的半导体装置的等价电路的图。
图8是表示第二实施方式的半导体装置中使用的导线框的变形例的图,(A)是导线框的俯视图,(B)是沿着B-B线表示的剖视图。
图9是表示第二实施方式的半导体装置中使用的定位用的金属线部件的变形例的剖视图。
图10是表示第三实施方式的半导体装置中使用的导线框的一例的图,(A)是导线框的俯视图,(B)是沿着B-B线表示的剖视图,(C)是一部分剖面的放大图。
图11是表示现有的半导体装置的一例的图,(A)是半导体装置的俯视图,(B)是沿着B-B线表示的剖视图。
图12是表示现有的半导体装置中的导线框的定位所使用的定位用框体的俯视图。
符号说明:
10绝缘基板
11陶瓷基板
12、13导电图案
21开口
22、31、32、33、35导线框
23、24电子部件
23a、23bIGBT芯片
24a、24b二极管芯片
25、26接合材料
27、341~344、Wa1、Wc1、Wa2、Wc2金属线部件
28、29焊锡板
28s、29s缝隙
30a、30b配线用金属线
ha1、ha2、hb1~hb5、hc1、hc2阶梯圆孔
S1、S2、Sa1~Sc1、Sa2~Sc2、Sa3~Sc3、Sa4~Sc4长孔
具体实施方式
以下参照附图说明本发明的实施方式。
(第一实施方式)
图1是表示第一实施方式的半导体装置的一例的图,(A)是半导体装置的俯视图,(B)是沿着B-B线表示的剖视图。
该半导体装置以通过具有开口21的矩形形状的导线框22使形成了作为导电图案12的金属层的绝缘基板(未图示)上的电子部件23、24之间电连接的方式构成。导线框22在左右的端部具备与电子部件23、24的电极面对应的大小的接合部22a、22b,如图1(B)所示,这些接合部22a、22b分别通过规定高度的起立部使电子部件23、24之间电连接。此外,导线框22的开口21作为在其长度方向上具有从一方的接合部22a到另一方的接合部22b的长度、且具有规定宽度的长孔,贯通导线框22地形成。
电子部件23、24如图1(B)所示,分别在导电图案12上的规定位置预先通过接合材料25、26被接合,并且在2个电子部件23、24的电极面上分别接合铝线或铜线的金属线部件27的各端部。该金属线部件27具有与导线框22的开口21的宽度对应的直径(例如300~500μm),并且以使电子部件23、24的电极面的中央部之间直线连接的方式配置。
此处,在贯通导线框22形成的开口21中,通过插通跨2个电子部件23、24配置的金属线部件27,能够使导线框22正确地定位。此时,在各电子部件23、24的电极面与导线框22的接合部22a、22b之间,分别夹着焊锡板28、29,在之后的回流焊工序中使焊锡板熔解。在这些焊锡板28、29上,如之后图2所示,形成与导线框22的开口21的宽度对应的大小的缝隙28s、29s。
图2是表示用于接合导线框的焊锡板的形状的俯视图。
焊锡板28、29分别具有与电子部件23、24的电极面对应的大小,并且预先形成了规定的缝隙28s、29s。因此,通过使缝隙28s、29s与在各电极面上接合的金属线部件27的接合面一致,能够进行焊锡板28、29的定位。此外,如上所述,通过这些焊锡板28、29而与电子部件23、24的电极面接合的导线框22的接合部22a、22b的位置也同样用金属线部件27决定。
从而,能够不使用现有的定位用框体(图12),简单且可靠地使导线框22和焊锡板28、29同时在导电图案12上正确地定位。此外,通过在导线框22的接合部22a、22b上设置的开口21,在回流焊工序中熔解的焊锡板28、29可以沿着与该缝隙28s、29s对应的形状以充分大的面积或长度形成焊点。因此,在导线框22的各接合部22a、22b上,难以出现因热应力的经年变化引起的从外周部起的裂纹,半导体装置的可靠性提高。
图3是表示在导线框的接合部的下表面侧形成的突起部的图。
图3中,放大地表示了导线框22的接合部22b附近。在该接合部22b的下表面侧,即与电子部件24的连接面(背面)侧,沿着开口21的周缘形成了朝向下方的突起部221。该突起部221与焊锡板29的厚度大致相等,并且具有嵌入焊锡板29上形成的缝隙29s内的程度的大小。此外,导线框22的接合部22b上的开口21中,在其表面侧形成阶梯部222。在此对导线框22的其中一个接合部22b进行了说明,但是在另一个接合部22a上也形成有同样的突起部221和阶梯部222。
这样,导线框22能够在突起部221分别与电子部件23、24的电极面直接接触的状态下进行定位。从而,半导体装置的导线框22不仅被金属线部件27在前后左右方向上定位,也能够在水平方向(上下方向)上可靠地定位。因此,焊锡板28、29形成的接合层的厚度均匀化,能够使电子部件23、24的发热高效良好地向外部散热。
图4是表示第一实施方式的半导体装置的制造工序的图。
该图(A)中,表示了在陶瓷基板11的两面分别接合形成了规定形状的金属层构成的导电图案12、13的绝缘基板10,和用接合材料25、26与导电图案12接合的电子部件23、24。此处,执行第一接合工序,该第一接合工序通过用加热炉等对整体加热从而使接合材料25、26熔解,由此在绝缘基板10上的导电图案12的规定位置上接合电子部件23、24。
图4(B)的工序中,对金属线部件27进行超声波接合。此处,具有规定的直径和长度的定位用的金属线部件27的各端部,分别与接合导线框22的电子部件23、24的主面的规定位置接合。此时,能够同时使用其他接合金属线使其他电极与外部端子之间等接合。
图4(C)中表示了使导线框22和焊锡板28、29同时在导电图案12上定位的工序。此处使用的导线框22上,预先形成了能够插入定位用的金属线部件27的大小的开口部21,此外在焊锡板28、29上,也预先形成了如上述图2所示的规定的缝隙28s、29s。之后,通过用加热炉等加热在绝缘基板10上定位后的导线框22和焊锡板28、29使其溶解,使导线框22固定在电子部件23、24之间,第二接合工序完成。
最后,将绝缘基板10固定在底座内,用环氧树脂或凝胶密封电子部件23、24、导电图案12和导线框22,完成半导体装置。
此外,此处以在导电图案12上接合电子部件23、24的第一接合工序为前提,实施固定导线框22的第二接合工序。但是,在通过导线框使电子部件与导电图案之间连接等情况下,也能够同时进行第一接合工序和第二接合工序。
图5是表示第一实施方式的半导体装置中使用的导线框的变形例的俯视图。
此处,作为变形例表示的导线框22M中,开口21被置换为2个分离形成的长孔S1、S2。一方的长孔S1从导线框22M的接合部22a起跨与连接部22j相连的起立部,另一方的长孔S2从接合部22b起跨与连接部22j相连的起立部,分别在导线框22M的长度方向上延长形成。其结果,2个接合部22a、22b被没有形成开口且具有较广面积的连接部22j连接。从而,接受了2个电子部件23、24的发热的导线框22M,能够使热从较广面积的连接部22j向外部效率良好地散热。
(第二实施方式)
图6是表示第二实施方式的半导体装置的一例的图,(A)是半导体装置的俯视图,(B)是沿着B-B线表示的剖视图。此外,图7是表示第二实施方式的半导体装置的等价电路的图。
图示的半导体装置中,以板厚数毫米的金属底板为基体,在该金属底板上,通过锡(Sn)-银(Ag)类的无铅焊锡层(未图示)接合、搭载由陶瓷基板11构成的绝缘基板。然后,在陶瓷基板11上,安装作为功率半导体元件的IGBT芯片23a、23b、二极管芯片24a、24b等。该半导体装置中,将上述功率半导体元件、绝缘基板等封装在树脂外壳中,构成通用IGBT模块。电力半导体元件模块通常以上下臂2个元件为1组,或者以6个元件为1组,在构成逆变器时通常使3个2元件结构的模块并联连接,或者直接使用6元件结构的模块。
此处表示配置了2个IGBT芯片23a、23b和2个二极管芯片24a、24b作为构成逆变器电路的一相的半导体模块(功率模块)的电子部件的半导体装置。
在陶瓷基板11上,配置分为5部分的导电图案12a~12e。在导电图案12a上搭载的IGBT芯片23a和二极管芯片24a,构成与图7所示的正侧(P)的直流端子43连接的IGBT41a和二极管42a。IGBT41a的栅极端子G1从IGBT芯片23a通过配线用金属线30a与导电图案12b连接。
此外,IGBT芯片23a和二极管芯片24a的表面电极,通过第一导线框31与构成输出端子(U端子)45的导电图案12c电连接。在导电图案12c上,搭载构成IGBT41b和二极管42b的IGBT芯片23b和二极管芯片24b,这些表面电极与构成负侧(N)的直流端子44的导电图案12e通过第二导线框32电连接。IGBT41b的栅极端子G2从IGBT芯片23b通过配线用金属线30b与导电图案12d连接。
该半导体装置中使用了2个导线框31、32。例如导线框31如图6(B)所示,具有3个接合部31a、31b、31c。此外,在各接合部31a、31b、31c上,在导线框31的宽度方向上并列3条的长孔Sa1~Sc1、Sa2~Sc2、Sa3~Sc3、Sa4~Sc4以分别陷入起立部之中的方式等间隔地配置。然后,对于这些长孔Sa1~Sc1、Sa2~Sc2、Sa3~Sc3、Sa4~Sc4中各个外侧的位置,接合使二极管芯片24a与IGBT芯片23a的各表面电极连接的定位用的金属线部件Wa1、Wc1、和使IGBT芯片23a的表面电极与导电图案12c连接的定位用的金属线部件Wa2、Wc2。此外,对于导线框32也同样。
从而,在构成逆变器电路的一相的半导体模块的半导体装置中,能够简单且可靠地使2个导线框31、32定位,形成相当于图7所示的等价电路的配线。
图8是表示第二实施方式的半导体装置中使用的导线框的变形例的图,(A)是导线框的俯视图,(B)是沿着B-B线表示的剖视图。
该导线框33与图6所示的导线框31对应,在使其宽度方向上并列3条的长孔Sa1~Sc1、Sa2~Sc2、Sa3~Sc3、Sa4~Sc4的长度形成为较短这一点上不同。例如,关于长孔Sa1~Sc1,与图6(A)的比较,在与二极管芯片24a接合的接合部33a上的长度较短。此外,在与IGBT芯片23a接合的接合部33b上贯通的长孔Sa2~Sc2、Sa3~Sc3,也比图6(A)的更短。进而,在与导电图案12c接合的接合部33c上,以不陷入导线框33的起立部之中的长度,形成U字形状的长孔Sa4~Sc4。
从而,能够使二极管芯片24a和IGBT芯片23a的发热传导至导线框31,效率良好地向外部散热。
图9是表示第二实施方式的半导体装置中使用的定位用的金属线部件的变形例的剖视图。
金属线部件341~344一端与二极管芯片24a和IGBT芯片23a、和导电图案12c的规定位置接合。这些金属线部件341~344如果至少具有向贯通导线框33形成的各长孔Sa1~Sa4的上方突出的长度,就充分能够进行导线框33在绝缘基板10上的定位,具有不浪费使用金属线部件自身即可达到目的的优点。
此外,导线框33的金属板与各芯片23a、24a的半导体相比热膨胀系数较大。因此,通过以贯通导线框33的起立部的方式形成长孔Sa1~Sa3,能够吸收金属板的弯曲。
(第三实施方式)
图10是表示第三实施方式的半导体装置中使用的导线框的一例的图,(A)是导线框的俯视图,(B)是沿着B-B线表示的剖视图,(C)是一部分剖面的放大图。
该导线框35中,在接合部35a~35c上分别贯通形成阶梯圆孔ha1、ha2、hb1~hb5、和hc1、hc2,以代替图8所示的导线框3的长孔。如图10(C)中的放大剖面所示,在阶梯圆孔ha2的背面侧(接合面侧),形成朝向下方的突起部351。此外,在阶梯圆孔ha2的表面侧形成阶梯部352。此外,突起部351的高度H相当于用作接合材料的焊锡板的厚度。
该情况下,也能够通过第二实施方式中作为变形例说明的定位用的金属线部件(图9)容易地进行绝缘基板上的导线框35的定位。此外,容易使接合导线框35时的接合层的厚度均匀化,能够使电子部件23、24的发热高效良好地向外部散热。
以上仅表示本发明的原理。进而,对于本领域技术人员而言能够进行多种变形、变更,本发明并不限定于以上表示、说明了的正确的结构和应用例,对应的所有变形例和等同物视为由附加的权利要求及其等同物规定的本发明的范围。
Claims (12)
1.一种半导体装置,其在形成有金属层的绝缘基板上搭载有多个电子部件,通过使所述电子部件彼此之间或者所述金属层与所述电子部件之间电连接而构成,其特征在于,包括:
定位用的金属线部件,其具有规定的直径和长度,与所述多个电子部件或所述金属层分别接合;
导线框,其跨所述多个电子部件相互之间、或者所述金属层与所述电子部件之间地配置,使所述多个电子部件相互之间、或者所述金属层与所述电子部件之间电连接;和
开口,其为了在所述电子部件或所述金属层的规定位置上接合所述导线框,以所述金属线部件能够插通的大小贯通所述导线框而形成,
所述金属线部件具有向上方突出的形状,
通过在所述开口插通所述金属线部件而使所述导线框在所述绝缘基板上定位。
2.如权利要求1所述的半导体装置,其特征在于:
所述导线框具有:与所述电子部件或所述金属层接触的至少一对接合部;从所述一对接合部分别立起的起立部;和通过所述起立部使所述一对接合部之间连接的连接部,
所述开口是跨所述接合部和所述起立部在所述导线框的长度方向上延长形成的长孔。
3.如权利要求2所述的半导体装置,其特征在于:
所述长孔在所述一对接合部中沿所述导线框的宽度方向排列形成有多个。
4.如权利要求1所述的半导体装置,其特征在于:
在所述导线框上,在与所述电子部件或所述金属层接触的接合部的下表面侧,沿着所述开口的周缘形成有朝向下方的突起部。
5.如权利要求1所述的半导体装置,其特征在于:
所述金属线部件是具有300~500μm直径的铝线或铜线。
6.如权利要求1所述的半导体装置,其特征在于:
所述金属线部件的一端与所述多个电子部件或所述金属层的规定位置接合,所述金属线部件至少具有从贯通所述导线框形成的开口向上方突出的长度。
7.如权利要求1所述的半导体装置,其特征在于:
所述金属层是在所述绝缘基板的两面形成的导电图案。
8.如权利要求1所述的半导体装置,其特征在于:
所述电子部件是构成IGBT或二极管的半导体芯片,
构成为用所述导线框使所述IGBT与所述二极管相互反向并联连接。
9.如权利要求1所述的半导体装置,其特征在于:
所述绝缘基板与底座的上表面软钎焊连接,
所述电子部件通过所述底座与散热部件热连接。
10.一种半导体装置的制造方法,其使在形成有导电图案的绝缘基板上搭载的多个半导体芯片相互之间、或者所述半导体芯片与所述导电图案之间通过导线框电连接,其特征在于,包括:
第一接合工序,在所述绝缘基板上的所述导电图案上通过接合材料接合所述半导体芯片;
金属线接合工序,将具有规定的直径和长度的定位用的金属线与所述半导体芯片或所述导电图案的主面上的接合所述导线框的位置分别接合;
定位工序,准备具有能够插入所述定位用的金属线的大小的开口部的所述导线框,在所述绝缘基板上使所述多个半导体芯片相互之间、或者所述半导体芯片与所述导电图案之间连接时,用所述定位用的金属线使所述导线框定位;和
第二接合工序,使所述导线框的接合部在所述半导体芯片或所述导电图案上的规定位置通过软钎焊层接合;
所述金属线具有向上方突出的形状。
11.如权利要求10所述的半导体装置的制造方法,其特征在于:
所述金属线接合工序与在所述导电图案上接合配线用金属线的工序同时实施。
12.如权利要求10所述的半导体装置的制造方法,其特征在于:
在所述第二接合工序之后,用环氧树脂或凝胶密封所述半导体芯片、所述导电图案和所述导线框。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011174540 | 2011-08-10 | ||
JP2011-174540 | 2011-08-10 | ||
PCT/JP2012/065224 WO2013021726A1 (ja) | 2011-08-10 | 2012-06-14 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103534796A CN103534796A (zh) | 2014-01-22 |
CN103534796B true CN103534796B (zh) | 2016-06-01 |
Family
ID=47668247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201280023267.1A Active CN103534796B (zh) | 2011-08-10 | 2012-06-14 | 半导体装置和半导体装置的制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9076782B2 (zh) |
EP (1) | EP2698817B1 (zh) |
JP (1) | JP5733401B2 (zh) |
CN (1) | CN103534796B (zh) |
WO (1) | WO2013021726A1 (zh) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9609775B2 (en) * | 2012-11-05 | 2017-03-28 | Nsk Ltd. | Semiconductor module |
JP6201626B2 (ja) | 2013-10-23 | 2017-09-27 | スミダコーポレーション株式会社 | 電子部品及び電子部品の製造方法 |
US10741478B2 (en) * | 2016-03-30 | 2020-08-11 | Mitsubishi Electric Corporation | Power module and method of manufacturing the same, and power electronic apparatus and method of manufacturing the same |
US11145575B2 (en) * | 2018-11-07 | 2021-10-12 | UTAC Headquarters Pte. Ltd. | Conductive bonding layer with spacers between a package substrate and chip |
JP7190985B2 (ja) * | 2019-08-05 | 2022-12-16 | 三菱電機株式会社 | 半導体装置 |
JP7341078B2 (ja) * | 2020-02-07 | 2023-09-08 | 日立Astemo株式会社 | 半導体装置 |
JP7396118B2 (ja) * | 2020-02-28 | 2023-12-12 | 富士電機株式会社 | 半導体モジュール |
CN118039508B (zh) * | 2024-04-12 | 2024-06-14 | 无锡利普思半导体有限公司 | 功率模块内部连接工艺 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1893772A (zh) * | 2005-06-30 | 2007-01-10 | 欧姆龙株式会社 | 电路基板 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5590144A (en) * | 1990-11-07 | 1996-12-31 | Fuji Electric Co., Ltd. | Semiconductor laser device |
JP2002110750A (ja) * | 2000-09-29 | 2002-04-12 | Mitsubishi Electric Corp | 電子部品の製造方法並びに接続構造 |
JP2003243608A (ja) * | 2002-02-15 | 2003-08-29 | Mitsubishi Electric Corp | 電力用モジュール |
JP4764692B2 (ja) | 2005-09-29 | 2011-09-07 | 日立オートモティブシステムズ株式会社 | 半導体モジュール |
JP2007335538A (ja) | 2006-06-13 | 2007-12-27 | Sanken Electric Co Ltd | 半導体装置の製法 |
JP5076440B2 (ja) * | 2006-10-16 | 2012-11-21 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
WO2008074164A1 (en) * | 2006-12-21 | 2008-06-26 | Abb Research Ltd | Semiconductor module |
JP4640345B2 (ja) | 2007-01-25 | 2011-03-02 | 三菱電機株式会社 | 電力用半導体装置 |
WO2009081723A1 (ja) | 2007-12-20 | 2009-07-02 | Fuji Electric Device Technology Co., Ltd. | 半導体装置およびその製造方法 |
JP5217013B2 (ja) | 2008-01-11 | 2013-06-19 | 日産自動車株式会社 | 電力変換装置およびその製造方法 |
JP4946959B2 (ja) | 2008-04-09 | 2012-06-06 | 株式会社デンソー | 半導体装置の製造方法 |
JP5119139B2 (ja) | 2008-12-12 | 2013-01-16 | 富士電機株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2011086743A (ja) | 2009-10-15 | 2011-04-28 | Mitsubishi Electric Corp | 電力用半導体装置、及び該電力用半導体装置の製造方法 |
JP5185956B2 (ja) * | 2010-01-06 | 2013-04-17 | 三菱電機株式会社 | 電力用半導体装置 |
JP3163214U (ja) | 2010-05-17 | 2010-10-07 | 富士電機システムズ株式会社 | 半導体装置 |
-
2012
- 2012-06-14 US US14/118,112 patent/US9076782B2/en active Active
- 2012-06-14 EP EP12822675.0A patent/EP2698817B1/en active Active
- 2012-06-14 JP JP2013527923A patent/JP5733401B2/ja active Active
- 2012-06-14 WO PCT/JP2012/065224 patent/WO2013021726A1/ja active Application Filing
- 2012-06-14 CN CN201280023267.1A patent/CN103534796B/zh active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1893772A (zh) * | 2005-06-30 | 2007-01-10 | 欧姆龙株式会社 | 电路基板 |
Also Published As
Publication number | Publication date |
---|---|
JPWO2013021726A1 (ja) | 2015-03-05 |
EP2698817A1 (en) | 2014-02-19 |
EP2698817A4 (en) | 2014-09-17 |
WO2013021726A1 (ja) | 2013-02-14 |
CN103534796A (zh) | 2014-01-22 |
EP2698817B1 (en) | 2018-10-24 |
US20140084438A1 (en) | 2014-03-27 |
US9076782B2 (en) | 2015-07-07 |
JP5733401B2 (ja) | 2015-06-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103534796B (zh) | 半导体装置和半导体装置的制造方法 | |
US9520345B2 (en) | Semiconductor module, semiconductor device having semiconductor module, and method of manufacturing semiconductor module | |
CN102693963B (zh) | 半导体器件及其制造方法 | |
CN101495014B (zh) | 使用引线框和夹片的半导体管芯封装及制造方法 | |
US20170162486A1 (en) | Semiconductor device and method for manufacturing semiconductor device | |
CN101136380B (zh) | 具有多条散热通道的半导体封装结构及其制造方法 | |
CN104170086A (zh) | 半导体装置及半导体装置的制造方法 | |
EP2482312A2 (en) | Power supply module and packaging and integrating method thereof | |
CN102136472B (zh) | 半导体装置模块 | |
US20170042053A1 (en) | Semiconductor device | |
CN104641459A (zh) | 半导体装置 | |
KR102041645B1 (ko) | 전력반도체 모듈 | |
CN102403295B (zh) | 金属键接的半导体封装及其方法 | |
US20180005923A1 (en) | Semiconductor device | |
JP2020519027A (ja) | 半導体モジュール | |
US6917117B2 (en) | Lower the on-resistance in protection circuit of rechargeable battery by using flip-chip technology | |
JP4881256B2 (ja) | パワー半導体モジュール | |
CN100521195C (zh) | 半导体装置 | |
JP4919023B2 (ja) | パワー半導体モジュール実装構造 | |
JP2021044452A (ja) | 半導体装置 | |
CN205376496U (zh) | 一种汽车用二极管器件 | |
CN211529943U (zh) | 一种固体继电器功率组件 | |
WO2024202585A1 (ja) | 半導体装置 | |
RU2118585C1 (ru) | Способ монтажа деталей полупроводникового прибора к основанию и полупроводниковый прибор, полученный этим способом | |
CN209029371U (zh) | 固态继电器用方型晶闸管芯片模块焊接件 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |