CN211529943U - 一种固体继电器功率组件 - Google Patents

一种固体继电器功率组件 Download PDF

Info

Publication number
CN211529943U
CN211529943U CN202020239623.5U CN202020239623U CN211529943U CN 211529943 U CN211529943 U CN 211529943U CN 202020239623 U CN202020239623 U CN 202020239623U CN 211529943 U CN211529943 U CN 211529943U
Authority
CN
China
Prior art keywords
chip
power
substrate
electrode
copper sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202020239623.5U
Other languages
English (en)
Inventor
饶明辉
杨志威
张怡培
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XIAMEN JINXINRONG ELECTRONIC CO Ltd
Original Assignee
XIAMEN JINXINRONG ELECTRONIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by XIAMEN JINXINRONG ELECTRONIC CO Ltd filed Critical XIAMEN JINXINRONG ELECTRONIC CO Ltd
Priority to CN202020239623.5U priority Critical patent/CN211529943U/zh
Application granted granted Critical
Publication of CN211529943U publication Critical patent/CN211529943U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/41—Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H01L2224/4101—Structure
    • H01L2224/4103—Connectors having different sizes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Thyristors (AREA)

Abstract

本实用新型公开一种固体继电器功率组件，包括DCB基板及上面的功率芯片，功率芯片由第一芯片和第二芯片组成，两功率芯片倒装式设置在基板上，每一功率芯片引出一主电极，在两功率芯片的上表面分别焊接一导电片，一功率芯片的导电片通过引线与另一功率芯片的对应电极相连实现功率芯片间的电气连接。本实用新型采用芯片倒装方式，增加导电铜片，该铜片焊接于芯片阳极，铜片上方通过绑定铝丝与另一芯片电气连接，有效地避免应力损伤和热击穿损伤，提高固体继电器的使用寿命。

Description

一种固体继电器功率组件
技术领域
本实用新型公开一种固体继电器功率组件，按国际专利分类表(IPC)划分属于固体继电器制造技术领域。
背景技术
固体继电器是一种无触点通断的电子开关，其输入输出隔离装置、输出功率开关均由电子元器件构成，与电磁继电器相比，这种继电器具有工作可靠、寿命长、对外界干扰小、开关速度快等特点，因而具有很宽的应用领域，尤其在大电流且需要频繁开关的场合，是工程师们的首选。
目前市场上应用的大功率固体继电器的功率组件分为铜桥焊接型和芯片绑定型两种结构，这两种结构在市场应用过程中使用一段时间后容易发生失效：
第一种功率组件结构如中国专利CN203481142U文献中披露，是通过焊接“几”字型铜桥形成电气连接，如图1所示，在继电器频繁开关过程中，因大电流开断会出现热胀冷缩现象，“几”字型导电铜桥a在芯片电极表面焊接层(如图1位置b处)产生收缩应力，导致芯片表面被拉伤而发生失效，属于应力击穿失效；
第二种功率组件结构是在芯片电极表面直接绑定铝丝形成电气连接，如图 2所示，在继电器频繁开关过程中，因大电流开断绑定铝丝(如图2位置c)的温度会急剧上升，铝丝温度上升后，在芯片表面绑定点(如图2位置d)会形成单点热量集中，容易导致芯片表面单点出现过热击穿而发生失效。
以上两种结构的功率组件由于应力击穿失效或热击穿失效，从而使得固体继电器在很多大电流应用领域里显得可靠性不高，不利于市场推广。
在图1、图2中芯片门极通过电桥e向外引出，电桥部件小，实际生产中往往是通过人工贴装，生产效率低。
实用新型内容
针对现有技术的不足，本实用新型提供一种固体继电器功率组件，有效地避免应力损伤和热击穿损伤，提高固体继电器的使用寿命。
为达到上述目的，本实用新型是通过以下技术方案实现的：
一种固体继电器功率组件结构，包括基板及上面的功率芯片，功率芯片由第一芯片和第二芯片组成，两功率芯片倒装式设置在基板上，每一功率芯片引出一主电极，在两功率芯片的上表面分别焊接一导电片，一功率芯片的导电片通过引线与另一功率芯片的对应电极相连实现功率芯片间的电气连接。
进一步，导电片为铜片，铜片焊接在功率芯片的阳极表面，铜片表面绑定引线。
进一步，功率芯片为可控硅芯片，可控硅芯片的阴极朝下阳极朝上与基板贴合形成倒装组合结构。
进一步，可控硅芯片的门极控制信号引出控制电极，控制电极与主电极位于基板上功率芯片的同侧。
进一步，主电极与控制电极邻近基板的结合处设有折弯部，以缓解电极受应力。
进一步，基板为DCB板，引线为铝线或银线或金线材质。
本实用新型与现有技术相比具有如下有益效果：
1、本实用新型的功率组件采用芯片倒装方式，即芯片阴极朝下阳极朝上，倒装方式可以简化电极上方的导电片即铜片设计且易于生产，而导电片没有折弯成型，有效消除了常规“几”字型电桥的折弯应力，提高了固体继电器的使用寿命。
2、本实用新型功率芯片的导电片绑定引线，将单点热量均衡化，使得芯片电极表面不会出现单点热量集中，可以避免发生过热击穿，尤其适用过流冲击保护，有效提高固体继电器的使用寿命。
3、本实用新型芯片倒装时，由于芯片阴极和门极朝下，门极信号由DCB板的铜箔引出，省略了芯片门极电桥(如图1、图2所示)，提高生产效率。
4、本实用新型芯片的控制电极与主电极位于芯片的同侧，可方便焊接。
附图说明
图1是现有一种固体继电器功率组件示意图。
图2是现有另一种固体继电器功率组件示意图。
图3是本实用新型实施例示意图。
图4是本实用新型实施例另一示意图。
具体实施方式
下面结合附图对本实用新型作进一步说明：
实施例：请参阅图3及图4，一种固体继电器功率组件，包括基板1及上面的功率芯片，功率芯片由第一芯片21和第二芯片22组成，两功率芯片倒装式设置在基板1上，每一功率芯片引出一主电极3，在两功率芯片的上表面分别焊接一导电片4，一功率芯片的导电片4通过引线5与另一功率芯片的对应电极相连实现功率芯片间的电气连接，具体是第一芯片21阳极的导电片4通过引线5 与第二芯片22阴极的引出铜箔相连，此铜箔为基板上的预设覆盖铜材料，第二芯片22阳极的导电片4通过引线5与第一芯片21阴极的引出铜箔相连。导电片4为铜片或其他导电金属片，铜片焊接在功率芯片的阳极表面，铜片表面绑定引线5，引线5基于成本和性能考虑，优选为铝线，其他如银线或金线材质也可以实现电联接。本实用新型中涉及的功率芯片为可控硅芯片，可控硅芯片具有阳极、阴极和门极(控制极)，可控硅芯片的阴极朝下阳极朝上与基板贴合形成倒装组合结构。基板1为DCB板，是陶瓷基覆铜板，可控硅芯片的门极控制信号引出控制电极6，控制电极6与主电极3位于基板1上功率芯片的同侧。主电极3与控制电极6邻近基板的结合处设有折弯部31、61，以缓解各电极受应力，本实用新型功率组件为大功率固体继电器组件，使用时电极由于热胀冷缩而使焊接点松动，进而影响继电器的可靠性，而在各电极邻近焊接点处设有折弯，可以有效释放使用过程中应力，提高电子元件连接可靠性。
本实用新型固体继电器功率组件是一种铜片焊接加铝线绑定型结构，与现有的固体继电器产品相比不同之处在于，该技术方案功率组件采用芯片倒装方式，增加了一个方形铜片，该铜片焊接于芯片阳极，铜片上方通过绑定铝丝与另一芯片实现电气连接，有效地避免了“几”字型铜桥的应力损伤和直接绑定方式的热击穿损伤，提高了固体继电器的使用寿命。
本实用新型是在固体继电器内部的功率组件结构设计上，采用芯片倒装方式，芯片阴极朝下阳极朝上，常规芯片组件为阳极朝下阴极朝上，倒装方式可以简化电极上方的铜片设计且易于生产，在芯片阳极表面通过焊接方式连接一块面积相近的方形铜片，如图3所示，铜片表面通过绑定铝丝与另一个芯片的阴极相连，以此实现功率芯片间的电气连接。焊接的方形铜片因为没有折弯成型，有效消除了常规“几”字型铜桥的折弯应力，方形铜片表面走绑定铝线可以将单点热量均衡化，使得芯片电极表面不会出现单点热量集中，可以避免发生过热击穿。
本实用新型主要应用于固体继电器功率组件和控制电路壳体等组装形成的固体继电器，使得固体继电器在大电流频繁通断的应用中，不会因为机械应力过大或过热击穿而过早发生损坏，能够大幅度提高了产品的使用寿命。
本实用新型一种固体继电器功率组件的工艺流程包括以下步骤：
S1、贴片
将DCB板涂抹锡膏，第一芯片21、第二芯片22通过贴片机贴装在DCB板上，其中两芯片的阴极侧与DCB板贴合，两芯片阳极表面贴装导电片4，导电片4为铜片,然后将两主电极3、两控制电极6组装在DCB板上；
S2、焊接
将组装好的DCB板涂抹锡膏，第一芯片、第二芯片、两主电极、控制电极和导电片通过焊接平台进行焊接；
S3、绑定
焊接后一芯片阳极侧的导电片4表面通过绑定机绑定引线5与另一芯片阴极连接形成功率组件，引线5为铝线，铝线一端绑定在铜片上表面，铝线另一端绑定在芯片阴极引出的DCB板连接点位，绑定机也称为引线键合机，是利用热、压力、超声波能量为使金属引线与基板焊盘紧密焊合。
本实用新型中第一、二芯片阴极、门极朝向DCB板，门极借由DCB板预设的铜箔引出，使控制电极与主电极位于两芯片一侧，除主电极3和控制电极6 外均可由贴片机进行贴装，大大提高效率。
本实用新型固体继电器功率组件的工艺中，在贴片前要对DCB板、芯片、主电极等预处理，如清洗表面、烘干等，贴片时需要相应工装，贴片和焊接均并按相应工艺要求进行，如压力温度时间等，绑定引线按预先设置好的键合条数依次完成。
本实用新型并不限于上述实施方式，采用与本实用新型上述实施例相同或近似的结构设计或在本实用新型的精髓和范围上做的替代、修改、等效方法以及方案，均在本实用新型的保护范围之内。

Claims (6)

1.一种固体继电器功率组件，其特征在于：包括基板及上面的功率芯片，功率芯片由第一芯片和第二芯片组成，两功率芯片倒装式设置在基板上，每一功率芯片引出一主电极，在两功率芯片的上表面分别焊接一导电片，一功率芯片的导电片通过引线与另一功率芯片的对应电极相连实现功率芯片间的电气连接。
2.根据权利要求1所述的一种固体继电器功率组件，其特征在于：导电片为铜片，铜片焊接在功率芯片的阳极表面，铜片表面绑定引线。
3.根据权利要求1所述的一种固体继电器功率组件，其特征在于：功率芯片为可控硅芯片，可控硅芯片的阴极朝下阳极朝上与基板贴合形成倒装组合结构。
4.根据权利要求1至3之一所述的一种固体继电器功率组件，其特征在于：可控硅芯片的门极控制信号引出控制电极，控制电极与主电极位于基板上功率芯片的同侧。
5.根据权利要求4所述的一种固体继电器功率组件，其特征在于：主电极与控制电极邻近基板的结合处设有折弯部，以缓解电极受应力。
6.根据权利要求1或2或3或5所述的一种固体继电器功率组件，其特征在于：基板为DCB板，引线为铝线或银线或金线材质。
CN202020239623.5U 2020-03-02 2020-03-02 一种固体继电器功率组件 Active CN211529943U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020239623.5U CN211529943U (zh) 2020-03-02 2020-03-02 一种固体继电器功率组件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020239623.5U CN211529943U (zh) 2020-03-02 2020-03-02 一种固体继电器功率组件

Publications (1)

Publication Number Publication Date
CN211529943U true CN211529943U (zh) 2020-09-18

Family

ID=72460109

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202020239623.5U Active CN211529943U (zh) 2020-03-02 2020-03-02 一种固体继电器功率组件

Country Status (1)

Country Link
CN (1) CN211529943U (zh)

Similar Documents

Publication Publication Date Title
JP5260246B2 (ja) 電力用半導体装置
CN102244066B (zh) 一种功率半导体模块
CN115966542B (zh) 功率模块和具有其的电子设备
US20240203841A1 (en) Novel packaging structure of power semiconductor module
CN205542761U (zh) 功率模块
CN111326489A (zh) 功率器件封装结构
CN211529943U (zh) 一种固体继电器功率组件
CN111933784A (zh) 一种激光芯片的陶瓷封装方法及陶瓷封装芯片结构
CN214411191U (zh) 一种串联式的大功率二极管
CN110911395A (zh) 双面散热igbt模块
CN211428165U (zh) 一种高散热、高可靠性igbt功率模块结构
CN114899162A (zh) 一种模块及其制造方法
CN210467818U (zh) Igbt模块封装结构
CN111312699A (zh) 一种固体继电器功率组件及生产方法
CN207602834U (zh) 一种大功率ipm模块端子连接结构
CN216928548U (zh) Igbt模块用覆铜陶瓷板
CN221201167U (zh) 一种新型高可靠混合型车用单管
CN216413059U (zh) 一种限流式保护器
CN216928573U (zh) 高倍反向电压二极管
CN220569673U (zh) 一种键合片和引线框架一体设置的功率模块
JP2015185731A (ja) 太陽電池モジュール及びその製造方法
CN112289752B (zh) 一种倒装GaN功率器件封装结构及其制备方法
CN218182205U (zh) 大功率igbt覆铜基板结构
CN215119466U (zh) 一种高压大电流SiC单管的叠层母排
CN221080008U (zh) 功率模块

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant