CN103493200B - 半导体装置、逆变器装置及车用旋转电机 - Google Patents

半导体装置、逆变器装置及车用旋转电机 Download PDF

Info

Publication number
CN103493200B
CN103493200B CN201180070201.3A CN201180070201A CN103493200B CN 103493200 B CN103493200 B CN 103493200B CN 201180070201 A CN201180070201 A CN 201180070201A CN 103493200 B CN103493200 B CN 103493200B
Authority
CN
China
Prior art keywords
lead
wire
semiconductor device
substrate
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201180070201.3A
Other languages
English (en)
Other versions
CN103493200A (zh
Inventor
大贺琢也
加藤政纪
杉原刚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN103493200A publication Critical patent/CN103493200A/zh
Application granted granted Critical
Publication of CN103493200B publication Critical patent/CN103493200B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L15/00Methods, circuits, or devices for controlling the traction-motor speed of electrically-propelled vehicles
    • B60L15/007Physical arrangements or structures of drive train converters specially adapted for the propulsion motors of electric vehicles
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60LPROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L50/00Electric propulsion with power supplied within the vehicle
    • B60L50/50Electric propulsion with power supplied within the vehicle using propulsion power supplied by batteries or fuel cells
    • B60L50/51Electric propulsion with power supplied within the vehicle using propulsion power supplied by batteries or fuel cells characterised by AC-motors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49524Additional leads the additional leads being a tape carrier or flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02KDYNAMO-ELECTRIC MACHINES
    • H02K11/00Structural association of dynamo-electric machines with electric components or with devices for shielding, monitoring or protection
    • H02K11/30Structural association with control circuits or drive circuits
    • H02K11/33Drive circuits, e.g. power electronics
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04034Bonding areas specifically adapted for strap connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05567Disposition the external layer being at least partially embedded in the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061Disposition
    • H01L2224/0618Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27011Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/3701Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247Connecting the strap to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247Connecting the strap to a bond pad of the item
    • H01L2224/40249Connecting the strap to a bond pad of the item the bond pad protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485Material
    • H01L2224/48505Material at the bonding interface
    • H01L2224/48699Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73221Strap and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73263Layer and strap connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/8485Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/60Other road transportation technologies with climate change mitigation effect
    • Y02T10/64Electric machine technologies in electromobility
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/60Other road transportation technologies with climate change mitigation effect
    • Y02T10/70Energy storage systems for electromobility, e.g. batteries

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Transportation (AREA)
  • Geometry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Inverter Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本发明的半导体装置包括:通过焊料(61)与第一基板(11)接合的第一MOS-FET(21)、通过焊料(64)与第二基板(12)接合的第二MOS-FET(22)、将第一基板(11)与第二MOS-FET(22)接合的第一引线(31)、以及将第二MOS-FET(22)与电流路径构件(13)接合的第二引线(32),该电流路径构件(13)从外部接受两个MOS-FET(21、22)的导通电流或将两个MOS-FET(21、22)的导通电流传输到外部,第二基板12的刚性高于两条引线(31、32)的刚性,而且,包含由两个MOS-FET(21、22)相对的间隙部(52)、并向两个MOS-FET(21、22)不相对的方向延伸的边界线(D-D)与第二基板(12)相交,而不与两条引线(31、32)相交。

Description

半导体装置、逆变器装置及车用旋转电机
技术领域
本发明涉及一种被密封材料密封的半导体装置、具备该半导体装置的逆变器装置、以及具备该半导体装置及逆变器装置的车用旋转电机。
背景技术
近年来,随着半导体装置的性能提高,特别是车载设备、车用旋转电机对于半导体装置的需求正在增大。车载设备中各元器件正往小型化发展,而车用旋转电机中旋转电机主体与控制装置的一体化使其朝着布线简化、安装性提高的方向发展,从而,用于车载设备、车用旋转电机的半导体装置也随之要求小型化、轻量化,然而,特别是车载设备等的使用环境过于严酷,因此除上述要求之外,还进一步要求其具有高可靠性、耐用等。
一直以来,搭载于半导体装置的MOS-FET有时会由两个MOS-FET串联连接来使用,使其各自构成上臂与下臂,作为其结构,提出了如下的半导体装置:各MOS-FET的源电极或栅电极与各外部端子之间通过焊料及内部引线相接合,且为了使上臂与下臂电导通,在与构成上臂的MOS-FET的源电极相接合的内部引线上设有连接引线部,该连接引线部与安装有构成下臂的MOS-FET且与漏电极抵接的基板的一部分焊接在一起。
现有技术文献
专利文献
专利文献1:日本专利第4102012号(图7)
专利文献2:日本专利第4349364号(图1)
发明内容
发明所要解决的技术问题
这里,在专利文献1、2所公开的结构中,构成上臂与下臂的各MOS-FET相邻且相对,并具有间隙部,上述连接引线部设置成与构成上下臂的各MOS-FET的间隙部相交,专利文献2所公开的结构中,利用密封树脂将构成这些上下臂的各MOS-FET与上述连接引线部进行封装。
在具有上述结构的半导体装置工作时,若温度上升,则由于安装有各MOS-FET的例如由铜形成的基板、与用作为密封树脂的例如环氧树脂的热膨胀系数存在差异,因此,从横向观察半导体装置时,其整体容易变形成V字形。由于这一变形受到上述MOS-FET发热的影响较大,因此以各MOS-FET相邻的间隙部作为弯曲的边界线的变形最大,若将连接引线部设置在该边界线上,则会对该连接引线部也施加外力,从而使其容易变形。因此认为,当连接引线部发生变形时,与连接引线部接合的焊料也会反复受到应力,从而有可能导致焊料开裂,甚至会出现半导体装置损坏的问题。
这里,例如通过增加上述连接引线的板厚、或者添加其它构件等来提高刚性,从而能够减小变形以抑制焊料开裂,但是这样会增加连接引线的成本和重量,此外,板厚的增加也会导致密封树脂的使用量增加,使得半导体装置在高度方向上变大,从而还有可能造成半导体装置大型化、重量增加。另外,也考虑通过在连接引线上设置弯曲部来利用该部分吸收应力,从而缓和焊料上所受到的应力,但这样做也有限制,且还会导致加工费增加。
本发明是为了解决上述问题而完成的,因此,其目的在于提供一种半导体装置、具备该半导体装置的逆变器装置、以及具备该半导体装置和逆变器装置的车用旋转电机,其能够抑制半导体装置工作时因变形而导致的接合材料开裂,从而能够提高可靠性及延长寿命。
解决技术问题所采用的技术方案
本发明的半导体装置包括:由导电体形成的第一基板;第一半导体元件,该第一半导体元件的第一电极面通过接合材料电接合在所述第一基板上;由导电体形成的第二基板,该第二基板与所述第一基板隔开距离;第二半导体元件,该第二半导体元件与所述第一半导体元件相邻,且该第二半导体元件的第一电极面通过接合材料电接合在所述第二基板上;第一引线,该第一引线通过接合材料将所述第一半导体元件的第二电极面与所述第二基板电接合;电流路径构件,该电流路径构件与所述第一基板及所述第二基板都隔开距离,从外部接受所述两个半导体元件的导通电流、或向外部传输所述两个半导体元件的导通电流;第二引线,该第二引线通过接合材料将所述第二半导体元件的第二电极面与所述电流路径构件电接合;以及密封材料,该密封材料至少将所述各构成部件进行密封,所述第二基板的刚性高于所述第一引线及所述第二引线的刚性,并且,包含所述第一半导体元件与所述第二半导体元件相对的间隙部,并且,沿着所述两个半导体元件不相对的方向延伸的边界线与所述第二基板相交,而不与所述第一引线及所述第二引线相交。
发明效果
根据本发明,变形最大的半导体元件之间的边界线上构成为与刚性高于各引线的第二基板相交。由于第二基板在该边界线上的变形要小于各引线的变形,因此,能够缓和与第二基板相接合的接合材料上的应力。另一方面,由于能够将各引线设置在变形较小的部位,因此,能够缓和与各引线相接合的接合材料上的应力。其结果是,能够抑制接合材料发生开裂,能够提供可靠性及寿命均得到提高的半导体装置、具备该半导体装置的逆变器装置、以及具备该半导体装置和逆变器装置的车用旋转电机。
附图说明
图1是表示本发明实施方式1的半导体装置的俯视图。
图2是沿图1的箭头A-A看到的半导体装置的剖视图。
图3是沿图1的箭头B-B看到的半导体装置的剖视图。
图4是沿图1的箭头C-C看到的半导体装置变形时的剖视图。
图5是表示本发明实施方式2的半导体装置的俯视图。
图6是沿图5的箭头G-G看到的半导体装置的剖视图。
图7是沿图5的箭头G-G看到的半导体装置变形时的剖视图。
图8是本发明实施方式1和2的半导体装置的电路图。
图9是表示本发明实施方式3的逆变器装置的俯视图。
图10是包含本发明实施方式3的逆变器装置的旋转电机的电路图。
图11是表示本发明实施方式4的半导体装置的俯视图。
图12是本发明实施方式4的半导体装置的电路图。
具体实施方式
实施方式1
图1是表示本发明实施方式1的半导体装置的俯视图,图2是沿图1的箭头A-A看到的半导体装置的剖视图,图3是沿图1的箭头B-B看到的半导体装置的剖视图,图4是沿图1的箭头C-C看到的半导体装置变形时的剖视图,图8是图1的半导体装置的电路图。以下,对各图中相同或相当的部分附上同一标号来进行说明。为方便起见,各俯视图中简化了密封树脂。
图1中,半导体装置1包括:第一基板11、第二基板12、电流路径构件13、作为半导体元件的第一MOS-FET21和第二MOS-FET22、第一引线31、第二引线32、铝线41、42及栅电极用引线14、15,上述各元器件被作为密封材料的密封树脂51封装。
如图1和图2所示,第一基板11的上表面设置有第一MOS-FET21,形成在第一MOS-FET21的下表面上的漏电极211通过接合材料61即焊料而与第一基板11的上表面电接合。第一基板11由用于设置第一MOS-FET21的部位、和与正极端子71(未图示)电接合的正极端子接合部111构成。第一MOS-FET21的上表面具有源电极212与栅电极213。对于该第一MOS-FET21的上表面上形成有源电极212和栅电极213的部位以外的部位,利用在前序工序中形成的保护膜214来保护其表面。
第一MOS-FET21的上表面上所设置的源电极212通过接合材料62即焊料,与由板状金属形成的第一引线31的一端电接合,第一引线31的另一端通过接合材料63即焊料而与第二基板12电接合。这里,第二基板12在其一部位上设有靠近第一引线31的突起部121,在该部位与第一引线31电接合。第二基板12包括:配置于其一端的控制端子接合部122、配置于另一端且与输出端子72(未图示)电接合的输出端子接合部123、以及位于它们之间的用于设置第二MOS-FET22的部位。控制端子接合部122与用于输入源极信号的控制端子73(未图示)相连接。
第一MOS-FET21的栅电极213通过铝线41而与栅电极用引线14电接合。栅电极用引线14与用于输入栅极信号的控制端子74(未图示)相连接。
接下来,如图3所示,第二MOS-FET22设置于第二基板12的上表面,形成在第二MOS-FET22的下表面上的漏电极221通过接合材料64即焊料而与第二基板12的上表面电接合。与第一MOS-FET21相同,第二MOS-FET22也在其上表面具有源电极222及栅电极223,对于该第二MOS-FET22的上表面上形成有源电极222和栅电极223的部位以外的部位,利用在前序工序中形成的保护膜224来保护其表面。第二MOS-FET22的上表面上所设置的源电极222通过接合材料65即焊料,与由板状金属形成的第二引线32的一端电接合,第二引线32的另一端通过接合材料66即焊料而与电流路径构件13电接合。这里,与第二基板12相同,电流路径构件13在其一部位上设有靠近第二引线32的突起部131,在该部位与第二引线32电接合。电流路径构件13具有与负极端子75(未图示)电连接的负极端子接合部132(未图示)。
另外,第二MOS-FET22的栅电极223也与第一MOS-FET21的情况相同,通过铝线42与栅电极用引线15电接合。栅电极用引线15与用于输入栅极信号的控制端子76(未图示)相连接。
第一基板11和第二基板12在各自的上表面分别设置有MOS-FET21、22,因此需要抑制这些基板发生翘曲,使其具有一定程度的刚性(例如,板厚为0.8mm的铜板或铜合金板)。另一方面,第一引线31和第二引线32的板宽、板厚取决于各MOS-FET21、22的导通电流。通常而言,只要第一引线31及第二引线32的刚性低于第一基板11及第二基板12的刚性即可(例如板厚为0.4mm的铜板或铜合金板)。
这里,第一MOS-FET21和第二MOS-FET22相邻设置,且具有间隙部52,如图1所示,使得分别构成各MOS-FET21、22的四条边中,长边方向的边彼此相对。各MOS-FET21、22以该间隙部为中心而设置成点对称,若将包含该间隙部52、且同时平行于各MOS-FET21、22的长边方向的边而延伸的线定义为边界线D-D,则分别与第一MOS-FET21的源电极212和第二MOS-FET22的源电极222焊接在一起的第一引线31和第二引线32的延伸方向彼此反向,并且与边界线D-D平行。
而且,在第二基板12上,在与第一引线31焊接的部位和与第二MOS-FET22焊接的部位之间设有应力吸收部124,在该部分,第二引线12与边界线D-D相交。该应力吸收部124在平行于边界线D-D的方向上的宽度比第二引线12的其它部分要短,从而,减小该应力吸收部124在以边界线D-D为弯曲线的变形方向上的刚性。
另外,如图1、图2、图3所示,为了保护其免受外部环境的影响,采用传递模塑法等,用密封树脂51将第一MOS-FET21、第二MOS-FET22、焊料61~66、第一引线31、第二引线32、铝线41、42、及栅电极用引线14、15进行密封,使得第一基板11的正极端子接合部111、第二基板12的控制端子接合部122、输出端子接合部123、电流路径构件13的负极端子接合部132、栅电极用引线14、15的一部分露出,从而形成图1所示的俯视时为四边形的封装结构。此外,第一基板11上用于接合第一MOS-FET21的部位的下表面侧、以及第二基板12上用于接合第二MOS-FET22的部位的下表面侧等从密封树脂51露出,以用于形成散热面。
图8中示出了上述结构的半导体装置1的电路图。第一MOS-FET21构成半导体装置1的上臂81,第二MOS-FET22构成下臂82。
这里,当半导体装置1工作时,包含各MOS-FET21、22、第一引线11、第二引线12在内的半导体装置1整体的温度会上升,在这种情况下,由于由材料为例如铜或铜合金形成的第一引线11、第二引线12、与由材料为例如环氧树脂形成的密封树脂51之间的热膨胀系数存在差异,因此,半导体装置1的整体形状如图4所示,容易向着热膨胀系数较小的密封树脂51变形成V字形,尤其是受到各MOS-FET21、22发热的影响,使得以各MOS-FET21、22相邻且相对的边界线D-D为弯曲线的变形最大。
本实施方式1中,该边界线D-D设置成不与第一引线31、第二引线32相交,且与第二基板12相交。因此,第一引线31、第二引线32能够远离变形弯曲线即边界线D-D,使其上施加的外力变小,从而抑制其变形。因而,能够缓和与第一引线31相接合的焊料62、63上所施加的应力。另一方面,虽然边界线D-D与第二基板12相交,但第二基板12的刚性要高于第一引线31、第二引线32的刚性,从而,对于所施加的外力,比第一引线31、第二引线32能抑制变形。因此,与第一引线31、第二引线32的各焊接部相比,与第二基板12相接合的焊料63、64上所施加的应力也能得到缓和。其结果是,所有的焊接部位都能抑制焊料开裂的发生,从而能够提高半导体装置1的可靠性及延长其寿命。
此外,本实施方式1中,将第二基板12与边界线D-D相交的位置设在各MOS-FET21、22相邻且相对的间隙部52之外。即使将该间隙部52作为第二基板12与边界线D-D相交的位置,如上所述,由于第二基板12的刚性高于第一引线31、第二引线32的刚性,因此,也能够抑制焊料开裂,从而提高半导体装置1的可靠性并延长其寿命,但是,所述间隙部52是最接近发热较大的各MOS-FET21、22的位置,也是变形最大的部位,因此,使第二基板12与边界线D-D在该间隙部以外的位置相交能够进一步抑制半导体装置1的变形,其效果更好。
此外,本实施方式1中,在第二基板12上与边界线D-D相交的位置上设有应力吸收部124。从而,在半导体装置1变形时,该应力吸收部124会吸收应力,因此,能够缓和第二引线12上与第一引线31焊接在一起的焊接部上所施加的应力、与第二MOS-FET22的漏电极221焊接在一起的焊接部上所施加的应力,由此能够在这些部位进一步抑制焊料开裂,进一步提高半导体装置1的可靠性,进一步延长其寿命。
本实施方式1中,应力吸收部124通过缩短其在平行于边界线D-D的方向上的宽度来减小刚性,使其低于第二基板12的其它部分,但并不限于这种结构,例如也可以通过冲压加工等使板厚变薄,或者利用通孔、凹部、切口形状等来设置宽度狭窄部,从而使应力吸收部124的刚性低于第二基板12的其它部分的刚性,或者设置会在与边界线D-D相交的方向上弯曲的弯曲部,也能获得同样的效果。
此外,以往将用于与构成上下臂81、82的各MOS-FET21、22电接合的第一引线31与边界线D-D上、相邻于第一MOS-FET21、第二MOS-FET22的间隙部52相交,并与第二基板12接合,因此,为了确保该接合部位,该间隙部52必须要有规定的间隙,但本实施方式1中,在该间隙部52不需要接合部位,因此能够减小间隙部52,从而能够使半导体装置1整体小型化。
另外,本实施方式1中,将同类型的第一MOS-FET21、第二MOS-FET22以其间隙部52为中心设置成点对称,而且,第一引线31从与第一MOS-FET21的接合部开始延伸的方向平行于第一引线32从与第二MOS-FET22的接合部开始延伸的方向且互为反向。通过采用上述结构,与第一MOS-FET21、第二MOS-FET22、以及第一引线31、第二引线32平行且同向配置的情况相比,能够缩短半导体装置1在与边界线D-D平行的方向上的长度,因此,能够高效地利用空间,使整体小型化,并且还能够减少密封树脂51的使用量,从而能够减轻重量,降低成本。而且,通过实现小型化,能够抑制半导体装置1变形,其结果是能够进一步抑制焊料开裂的发生,从而能够进一步提高半导体装置1的可靠性,延长其寿命。
另外,本实施方式1中,记载了将第一引线31、第二引线32平行且反向地配置的情况,但并不限于此,当假设第一引线31、第二引线32在离开边界线D-D的方向上配置时,只要半导体装置1在与边界线D-D正交的方向上的尺寸不变大,整体就能小型化。
此外,第二基板12在其一部分上具有突起部121,在该部位通过焊料63而与第一引线31相接合,电流路径构件13也同样具有突起部131,该部位通过焊料66与第二引线32相接合。从而,由于能够确保焊料63、66的涂布高度,因此,能够提高焊料涂布的操作性,并且焊料涂布量也随之增加,能够提高焊接的可靠性。从而,由于能够抑制焊接部的发热,因此也能够抑制其变形,使得半导体装置1整体的可靠性也得到提高,寿命得到延长。另外,当上述接合是通过例如熔接等来进行时,只要具有突起部121、131,就能提高熔接面的面压,因此,能够提高半导体装置1的可靠性。
本实施方式1中,说明了在第二基板12和电流路径构件13上分别设置突起部121、131的情况,但并不限于此,突起部也可以设置在第二基板12或电流路径构件13的任一方,或者将突起部设置在第一引线31、或第二引线32上也能获得同样的效果。
实施方式2
图5是表示本发明实施方式2的半导体装置的俯视图,图6是沿图5的箭头G-G看到的半导体装置的剖视图,图7是沿图5的箭头G-G看到的半导体装置变形时的剖视图,图8是图5的半导体装置的电路图。实施方式2的半导体装置2的结构中,除第一引线31、第二引线32以外,其它结构均与实施方式1的相同,因此省略其详细说明。
如图5和图6所示,第一引线31从第一MOS-FET21的上方向第二基板12的突起部121延伸,但在第一MOS-FET21与第二基板12的突起部121之间的部分设有弯曲部311来作为应力吸收部。弯曲部311向半导体装置2的上方弯曲,从而远离第一基板11、第二基板12。这里,如图6所示,在第一引线31上用于焊接的部位之间,具有在与第一引线31相交的方向上延伸的线,将该线定义为边界线E-E。
边界线E-E远离于当半导体装置2工作时会发热的第二MOS-FET22,虽然边界线E-E上发生的变形要小于以边界线D-D为弯曲线的变形,但半导体装置2仍会以该部位为弯曲线而变形成V字形。
这里,如图7所示,通过采用本实施方式2的结构,即使半导体装置2中发生了以边界线E-E为弯曲线的变形,其弯曲部311也会吸收应力,因此,能够缓和第一引线31与第一MOS-FET21相接合的焊料部、或者与第二基板12相接合的焊料部上所施加的应力。因而,在该部位也能够抑制焊料开裂的发生,而无需增大第二基板12的刚性,因此,能够进一步提高半导体装置2的可靠性并延长其寿命。
此外,设置在第一引线31上的弯曲部311向靠近第一基板11及第二基板12的方向弯曲时,也能获得同样的效果,或者并不限于设置弯曲部311,而是通过例如冲压加工等使板厚变薄,或者利用通孔、凹部、切口形状等来设置狭小部,从而使其刚性低于第一引线31上的其它部分的刚性,也能得到同样的效果。
除此以外,在第二引线32的相同部位设置弯曲部321等时,对于以与第二引线32相交的边界线F-F为弯曲线的变形,也能起到相同的效果。
本实施方式2中,以MOS-FET作为2个半导体元件进行了说明,但并不限于此,例如也可以是IGBT或其它半导体元件,但由于MOS-FET工作时发热较大,因此半导体装置整体的变形也较大,如果对其应用本发明,则半导体装置的可靠性提高及寿命延长的效果较为显著。
实施方式3
图9是表示使用本发明的半导体装置的逆变器装置的俯视图,图10是包含该逆变器装置的旋转电机的电路图。
图9中,6个半导体装置1设置在同心圆上,由此构成逆变器装置3,半导体装置1的正极端子71与负极端子75分别设置在由密封树脂51形成的四边形封装的相对的侧面上。
半导体装置1中,有一半形成以与构成同心圆的平面垂直的面为对称面的面对称结构,且分别沿径向交替配置。
这里,半导体装置1的正极端子71设置在半导体装置1的内侧(同心圆的中心侧),呈正六边形,与供电用的正电压供给构件91电接合,该正电压供给构件91通过未图示的布线而与蓄电单元401的正极(未图示)电接合。同样,半导体装置1的负极端子75设置在半导体装置1的外侧(同心圆的中心侧的相反侧),与供电用的负电压供给构件92电接合,该负电压供给构件92通过未图示的布线而与蓄电单元401的负极(未图示)电接合。这些部位上的电接合例如通过熔接、焊接等来进行。此外,各个半导体装置1所形成的各相的输出端子72还通过未图示的布线而与后述的旋转电机4的线圈相连接。
下面,对使用该逆变器装置3的旋转电机4进行说明。如图10所示,旋转电机4包括控制单元402、逆变器装置3、固定线圈403和可动线圈404,兼用作电动机和发电机。即,旋转电机4上一体地安装有控制单元402与逆变器装置3。2个固定线圈403的各相通过半导体装置1的各输出端子72而与蓄电单元401电接合,通过由控制单元402向各半导体装置1的各MOS-FET21、22发送栅极信号,使各MOS-FET21、22导通/截止,从而切换固定线圈403的各相中流过的电流。该旋转电机4不仅可以利用来自控制单元402的信号来驱动可动线圈404,还可以利用可动线圈404的旋转来进行发电。
半导体装置1如前所述,能够抑制焊料开裂的发生从而提高可靠性及延长寿命,因此,若将该半导体装置1应用到逆变器装置3,则不仅逆变器装置3能够提高可靠性及延长寿命,使用该逆变器装置3的旋转电机4也能提高可靠性及延长寿命,尤其是车用等对于可靠性及寿命的要求较为严格的情况,十分有效。而且,如上所述,半导体装置1与现有的结构相比,能够减小第一MOS-FET21与第二MOS-FET22相对且相邻的间隙部,在这种情况下,若如图9所示那样将半导体装置1设置到逆变器装置3中,则能够减小同心圆在径向上的长度,从而在半导体装置1的内侧及外侧的空闲空间能够分别设置正电压供给构件91及负电压供给构件92。在以往只能确保半导体装置1的同心圆内侧或外侧仅有一侧有空间的情况下,半导体装置1、正电压供给构件91、负电压供给构件92是将与配置有半导体装置1的同心圆所在的平面平行的层设置在上方而进行层叠的结构,因此,逆变器装置3会大型化,但通过采用本发明的结构,半导体装置1、正电压供给构件91、负电压供给构件92能够设置在同一平面上,通过减小逆变器装置3的厚度,能够使逆变器装置3实现小型化。
另外,本实施方式3中,半导体装置1的多个正极端子71与单一的正电压供给构件91电接合,该正电压供给构件91通过布线与蓄电单元401的正极电接合。因此,无需另外用布线来将各正极端子71与蓄电单元401的正极接合,只要用单一的布线将与各正极端子71电接合的正电压供给构件91与蓄电单元401的正极连接起来即可,因此,能够使布线紧凑,从而提高连接部的可靠性并延长寿命,其结果是能够实现逆变器装置3的小型化,并能削减成本。
此外,构成逆变器装置3的半导体装置1中,有一半是以与构成同心圆的平面垂直的面为对称面、一部分半导体装置1与另一部分半导体装置1呈面对称的结构,各半导体装置1在同心圆的径向上交替配置。当半导体装置1的负极端子75不是设置在连接同心圆中心与半导体装置1中心的线上,而是设置在偏离该线的位置上时,通过上述那样交替配置,使得相邻的半导体装置1各自的负极端子75之间的相对距离变短,将这些负极端子75与负电压供给构件92相连接的布线变得紧凑,因此,能够提高连接部的可靠性并延长寿命,其结果是能够实现逆变器装置3的小型化,并削减成本。
另外,由于本发明的半导体装置和逆变器装置具有上述那样能够实现小型化、削减成本的效果,因此,一体地安装有该半导体装置和该逆变器装置的兼用作电动机的发电机即旋转电机4也能得到同样的效果。尤其是车用旋转电机对于小型化等要求十分严格,因此效果显著。
此外,本实施方式3中,半导体装置1的个数为6个(6相),但并不限于此,正电压供给构件91也不限于六边形,也可以是多边形或圆形。
此外,本实施方式3中,将正电压供给构件91设置在半导体装置1的内侧,但也可以将负电压供给构件92设置在内侧。在这种情况下,通过如下方式能够进行应对:调换半导体装置1的正极端子71与负极端子75的位置,改变电路结构,以使得半导体装置1的负极端子75位于内侧。
实施方式4
图11是表示本发明实施方式4的半导体装置的俯视图,图12是图11的半导体装置的电路图。实施方式1中说明的半导体装置1具有一对上下臂81、82,各臂分别有一个MOS-FET21和一个MOS-FET22,但本发明的半导体装置并不限于此,也可以在一个半导体装置中内置2对以上的上下臂。本实施方式4中,如图11和图12所示,对一个半导体装置5具有2对上下臂81~84的情况进行简要说明。
具体而言,在第一基板11上除了第一MOS-FET21以外,还电接合有第三MOS-FET23的漏电极(未图示),第三MOS-FET23的源电极(未图示)通过第三引线33与第三基板16电接合。第三基板16上电接合有第四MOS-FET24的漏电极(未图示),且该第四MOS-FET24的源电极(未图示)通过第二引线32与电流路径构件13电接合。另外,第三MOS-FET23、第四MOS-FET24的栅电极233、243通过铝线43、44,分别与栅电极用引线17、18电接合,从而与输入栅极信号的控制端子741、761(未图示)相连接。第三基板16上包含有用于输出来自第四MOS-FET24的源电极的信号的控制端子接合部162、和与输出端子721(未图示)电接合的输出端子接合部163,控制端子接合部162与控制端子731(未图示)电接合。密封树脂51将这些第一~第四MOS-FET21~24、第一~第三基板11~12、16、电流路径构件13、第一~第三引线31~33、铝线41~44、及栅电极用引线14、15、17、18进行密封,形成图11所示的从上方俯视时为四边形的封装。
在采用上述结构的情况下,如图11所示,与正极端子71(未图示)及负极端子75(未图示)电接合的第一基板11的正极端子接合部111与第三基板13的负极端子接合部132被配置在图11的左右侧的上下臂81~84所共用,因此,能够减少部件数,从而削减成本,减轻重量,并且能够提高空间利用率,进而能够实现高集成的半导体装置。
另外,在这些实施方式1~4中,如图2~5所示,第一基板11上与第一MOS-FET11接合的部位的下表面侧、第二基板12上与第二MOS-FET12接合的部位的下表面侧等从密封树脂51露出,以形成散热面,但不限于此,例如也可以是被密封树脂51覆盖,或者被未图示的导热性绝缘构件所覆盖。此外,接合材料61~66也可以是导电性粘接剂,但优选使用机械强度较高的材料。
另外,密封树脂51除了环氧树脂以外,也可以是陶瓷、玻璃等进行气密性密封的材料。
标号说明
1、2半导体装置
3逆变器装置
4旋转电机
11第一基板
12第二基板
121突起部
13电流路径构件
131突起部
21第一MOS-FET
211漏电极
212源电极
22第二MOS-FET
221漏电极
222源电极
31第一引线
311弯曲部
32第二引线
321弯曲部
51密封树脂
52间隙部
61~66焊料
91正电压供给构件
92负电压供给构件

Claims (13)

1.一种半导体装置,其特征在于,包括:
由导电体形成的第一基板;
第一半导体元件,该第一半导体元件的第一电极面通过接合材料电接合在所述第一基板上;
由导电体形成的第二基板,该第二基板与所述第一基板隔开距离;
第二半导体元件,该第二半导体元件与所述第一半导体元件相邻,且该第二半导体元件的第一电极面通过接合材料电接合在所述第二基板上;
第一引线,该第一引线通过接合材料将所述第一半导体元件的第二电极面与所述第二基板电接合;
电流路径构件,该电流路径构件与所述第一基板及所述第二基板都隔开距离,从外部接受所述第一半导体元件和所述第二半导体元件的导通电流、或向外部传输所述第一半导体元件和所述第二半导体元件的导通电流;
第二引线,该第二引线通过接合材料将所述第二半导体元件的第二电极面与所述电流路径构件电接合;以及
密封材料,该密封材料至少将所述第一基板、所述第一半导体元件、所述第二基板、所述第二半导体元件、所述第一引线、所述电流路径构件及所述第二引线进行密封,
所述第二基板的刚性高于所述第一引线及所述第二引线的刚性,
并且,将由所述第一半导体元件与所述第二半导体元件相对的间隙部包含在内的、沿着所述第一半导体元件和所述第二半导体元件不相对的方向延伸的边界线与所述第二基板相交,而不与所述第一引线及所述第二引线相交,
所述第一引线从与所述第一半导体元件的接合部开始延伸的方向平行于所述第二引线从与所述第二半导体元件的接合部开始延伸的方向且互为反向地进行配置。
2.如权利要求1所述的半导体装置,其特征在于,
所述第二基板与所述边界线上间隙部以外的部分相交。
3.如权利要求1所述的半导体装置,其特征在于,
所述第二基板上与所述边界线相交的部分的刚性低于其它部分的刚性。
4.如权利要求1所述的半导体装置,其特征在于,
在所述第二基板上与所述边界线相交的部分,设有用于吸收应力的弯曲部。
5.如权利要求1所述的半导体装置,其特征在于,
所述第一半导体元件和所述第二半导体元件以所述间隙部为中心而设置成点对称,
所述第一引线从与所述第一半导体元件的接合部开始延伸的方向是所述边界线延伸的一个方向,并且,
所述第二引线从与所述第二半导体元件的接合部开始延伸的方向是所述边界线延伸的另一个方向。
6.如权利要求1所述的半导体装置,其特征在于,
所述第二基板上与所述第一引线的接合部、和所述电流路径构件上与所述第二引线的接合部中的至少一个接合部设有突起部。
7.如权利要求1所述的半导体装置,其特征在于,
所述第一引线或所述第二引线上,各自形成的所述接合部之间的部分的刚性低于其它部分的刚性。
8.如权利要求1所述的半导体装置,其特征在于,
所述第一引线或所述第二引线上,在各自形成的所述接合部之间的部分设有用于吸收应力的弯曲部。
9.如权利要求1所述的半导体装置,其特征在于,
所述半导体元件为MOS-FET。
10.一种逆变器装置,其特征在于,
具备权利要求1至9中任一项所述的半导体装置。
11.如权利要求10所述的逆变器装置,其特征在于,包括:
设置在同一平面上且设置在同心圆上的多个所述半导体装置;
与所述半导体装置相比更靠近同心圆内侧的、从所述密封材料露出的所述第一基板的一部分或所述电流路径构件的一部分;以及
设置在所述平面上而与所述露出的一方的一部分相对的一个供电构件,所述一个供电构件与直流电源的一极相连接,并且与2个以上的所述半导体装置的所述露出的一方的一部分电接合。
12.如权利要求11所述的逆变器装置,其特征在于,包括:
相邻设置的一对所述半导体装置,其具有以垂直于所述平面的面为对称面的面对称结构;以及
设置在所述平面上且位于与所述半导体装置相比更靠近同心圆外侧的另一个供电构件,所述另一个供电构件与所述直流电源的另一极相连接,并且与所述露出的另一方的一部分电接合,
所述露出的另一方的一部分与所述另一个供电构件电接合的接合部的位置偏离于将所述同心圆的中心与所述半导体装置的中心相连接的线。
13.一种车用旋转电机,其特征在于,
具备权利要求10所述的逆变器装置。
CN201180070201.3A 2011-04-18 2011-04-18 半导体装置、逆变器装置及车用旋转电机 Active CN103493200B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2011/002253 WO2012143964A1 (ja) 2011-04-18 2011-04-18 半導体装置及びこれを備えたインバータ装置、並びにこれらを備えた車両用回転電機

Publications (2)

Publication Number Publication Date
CN103493200A CN103493200A (zh) 2014-01-01
CN103493200B true CN103493200B (zh) 2016-06-22

Family

ID=47041123

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180070201.3A Active CN103493200B (zh) 2011-04-18 2011-04-18 半导体装置、逆变器装置及车用旋转电机

Country Status (5)

Country Link
US (1) US9117688B2 (zh)
EP (1) EP2701192B1 (zh)
JP (1) JP5821949B2 (zh)
CN (1) CN103493200B (zh)
WO (1) WO2012143964A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9024407B2 (en) * 2011-12-07 2015-05-05 United Microelectronics Corporation Monitoring testkey used in semiconductor fabrication
JP6582568B2 (ja) * 2014-07-31 2019-10-02 株式会社デンソー 駆動装置、および、これを用いた電動パワーステアリング装置
JP2017199827A (ja) * 2016-04-28 2017-11-02 三菱電機株式会社 パワー半導体装置
JP6770452B2 (ja) * 2017-01-27 2020-10-14 ルネサスエレクトロニクス株式会社 半導体装置
JP6366806B1 (ja) * 2017-10-25 2018-08-01 三菱電機株式会社 電力用半導体装置
WO2020230894A1 (ja) * 2019-05-16 2020-11-19 三菱電機株式会社 電力変換装置
US20220319965A1 (en) * 2019-08-09 2022-10-06 Rohm Co., Ltd. Semiconductor Device
JP2022021719A (ja) * 2020-07-22 2022-02-03 株式会社デンソー 半導体装置
JP2022146340A (ja) * 2021-03-22 2022-10-05 株式会社東芝 半導体装置
JPWO2023209793A1 (zh) * 2022-04-26 2023-11-02

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211904A (zh) * 2006-12-28 2008-07-02 株式会社日立制作所 双向开关模块

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08148623A (ja) 1994-11-24 1996-06-07 Rohm Co Ltd 半導体装置
JP3793407B2 (ja) * 2000-09-19 2006-07-05 株式会社日立製作所 電力変換装置
JP4102012B2 (ja) 2000-09-21 2008-06-18 株式会社東芝 半導体装置の製造方法および半導体装置
JP2002217364A (ja) * 2001-01-15 2002-08-02 Nissan Motor Co Ltd 半導体実装構造
JP4039288B2 (ja) 2003-03-25 2008-01-30 日産自動車株式会社 電力変換装置
JP4244318B2 (ja) 2003-12-03 2009-03-25 株式会社ルネサステクノロジ 半導体装置
JP2005217072A (ja) * 2004-01-28 2005-08-11 Renesas Technology Corp 半導体装置
JP4349364B2 (ja) 2005-12-26 2009-10-21 三菱電機株式会社 半導体装置
JP4916745B2 (ja) * 2006-03-28 2012-04-18 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8008805B2 (en) * 2006-12-07 2011-08-30 Nissan Motor Co., Ltd. Power conversion apparatus and motor drive system
US7847376B2 (en) * 2007-07-19 2010-12-07 Renesas Electronics Corporation Semiconductor device and manufacturing method of the same
JP5107839B2 (ja) * 2008-09-10 2012-12-26 ルネサスエレクトロニクス株式会社 半導体装置
JP5294913B2 (ja) * 2009-02-16 2013-09-18 京セラ株式会社 素子搭載用基板
JP5467799B2 (ja) * 2009-05-14 2014-04-09 ルネサスエレクトロニクス株式会社 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101211904A (zh) * 2006-12-28 2008-07-02 株式会社日立制作所 双向开关模块

Also Published As

Publication number Publication date
WO2012143964A1 (ja) 2012-10-26
EP2701192A1 (en) 2014-02-26
US9117688B2 (en) 2015-08-25
JP5821949B2 (ja) 2015-11-24
JPWO2012143964A1 (ja) 2014-07-28
CN103493200A (zh) 2014-01-01
EP2701192A4 (en) 2015-11-18
US20130320818A1 (en) 2013-12-05
EP2701192B1 (en) 2017-11-01

Similar Documents

Publication Publication Date Title
CN103493200B (zh) 半导体装置、逆变器装置及车用旋转电机
JP7457812B2 (ja) 半導体モジュール
US9806009B2 (en) Semiconductor device and power converter using the same
JP4660214B2 (ja) 電力用半導体装置
US9236330B2 (en) Power module
JP4884830B2 (ja) 半導体装置
WO2010016426A1 (ja) 半導体装置および半導体装置を用いた電力変換装置
CN102237343B (zh) 用连接片实现连接的半导体封装及其制造方法
CN107093587B (zh) 半导体装置及其制造方法
US11469160B2 (en) Power module with active elements and intermediate electrode that connects conductors
JP4885046B2 (ja) 電力用半導体モジュール
JP2016059148A (ja) 電力変換装置
KR102228945B1 (ko) 반도체 패키지 및 이의 제조방법
JP4491244B2 (ja) 電力半導体装置
US11495527B2 (en) Semiconductor module
JP2016197677A (ja) パワー半導体装置および車載用回転電機の駆動装置
JP2013089784A (ja) 半導体装置
WO2020245880A1 (ja) 半導体モジュールおよび電力変換装置
WO2022024567A1 (ja) 半導体装置
JP2016184757A (ja) 半導体装置
KR20180023365A (ko) 파워 모듈
JP2021180252A (ja) 半導体装置、バスバー及び電力変換装置
JP7428679B2 (ja) パワー半導体装置および電力変換装置
JP2020113600A (ja) 半導体装置
JP2020089034A (ja) スイッチング素子ユニット

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant