CN102695373B - 印刷基板的制造装置以及制造方法 - Google Patents

印刷基板的制造装置以及制造方法 Download PDF

Info

Publication number
CN102695373B
CN102695373B CN201210064882.9A CN201210064882A CN102695373B CN 102695373 B CN102695373 B CN 102695373B CN 201210064882 A CN201210064882 A CN 201210064882A CN 102695373 B CN102695373 B CN 102695373B
Authority
CN
China
Prior art keywords
film
base plate
printed base
semiconductor chip
scolding tin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201210064882.9A
Other languages
English (en)
Other versions
CN102695373A (zh
Inventor
向井范昭
三本胜
本间真
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of CN102695373A publication Critical patent/CN102695373A/zh
Application granted granted Critical
Publication of CN102695373B publication Critical patent/CN102695373B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731—Location prior to the connecting process
    • H01L2224/73101—Location prior to the connecting process on the same surface
    • H01L2224/73103—Bump and layer connectors
    • H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75272—Oven
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/7528—Resistance welding electrodes, i.e. for ohmic heating
    • H01L2224/75281—Resistance welding electrodes, i.e. for ohmic heating in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/8388—Hardening the adhesive by cooling, e.g. for thermoplastics or hot-melt adhesives
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909—Post-treatment of the layer connector or bonding area
    • H01L2224/83951—Forming additional members, e.g. for reinforcing, fillet sealant
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9211—Parallel connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/12—Surface bonding means and/or assembly means with cutting, punching, piercing, severing or tearing
    • Y10T156/1304—Means making hole or aperture in part to be laminated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

本发明提供印刷基板的制造装置以及制造方法：得到与使用底部填充液时同等的效果，实现基板与半导体芯片之间的充填方法。在印刷基板(33)的多个电极部中形成焊锡凸点(39)，隔着该多个焊锡凸点将半导体芯片(41)搭载到印刷基板。此时，准备覆盖印刷基板的形成了焊锡凸点的面侧的底部填充用的热可塑性的膜(30)。对于该膜，除去焊锡凸点部分，而搭载半导体芯片的部分的周缘部形成为突起状，在用膜覆盖了印刷基板之后将膜贴合到基板，接下来将半导体芯片搭载到印刷基板而输送到回流炉，在该回流炉中进行加热以及加压(HP)，而使焊锡凸点熔融。

Description

印刷基板的制造装置以及制造方法
技术领域
本发明涉及印刷基板的制造装置以及制造方法，特别涉及适合于在印刷基板上安装半导体芯片的印刷基板的制造装置以及制造方法。
背景技术
在印刷基板中的倒装芯片焊接中，对印刷基板中形成的连接焊盘附着焊料球，并经由该焊料球安装半导体芯片。如果通过该倒装芯片焊接法在印刷基板上安装半导体芯片，则与连接焊盘上附着的焊料球的高度对应地，而在半导体芯片与印刷基板之间产生空隙G。因此，半导体芯片的支撑力变低，而有可能在焊料球的焊料环部位产生裂缝。特别，如果产生了大的温度变化，则由于半导体芯片与印刷基板之间的热膨胀系数相互不同，所以在焊料球中产生热应力，并由于该热应力而在焊料球中产生裂缝。
因此，如以往如专利文献1的记载，为了稳定地支撑半导体芯片，在半导体芯片与印刷基板之间产生的空隙G中，利用供料器(dispenser)，注入液状物质的底部填充(underfill)液。由于注入底部填充液，所以需要防止该液向外部漏出，为此在基板的缘部中形成了流出防止用坝。
专利文献1：日本特开2010-118634号公报
发明内容
在上述专利文献1记载的印刷基板中，在流出防止用坝的形成中，使用了供料器。以往的凸点的间隔是为了使用供料器而留出充分的间隔。但是，伴随芯片的微细化，凸点间隔变窄，而无法使用供料器来注入底部填充液。因此，无法形成底部填充，而需求：不容易由于在半导体芯片与基板之间作用的热应力而产生裂缝的、使用供料器的底部填充液注入法的替代方案。
本发明是鉴于上述以往技术的缺点而完成的，其目的在于，以得到与使用了底部填充液时同等的效果的方式填充基板与半导体芯片之间的间隙来固定两者。另外，实现防止产生裂缝的精度良好的印刷基板。
为了解决上述课题，本发明提供一种印刷基板的制造方法，其特征在于，是在印刷基板的多个电极部中形成焊锡凸点，并隔着该多个焊锡凸点将半导体芯片搭载于所述印刷基板的印刷基板的制造方法，准备覆盖所述印刷基板的形成了所述焊锡凸点的面侧的底部填充用的热可塑性的膜，对于该膜，所述焊锡凸点部分被去除并且搭载所述半导体芯片的部分的周缘部形成为突起状，在用所述膜覆盖了所述印刷基板之后将所述膜贴合到所述基板，接下来将所述半导体芯片搭载于所述印刷基板而输送到回流炉，在该回流炉中进行加热以及加压而使所述焊锡凸点熔融。
另外，在该特征中，在所述膜的准备阶段中，在将辊状地卷绕的所述膜切断为规定的大小之后，使用膜输送工具输送到膜开孔部，通过该膜开孔部对与所述印刷基板中形成的所述焊锡凸点相当的部分进行开孔加工，接下来使所述膜输送工具和所述膜一起反转。
为了解决上述课题，本发明提供一种印刷基板的制造装置，其特征在于，具备：膜供给部，辊状地卷绕了底部填充用的热可塑性的膜；开孔加工部，针对从该膜供给部供给的所述膜，在与形成于印刷基板的焊锡凸点的位置相当的部位进行开孔加工；膜反转部，使保持所述膜的膜输送工具和所述膜一起反转；以及膜贴合部，将反转了的所述膜粘贴于所述印刷基板，所述膜贴合部具备：上平台，保持反转后的膜输送工具以及所述膜；下平台，载置所述印刷基板并具有对所述印刷基板加热的加热器；以及驱动装置，使所述上平台以及下平台在上下方向上移动。
另外，印刷基板的制造装置具备在通过所述膜贴合部贴合了所述膜的所述印刷基板上搭载半导体芯片，使所述焊锡凸点熔融而将所述半导体芯片固定于所述印刷基板的回流炉。
根据本发明，由于用可塑性膜形成了底部填充，所以能够以得到与使用了底部填充液时同等的效果的方式固定基板与半导体芯片之间。另外，由于能够用底部填充可靠地固定半导体芯片与印刷基板之间，所以能够防止由于热应力等而产生裂缝。
附图说明
图1是说明本发明的将半导体芯片安装到印刷基板的概略工序的图。
图2是示出本发明的印刷基板的制造装置的一部分的示意图，是示出将用于底部填充的膜交付给膜输送工具的部分的图。
图3是示出本发明的印刷基板的制造装置的一部分的示意图，是示出将用于底部填充的膜贴合到基板的部分的图。
(符号说明)
11：膜辊；12：罩膜；13：导辊；14：卷绕辊；15：前端保持部件；16：后端保持部件；17：气压作动筒；18：切割机机构；19：伺服马达；20：滚珠丝杆；21：可动部；22：连结材料；23：压接辊子；24：膜输送工具；25：输送辊子；26：电极；28：静电产生装置；30：底部填充膜(膜)；31：基座；32：上下双视野照相机；33：印刷基板；34：下平台；35：上平台；36：平台驱动机构；37：上平台支撑梁；38：(上平台)驱动装置；39：焊锡凸点；40：突起(凸部)；41：半导体芯片；45：底部填充膜形成装置；50：膜粘贴装置。
具体实施方式
以下，使用附图来说明本发明的印刷基板的制造装置以及制造方法。图1是说明本发明的印刷基板33的制造方法的一个实施例的图，示出将半导体芯片41安装到印刷基板33的工序。虽然在图1中省略了图示，但在前工序中使用焊锡球印刷机将焊锡凸点39印刷到印刷基板33的表面上，并进行回流(reflow)而固定到印刷基板33面上。
如图1(a)所示，形成有焊锡凸点39的印刷基板33，被送入到底部填充形成部，并搭载到下平台34上(步骤S1)。如果在下平台34上搭载了印刷基板33，则从未图示的底部填充膜供给装置供给预先与焊锡凸点39的形状相符合地通过CVD装置实施了开孔加工的膜状的底部填充膜(以后还称为膜)30。
另外，在膜30的周缘部，形成了突起(凸部)40。突起40被设置成：在将半导体芯片41搭载到印刷基板33上不变的状态下移动时，即使对印刷基板33附加了振动等，半导体芯片41也不会在印刷基板33上移动。
膜30的厚度为5～20μm，并且是热可塑性。如果对膜30提供热，则产生粘接性，印刷基板33和半导体芯片41被粘接。在膜30和印刷基板33，分别设置了对位用的标志。在底部填充形成部50中，为了检测这些标志而设置了摄像用的照相机32，通过照相机32拍摄各个标志位置。照相机32拍摄的画面被发送到未图示的控制部，由控制部进行图像处理。然后，求出标志位置的偏移量，使下平台35在水平方向上移动而对位。
如图1(b)所示，如果膜30与印刷基板33的对位结束，则使膜30下降到印刷基板33面。然后，除去焊锡凸点39的部分，而用膜30覆盖印刷基板33(步骤S2)。如图1(c)所示，在用膜30覆盖了印刷基板33之后，在焊锡凸点39上搭载半导体芯片41(步骤S3)。
在使半导体芯片41和焊锡凸点39对位时，也通过照相机32拍摄对位标志。然后，与膜30的对位时同样地，计测位置偏移量，根据该偏移量使半导体芯片41的抓手部水平移动而对位。如果在搭载了半导体芯片41之后使印刷基板33移动，则由于仅将半导体芯片41简单地载置到焊锡凸点39上，所以产生位置偏移的可能性大。因此，在膜30的搭载半导体芯片41的端部侧，形成了凸部。还能够在膜30的开孔加工时一起形成该凸部。
如果在印刷基板33上搭载半导体芯片41并检查完了搭载状态，则将印刷基板33输送到回流炉。如图1(d)所示，在回流炉中，针对底部填充膜30在箭头方向上从上向下加压。与此同时，进行加热。通过该加热·加压HP，印刷基板33和半导体芯片41被粘接固定(步骤S4)。如果在印刷基板33上固定了半导体芯片41，则将印刷基板33输送到检查工序。
图2示出底部填充膜(膜)30的形成装置45。在该图2中，膜30形成为片状的可卷物。膜辊11具有罩膜12以及底部填充膜30，从内侧依次层叠了罩膜12、底部填充膜30。
为了从膜辊11将膜30输送到输送面，在膜辊11的下方配置了导辊13。导辊13用于剥离罩膜12。所剥离的罩膜12被卷绕到与膜辊11邻接地设置的卷绕辊14。在膜辊11以及卷绕辊14的驱动部中，设置了用于根据膜30的残量来调整扭矩的未图示的扭矩调整装置。通过扭矩调整装置的调整，能够使膜30的张力一定地进行输送。
在导辊13的下侧，配置了对膜30的前端部的规定区域或者后端部的规定区域进行吸引吸附而输送的前端保持部件15和后端保持部件16。在前端保持部件15的内部设置了真空室，在上表面设置了吸附孔。真空室与未图示的真空泵连接。如果驱动真空泵，则膜前端被吸引吸附到前端保持部件15的上表面。即，使用真空吸附机构，在前端保持部件15上保持膜30。
另外，前端保持部件15被支撑于在前端保持部件15的下方配置的滚珠丝杆20的可动部21。滚珠丝杆20与伺服马达19直接连接。通过驱动伺服马达19，被支撑于滚珠丝杆20的可动部21的前端保持部件15在左右方向(膜输送方向)上移动。进而，对可动部21连接了气压作动筒(air cylinder)17。气压作动筒17能够将膜30的前端输送至与构成膜30压接部的一对压接辊子23中的一个压接辊子23邻接的位置。
后端保持部件16，也与前端保持部件15的情况同样地，在内部设置了真空室，在上表面设置了吸附孔。另外，形成了在宽度方向上延伸的槽，该槽还被用作使用切割机机构18在宽度方向上切断膜30时的切割机槽座台。切割机机构18设置于后端保持部件16的上侧，能够基于无杆作动筒(rodless cylinder)等的驱动在宽度方向上移动。切割机机构18用于在宽度方向上切断膜30。
滚珠丝杆20的可动部21支撑前端保持部件15，所以膜30被准确地输送。另外，驱动设置于可动部21中的旋转致动器而使连结材料22旋转，所以能够使后端保持部件16从膜输送面向下侧退避。
压接辊23形成用耐热性优良的橡胶(硅橡胶等)在金属制的辊的外周侧包覆了厚度1.2mm左右的结构。另外，如果从静电产生装置28具备的电极26对膜30施加了电压，则压接辊23通过静电吸附而在表面保持膜30。因此，如果包覆外周的橡胶是硅橡胶，则电气电阻变大。但是，由于外周包覆橡胶的厚度薄至1.2mm左右，所以针对静电吸附的影响轻微。另外，只要使用具有耐热性的导电性橡胶，而静电吸附效果的增加是不言而喻的。
以从上下方向夹住由输送辊子25输送的膜输送工具24的方式，上下配置了一对压接辊23。进而，对上下配置的各压接辊23，连结了未图示的气压作动筒，如果驱动气压作动筒，则压接辊23在上下方向上移动。此处，压接辊23的金属部分接地。
接下来，说明膜粘贴动作。作为粘贴膜30的准备，手动从膜辊11拉出膜30并送到导辊13。如上所述，在导辊13中罩膜12被剥离。剥离后的罩膜12被卷绕到卷绕辊14。剩余的膜30被拉出至后端保持部件16的前端，前端保持部件15以及后端保持部件16吸引吸附背面侧。
此时，使与膜辊11以及卷绕辊14连接的驱动单元即马达动作，而对膜30作用一定的张力。在上述说明的状态下，以使切割机机构18的切割机刃通过的方式，使后端保持部件16的槽部分对位。接下来，使切割机机构18在宽度方向上移动，而切断膜30。如果膜30的切断作业结束，则使吸附了膜30的后端保持部件16的吸引吸附停止，对膜30的切断端废弃处分。此时，在膜30的前端部从前端保持部件15的前端部露出了10mm左右的状态下，前端保持部件15吸引吸附膜30。由此，膜30的粘贴动作的准备完成。
在膜30的粘贴准备完成了的状态下，位于基板输送面的上下的压接辊23都处于上升位置。然后，在通过设置于内部的加热器加热了的状态下在基板输送方向上旋转。另外，下侧的压接辊23的上表面与膜输送工具24接触，将膜输送工具24在图2中从左侧向右侧输送。
在膜30的粘贴动作中，首先使伺服马达19动作，而使滚珠丝杆20的可动部21移动至压接辊23附近。如果驱动了设置于后端保持部件16的旋转致动器，则连结材料22旋转，使后端保持部件16从膜输送面向下侧退避。
接下来，使气压作动筒17动作，使前端保持部件15移动，直至膜30的前端位于压接辊23的上表面中央附近。如果膜30被对位到上述规定位置，则从未图示的静电产生用电源向电极26施加高电压。此时，膜30的前端部位于电极26与上侧的压接辊23之间。因此，从前端保持部件15露出的膜前端部分带电，并被吸附到接地了的上侧的压接辊23。
上侧的压接辊23在膜输送工具24的输送方向上旋转，将吸附的膜30输送到下侧(输送工具侧)。此时，如果解除前端保持部件15的吸引吸附，则膜30与上侧的压接辊23的旋转一起被输送到印刷基板33侧。接下来，使气压作动筒17以及可动部21动作，而使将膜30交付到压接辊23的前端保持部件15回到导辊13的下侧位置。与此同时，驱动旋转致动器而使连结材料22旋转，在退避了的后端保持部件16也回到膜输送面的位置。
如果膜30被输送至压接辊23的正下(与输送来的膜输送工具24面接触的位置)，则使压接辊23的旋转停止。然后，将位于前端保持部件5以及后端保持部件16的上侧的膜30吸引吸附到各个保持部件15、16而保持。驱动切割机机构18，而在宽度方向上切断膜30。此时，以使切断后的膜30的长度成为粘贴到印刷基板33的长度的方式，调整切割机机构18的位置和后端保持部件16的位置。
另外，也可以使压接辊23的旋转不停止，而使切割机机构18以及前端保持部件15、后端保持部件16与膜30的输送同步，来吸附保持膜30并切断。膜输送工具24实际上形成得比粘贴膜30的印刷基板33长。
由于膜30被切断为规定长度，所以输送辊子25将膜输送工具24输送到膜粘贴位置。如果膜输送工具24到达膜粘贴位置，则下侧的压接辊23的高度方向位置保持不变，而仅使上侧的压接辊23下降(接近下侧压接辊23)。膜30接触到膜输送工具24面，接下来开始压接。在该工序中，通过压接辊23与膜输送工具24一起输送膜30，但由于后端保持部件16也与膜30的输送同步地移动到压接辊23侧，所以张力一定。
伴随压接辊23的旋转，膜30被压接到膜输送工具24。另一方面，如果吸附着膜30的后端保持部件16到达压接辊23附近，则与从前端保持部件15向压接辊23交付膜30的前端的情况同样地，向静电产生装置18的电极26施加高电压。如果施加了高电压，则位于电极26的下方的膜30的后端带电，静电吸附到压接辊23。
如果膜30的后端被完全交付到压接辊23，则解除后端保持部件16的吸引吸附力。然后，使连结材料22旋转而退避到下方。另一方面，前端保持部件15吸引吸附接下来要粘贴的膜30的前端，在吸引吸附了膜30的状态下移动至压接辊23附近。
膜30的后端被静电吸附到压接辊23，所以不会向膜输送工具24面垂下而能够使其密接到膜输送工具24，在压接中，在粘贴部分中不会混入褶皱、气泡等。另外，由于下侧的压接辊23接地，所以如果接触到膜输送工具24，则上侧的压接辊23中保持的膜30的静电被放电。
在将膜30的整面压接到膜输送工具24面之后，使上侧的压接辊23上升，从前端吸附部件15交付接下来的膜30。如果将膜30的前端交付到压接辊23，则前端保持部件15移动到导辊13的下方。与此同时，退避了的后端保持部件16也返回膜输送面的位置。由此，一连串的粘贴动作完成。
在上述实施例中，为了将膜30交付到压接辊23，静电吸附了膜30的前端部以及后端部，但也可以使膜30的整面带静电而吸附到压接辊23。另外，也可以与使膜30吸附到压接辊23的单元同样地，将前端保持部件15以及后端保持部件16的膜保持机构代替为真空吸附机构而作为静电吸附保持机构。
膜输送工具24上安装的膜30被送到未图示的开孔加工部，在开孔加工部中，对与印刷基板33上的电极部(与焊锡凸点39形成部相当的部位)相当的部位进行开孔加工。通过未图示的开孔装置来实施该开孔加工。另外，在进行开孔加工之前，使用冲床在膜30的端部设置突起。由于形成了突起，所以即使在印刷基板33上仅载置半导体芯片41而未固定，在使印刷基板30移动时，半导体芯片41也不会由于振动等而移动。另外，也可以在印刷基板33上粘贴膜30时，加工突起。
为了将开孔加工后的膜30搭载到印刷基板33上，而将开孔加工后的膜30输送到膜粘贴装置50。图3示出膜粘贴装置50的概略结构。在膜粘贴装置50中，在基座31上配置了载置印刷基板33的下平台34。
下平台34具有使下平台34在水平面内移动的未图示的XYθ平台、和该XYθ平台的驱动机构36。另外，在基座31的四角设置了支撑柱，在支撑柱的上部安装了保持上平台35的上平台支撑梁37。在支撑梁37上部，设置了用于使上平台35上下移动的驱动装置38。上平台35安装于驱动装置38上。在上平台35与下平台34之间，在水平方向可移动地设置了上下双视野照相机32。
在向膜粘贴装置50送入安装了膜30的膜输送工具24之前，通过未图示的反转装置，按每个膜输送工具24使膜30的保持面反转。膜输送工具24在反转后的状态下被送入到膜粘贴装置50。然后，在与搭载了印刷基板33的下平台34对向地设置的上平台35中使膜面朝下而保持。此时，对未图示的上平台35面供给负压，通过真空吸附针对每个膜输送工具24将膜30保持到上平台35。
通过上下双视野照相机32拍摄预先设置于膜30面和印刷基板33面的对位标志。未图示的控制部对所拍摄的画面进行图像处理，而求出膜30面与基板33的对位标志的偏移量。根据该偏移量，使下平台34水平移动而对位。另外，由于在下平台34设置了加热器，所以能够将印刷基板33加热到规定的温度。如果在下平台34中载置了印刷基板33，则加热器置ON而加热印刷基板33。另外，如果对位标志的摄像结束，则使上下双视野照相机32从上下平台34、35面退避。
如果对位结束，则使平台上下驱动机构38动作而使支撑着膜30的上平台35下降。如果在印刷基板33面上施加规定的压力，则使膜30贴合到印刷基板33面上。即，进行加热·加压而将底部填充膜(膜)30，除去印刷基板33的电极部，暂时固定到印刷基板33面上。另外，在以上的说明中，在对膜30进行开孔的工序之前，执行了在膜30的端部(与半导体芯片的回收相当的部分)设置突起40的工序，但也可以在印刷基板33上粘贴膜30的工序时，设置固定半导体芯片41端部的突起。
如果膜30的贴合完成，则转移到在印刷基板33上搭载半导体芯片41的工序。在将半导体芯片41搭载到印刷基板33上时，预先使用照相机32来计测半导体芯片41的电极位置。使用以往使用的具备机器手的芯片贴片机，在形成了底部填充膜30的印刷基板33面上搭载半导体芯片41。
搭载了半导体芯片42的印刷基板33被输送到回流炉而使焊锡芯片被熔融·紧固。另外，在该输送时，半导体芯片41与印刷基板33之间不进行任何固定，所以以使半导体芯片41不移动的方式在底部填充膜30的端部形成突起40，而保持半导体芯片41的端部。
在上述实施例中，代替在印刷基板上搭载了半导体芯片之后向印刷基板与半导体芯片之间注入底部填充液的以往的方法，而在将半导体芯片压接到印刷基板之前，将底部填充的膜形成为从印刷基板形状除去电极部的形状，将该膜粘贴到印刷基板面而将半导体芯片搭载到规定位置。由此，能够对应于通过微细化实现的电极间隔的狭小化。即，即使是液状的底部填充中利用的毛细管现象也不发生那样的印刷基板与半导体芯片之间的窄的间隙，也能够将半导体芯片紧固地固定到印刷基板。

Claims (4)

1.一种印刷基板的制造方法，是在印刷基板的多个电极部形成焊锡凸点，并经由该多个焊锡凸点将半导体芯片搭载于所述印刷基板的印刷基板的制造方法，其特征在于，
准备对所述印刷基板的形成了所述焊锡凸点的面侧进行覆盖的底部填充用的热可塑性的膜，对于该膜，所述焊锡凸点部分被去除并且搭载所述半导体芯片的部分的周缘部形成为向与印刷基板垂直的方向突起的形状，在用所述膜覆盖了所述印刷基板之后使所述膜与所述基板贴合，接下来将所述半导体芯片搭载于所述印刷基板而输送到回流炉，在该回流炉中进行加热以及加压而使所述焊锡凸点熔融。
2.根据权利要求1所述的印刷基板的制造方法，其特征在于，
在所述膜的准备阶段中，在将辊状地卷绕的所述膜切断为规定的大小之后，使用膜输送工具来输送到膜开孔部，通过该膜开孔部对与所述印刷基板中形成的所述焊锡凸点相当的部分进行开孔加工，接下来使所述膜输送工具和所述膜一起反转。
3.一种印刷基板的制造装置，其特征在于，具备：
膜供给部，辊状地卷绕了底部填充用的热可塑性的膜；
开孔加工部，针对从该膜供给部供给的所述膜，在形成于印刷基板的焊锡凸点的位置相当的部位进行开孔加工；
膜反转部，使保持所述膜的膜输送工具和所述膜一起反转；以及
膜贴合部，将反转后的所述膜粘贴于所述印刷基板，
所述膜贴合部具备：
上平台，保持反转后的膜输送工具以及所述膜；
下平台，载置所述印刷基板并具有对所述印刷基板加热的加热器；以及
驱动装置，使所述上平台以及下平台在上下方向上移动。
4.根据权利要求3所述的印刷基板的制造装置，其特征在于，
在通过所述膜贴合部贴合了所述膜的所述印刷基板上搭载半导体芯片，并具备使所述焊锡凸点熔融而将所述半导体芯片固定于所述印刷基板的回流炉。
CN201210064882.9A 2011-03-25 2012-03-13 印刷基板的制造装置以及制造方法 Expired - Fee Related CN102695373B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-067147 2011-03-25
JP2011067147A JP5662855B2 (ja) 2011-03-25 2011-03-25 プリント基板の製造装置および製造方法

Publications (2)

Publication Number Publication Date
CN102695373A CN102695373A (zh) 2012-09-26
CN102695373B true CN102695373B (zh) 2015-01-28

Family

ID=46860602

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210064882.9A Expired - Fee Related CN102695373B (zh) 2011-03-25 2012-03-13 印刷基板的制造装置以及制造方法

Country Status (4)

Country Link
US (1) US8921157B2 (zh)
JP (1) JP5662855B2 (zh)
KR (1) KR101391346B1 (zh)
CN (1) CN102695373B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6109609B2 (ja) * 2013-03-14 2017-04-05 Ａｉメカテック株式会社 ハンダボール印刷機およびハンダボール印刷方法
CN103158328B (zh) * 2013-03-24 2015-06-10 苏州工业园区宝优际通讯科技有限公司 对贴系统
CN104517862B (zh) * 2013-09-29 2018-11-02 深南电路有限公司 一种指纹传感器封装方法和结构
CN114348335B (zh) * 2021-12-16 2023-06-09 合肥鼎中智能科技有限公司 一种改进型膜贴设备
CN114667000B (zh) * 2022-05-23 2022-08-19 江油星联电子科技有限公司 一种电路板生产用电路板表面涂覆装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000101013A (ja) * 1998-09-18 2000-04-07 Matsushita Electric Ind Co Ltd ベアチップ部品を含む混載部品の実装方法および混載回路基板
CN1470068A (zh) * 2000-10-17 2004-01-21 3M创新有限公司 用于倒装式结合在有焊料凸块晶片上预底填料的溶剂辅助抛光
CN101103449A (zh) * 2004-11-01 2008-01-09 3M创新有限公司 将半导体封装连接到印刷线路板上的方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3019A (en) * 1843-03-30 Hatching chickens
US7010A (en) * 1850-01-08 Machine for cutting shingles
JPH0645481A (ja) * 1992-07-23 1994-02-18 Dainippon Ink & Chem Inc 樹脂封止電子部品及びその製造方法
JPH0831871A (ja) * 1994-07-11 1996-02-02 Ibiden Co Ltd 電子部品を表面実装する際に使用する界面封止用フィルム、及び電子部品の表面実装構造
US20070102827A1 (en) * 1997-12-08 2007-05-10 3M Innovative Properties Company Solvent Assisted Burnishing of Pre-Underfilled Solder-Bumped Wafers for Flipchip Bonding
JP3350454B2 (ja) * 1998-09-24 2002-11-25 三菱電機株式会社 半導体集積回路装置およびその製造方法並びに製造装置
JP2002134558A (ja) * 2000-10-25 2002-05-10 Toshiba Corp 半導体装置及びその製造方法
JP2002271014A (ja) 2001-03-09 2002-09-20 Hitachi Kokusai Electric Inc 電子部品の実装方法
JP2005502187A (ja) * 2001-05-04 2005-01-20 ノキア コーポレイション 電子部品組立体の熱機械的信頼性を向上するためにパッケージレベルで予め塗布されるアンダーフィル
JP2005271437A (ja) * 2004-03-25 2005-10-06 Asahi Glass Co Ltd 貼合装置および貼合方法
KR100665288B1 (ko) * 2005-11-15 2007-01-09 삼성전기주식회사 플립칩 패키지 제조방법
JP5018399B2 (ja) * 2007-10-26 2012-09-05 富士通株式会社 回路基板の製造方法
KR101022942B1 (ko) 2008-11-12 2011-03-16 삼성전기주식회사 흐름 방지용 댐을 구비한 인쇄회로기판 및 그 제조방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000101013A (ja) * 1998-09-18 2000-04-07 Matsushita Electric Ind Co Ltd ベアチップ部品を含む混載部品の実装方法および混載回路基板
CN1470068A (zh) * 2000-10-17 2004-01-21 3M创新有限公司 用于倒装式结合在有焊料凸块晶片上预底填料的溶剂辅助抛光
CN101103449A (zh) * 2004-11-01 2008-01-09 3M创新有限公司 将半导体封装连接到印刷线路板上的方法

Also Published As

Publication number Publication date
CN102695373A (zh) 2012-09-26
KR20120108938A (ko) 2012-10-05
US20120244666A1 (en) 2012-09-27
US8921157B2 (en) 2014-12-30
KR101391346B1 (ko) 2014-05-07
JP5662855B2 (ja) 2015-02-04
JP2012204570A (ja) 2012-10-22

Similar Documents

Publication Publication Date Title
CN102695373B (zh) 印刷基板的制造装置以及制造方法
JP4097679B2 (ja) カバーレイフィルム貼り合わせ装置
CN104081515B (zh) 粘贴装置
US7712652B2 (en) Component mounting apparatus and component mounting method
KR101250656B1 (ko) 소편 부재의 이동 탑재 정착 장치
CN103003070B (zh) 工件的精密粘合装置以及工件的精密粘合方法
CN105939595B (zh) Acf粘贴方法以及acf粘贴装置
CN101621019A (zh) 焊球检查修理装置以及焊球检查修理方法
JP2011199056A (ja) Ｆｐｄモジュールの組立装置
JP6373076B2 (ja) 貼付装置および貼付方法
TW202031581A (zh) 貼膜裝置及貼膜方法
JP3981259B2 (ja) 基板用支持治具
CN101384135B (zh) 片材剥离装置及采用该装置的片材印刷系统
JP2006264906A (ja) テープ貼込装置
CN105938263A (zh) Acf粘贴方法以及acf粘贴装置
TWI834137B (zh) 電子零件安裝裝置
JP2005123636A (ja) 基板用支持治具、並びに回路基板製造装置及び方法
TWI815370B (zh) 電子零件安裝裝置
CN104269237B (zh) 环片贴片装置及超微型环形压敏电阻电极制备方法
JP2003303858A (ja) 半導体装置用テープキャリアの貼付装置
JP4226925B2 (ja) 半田付け装置
KR101541332B1 (ko) 지그 상에 인쇄회로기판을 장착하는 장치
KR20220029209A (ko) 디스플레이 제조 장치 및 디스플레이 제조 방법
JP2012182358A (ja) Ｆｐｄモジュールの組立装置及び組立方法
JP2012212841A (ja) 導電性フィルムのセパレータ剥離装置及び太陽電池モジュール組立装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
ASS Succession or assignment of patent right

Owner name: HITACHI,LTD.

Free format text: FORMER OWNER: HITACHI PLANT TECHNOLOGIES LTD.

Effective date: 20140108

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20140108

Address after: Tokyo, Japan

Applicant after: Hitachi Ltd.

Address before: Tokyo, Japan, Japan

Applicant before: Hitachi Plant Technologies Ltd.

C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150128

Termination date: 20170313

CF01 Termination of patent right due to non-payment of annual fee