CN102522341A - 微电子封装及其制作方法 - Google Patents
微电子封装及其制作方法 Download PDFInfo
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- CN102522341A CN102522341A CN2011104345214A CN201110434521A CN102522341A CN 102522341 A CN102522341 A CN 102522341A CN 2011104345214 A CN2011104345214 A CN 2011104345214A CN 201110434521 A CN201110434521 A CN 201110434521A CN 102522341 A CN102522341 A CN 102522341A
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- pin
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- coupling assembly
- electric coupling
- contact angle
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Abstract
本发明公开了一种微电子封装及其制作方法。该微电子封装的制作方法包括以下步骤:步骤A:在引线框架的引脚上形成附着区和非附着区,其中在回流期间,对于电耦接组件而言,附着区具有比非附着区好的润湿性;步骤B:使位于半导体芯片上的电耦接组件与引脚的附着区接触;以及步骤C:回流电耦接组件,使电耦接组件可控地塌陷,以在半导体芯片与引线框架的引脚之间形成电连接。
Description
技术领域
本发明涉及一种电子元器件,具体涉及一种微电子封装及其制作方法。
背景技术
倒装芯片技术是一种通过焊料球或者焊料凸块直接将半导体芯片与基板相连的技术。在封装过程中,首先将焊料球安置在半导体芯片上,并在基板(例如印制电路板)上形成焊料掩膜以确定多个连接点,然后将附着有焊料球的半导体芯片翻转并使焊料球对准基板上相应的连接点,最后通过回流来完成连接。
前面所述的倒装芯片技术存在一个缺点,即当基板是具有多个引脚的引线框架时,在回流期间焊料球可能会不可控地塌陷。焊料球塌陷的不可控可能会导致微电子封装在结构上、功能上和/或其他类型的损坏。例如,相邻的焊料球可能会彼此接触,造成半导体芯片和/或基板短路。
传统的解决方案是与印刷电路板类似地在引线框架上制作焊料掩膜,但是在引线框架的细小引脚上制作焊料掩膜不仅操作困难、耗时,而且成本也高。
发明内容
本发明的目的在于提供一种倒装芯片的微电子封装及其制作方法,从而防止电耦接组件在回流期间发生不可控的塌陷。
根据本发明一实施例的微电子封装制作方法,包括以下步骤:步骤A:在引线框架的引脚上形成附着区和非附着区,其中在回流期间,对于电耦接组件而言,附着区具有比非附着区好的润湿性;步骤B:使位于半导体芯片上的电耦接组件与引脚的附着区接触;以及步骤C:回流电耦接组件,使电耦接组件可控地塌陷,以在半导体芯片与引线框架的引脚之间形成电连接。
根据本发明一实施例的微电子封装:包括:半导体芯片,具有接触焊盘;引线框架,具有引脚,其中引脚包括附着区和非附着区;电耦接组件,位于半导体芯片的接触焊盘和引脚的附着区之间,在半导体芯片的接触焊盘与引脚之间形成电连接;其中在回流期间,对于电耦接组件而言,引脚的附着区具有比非附着区好的润湿性。
根据本发明的实施例所提供的微电子封装及其制作方法,在引线框架的引脚上形成附着区和非附着区。由于在回流期间,对于电耦接组件而言,附着区具有比非附着区好的润湿性,不必使用焊料掩膜即可有效地控制电耦接组件在回流期间的塌陷。
附图说明
为了更好的理解本发明,将根据以下附图对本发明进行详细描述:
图1A-1F是根据本发明一实施例的半导体芯片和/或部分引线框架在微电子封装制作过程中的剖视图;
图2A-2E是根据本发明另一实施例的部分引线框架在微电子封装制作过程中的剖视图;
图3A-3C是根据本发明又一实施例的部分引线框架在微电子封装制作过程中的剖视图;
图4A和4B是根据本发明再一实施例的部分引线框架在微电子封装制作过程中的剖视图;
图5A和5B是根据本发明几个实施例的芯片上引线封装的剖视图。
具体实施方式
下面参照附图描述本发明的实施例。封装有半导体芯片的封装体称为微电子封装,通常微电子封装在对半导体芯片电气性能造成最小化影响的同时对内部芯片和相关的元器件提供保护、供电、冷却,并提供与外部的电气和机械联系。典型的微电子封装包括微电子电路或元器件、薄膜记录头、数据存储单元、微流体装置和形成于微电子基板上的其它元件。微电子基板可包括半导体基片(如掺杂有硅或者砷化镓的晶圆)、绝缘片(如陶瓷基片)、或者导电片(如金属或者金属合金)。本文所称“半导体芯片”可包括各种场合下使用的产品,例如单个集成电路的芯片、成像芯片、感应芯片以及任何其它具有半导体特性的芯片。
本发明的实施例中,描述了很多具体的的细节。本领域技术人员将理解,没有这些具体细节,本发明同样可以实施。本领域技术人员还应理解,尽管本发明中的详细描述与特定实施例相结合,但本发明仍有许多其他实施方式,在实际执行时可能有些变化,但仍然包含在本发明主旨范围内,因此,本发明旨在包括所有落入本发明和所述权利要求范围及主旨内的替代例、改进例和变化例等。
本发明的实施例公开了一种微电子封装,该微电子封装包括具有接触焊盘的半导体芯片、具有引脚的引线框架和电耦接组件。其中引脚包括附着区和非附着区,电耦接组件位于半导体芯片的接触焊盘和引脚的附着区之间,以在半导体芯片的接触焊盘与引脚之间形成电连接。在回流期间,对于电耦接组件而言,引脚的附着区具有比非附着区好的润湿性。在一个实施例中,引脚包括导电材料,附着区包括位于引脚表面的润湿材料,其中电耦接组件与引脚附着区的润湿材料接触。在另一个实施例中,引脚包括导电材料,附着区包括位于引脚表面的润湿材料,非附着区包括导电材料的氧化物,其中电耦接组件与引脚附着区的润湿材料接触。
本发明的实施例还公开了一种微电子封装的制作方法,该制作方法包括步骤A~C。在步骤A,在引线框架的引脚上形成附着区和非附着区,其中在回流期间,对于电耦接组件而言,附着区具有比非附着区好的润湿性。在步骤B,使位于半导体芯片上的电耦接组件与引脚的附着区接触。在步骤C,回流电耦接组件,使电耦接组件可控地塌陷,以在半导体芯片与引线框架的引脚之间形成电连接。在一个实施例中,步骤A包括在引脚的第一部分表面淀积润湿材料;和/或处理引脚的第二部分表面,使得在回流期间,对于电耦接组件而言,引脚的第二部分表面具有比第一部分表面差的润湿性。
图1A-1F是根据本发明一实施例的半导体芯片和/或部分引线框架在微电子封装制作过程中的剖视图。如图1A的箭头103所示,微电子封装制作方法的初始步骤包括将多个电耦接组件104附着于半导体芯片100的接触焊盘102上。为了清楚起见,在图1A中以虚线示出附着至接触焊盘102之前的电耦接组件104。在图1A所示的实施例中,示出两个电耦接组件104。在其它实施例中,微电子封装可包括1个、3个或者任何其他数目的电耦接组件104。
半导体芯片100可包括任何适当类型的集成电路。在一个实施例中,半导体芯片100包括多个金属氧化物半导体场效应晶体管(MOSFET)、结型场效应晶体管(JFET)、绝缘栅双极型晶体管(IGBT)、电容和/或其他的电子元件。在其它实施例中,半导体芯片100包括其他各种类型合适的电子和/或机械元件。
在一个实施例中,电耦接组件104包括通过点焊、局部回流和/或其他合适的技术附着于接触焊盘102的焊料球。在其它实施例中,电耦接组件104包括通过电镀和/或其他方式形成于接触焊盘102上的焊料球。需要说明的是,此处所称“焊料”是指熔点在90℃~450℃范围内的一种易熔金属合金。这种焊料可以是铜、锡、铅、银、锌和/或其他适用金属中至少几种金属的合金。在其它实施例中,电耦接组件104可包括任意其他合适的用于耦接的导电部件。
图1B~1D给出了根据本发明一实施例在引线框架105上形成附着区112和非附着区113的步骤。如图1B~1D所示,引线框架105具有多个引脚。在图1B~1D所示的实施例中,为了简化说明,仅示出并列的第一引脚106a与第二引脚106b。在其它实施例中,引线框架105还包括芯片贴装盘、挡板、其他引脚以及其他合适的组成部分。引脚包括第一表面107a以及与第一表面相对的第二表面107b。其中第一表面107a可以作为与半导体芯片100连接的交界面,第二表面107b可以作为与外部器件(如印制电路板)等连接的交界面。
如图1B所示为淀积步骤:在引脚的第一表面107a淀积掩膜材料108。在一个实施例中,掩膜材料108包括通过旋涂操作和/或其他合适的技术淀积于引脚上的光刻胶。在其它实施例中,光刻胶包括压合和/或以其他方式胶着于引脚上的卷式干膜光阻。此处所称“光刻胶”是指一种暴露于电磁辐射后会产生化学变化的材料。光刻胶包括正光刻胶和负光刻胶,正光刻胶在辐照时可溶,而负光刻胶具有辐照不溶性。在其它实施例中,掩膜材料108包括硬橡胶和/或其他类型合适的硬掩膜材料。
图1C所示为去除部分掩膜材料的步骤:去除部分掩膜材料108以形成与附着区112相对应的多个开口110。在一个实施例中,该去除部分掩膜材料的步骤包括根据所需的结构使用光刻法和/或其他合适的技术来图案化光刻胶。在其它实施例中,掩膜材料108的开口110也可使用镭射烧蚀、湿法蚀刻、干法蚀刻和/或其他合适的技术来制作。
图1D所示为在引脚的第一表面107a上形成附着区112和非附着区113的步骤。在图1D所示实施例中,形成附着区112(或润湿焊盘)包括通过掩膜材料108的开口110在引脚的第一表面107a淀积润湿材料111。需要说明的是,本文所称润湿材料111是指在回流时对电耦接组件104具有良好润湿性的材料。润湿材料111可包括银(Ag)、镍(Ni)/金(Au)合金和/或其他适用的金属或金属合金。润湿性能的好坏一般用润湿接触角来表示,润湿接触角是指焊料外圆在焊件表面交接点处的切线与焊接面的夹角。在一个实施例中,回流期间润湿材料111和电耦接组件104之间的润湿接触角小于90°时,表示润湿性能良好。在其它实施例中,润湿接触角可小于60°、45°、30°和/或其他合适的的角度值。
形成附着区112后,接下来的步骤包括移除剩余的掩膜材料108(为说明清楚,在图1D中用虚线表示)和多余的润湿材料111。然后对第一表面107a的露出部分进行处理以形成非附着区113。在一个实施例中,通过接触氧化化学溶液、在空气中加热引脚、接触氧等离子体和/或其他合适的技术来氧化第一表面107a的露出部分。常见的氧化化学溶液有硫酸、硝酸、盐酸和/或其混合物。在其它实施例中,第一表面107a的露出部分可采用其他合适的表面处理技术来处理。在一个实施例中,氧化含铜引脚第一表面的露出部分以形成铜的氧化物(CuxO)。
经过前面的表面处理步骤后,非附着区113在回流时对电耦接组件104而言润湿性能不良。在一个实施例中,在回流时非附着区113与电耦接组件104之间的润湿接触角大于90°,表示润湿性能不良。在其它实施例中,润湿接触角可能会大于120°、135°和/或其他合适的角度值。
图1E所示为将半导体芯片100通过与引脚的附着区112对准并接触的电耦接组件104附着于引线框架105的步骤。然后,引线框架105和与半导体芯片100在热能和/或其他形式的能量作用下被回流(例如在回流焊炉中,未示出)。这样,电耦接组件104被至少部分地融化,从而在其冷却后将引线框架105和半导体芯片100连接在一起。
在本发明的实施例中,不必使用焊料掩膜,具有附着区112和非附着区113的引脚可以实现电耦接组件104在回流期间的可控塌陷,从而降低或者避免对微电子封装结构或者电气的损坏。正如前面所讨论的,对于电耦接组件104而言,附着区112的润湿性能良好而非附着区113的润湿性能不良。附着区112和非附着区113的润湿性能差别至少能限制或者实质上消除回流期间电耦接组件104的迁移或扩散。由于没有表面接触,在回流期间电耦接组件104不易被粘合至非附着区113。因此,在回流期间,电耦接组件104被限制于附着区112上。
在一个实施例中,根据回流期间电耦接组件104的期望迁移度来调整附着区112和非附着区113润湿接触角的差值。润湿接触角差值越大,迁移度越小,反之亦然。因此,如果所需的迁移度小,可使用较大的润湿接触角差值,例如接触角差值大于20°、30°或者40°。如果大的迁移度是可接受的,可使用较小的润湿接触角差值,例如润湿接触角差值小于15°、10°或者5°。
在回流步骤之后,微电子封装的制作过程还可包括各种额外的步骤。例如,如图1F所示,在半导体芯片100和引脚之间淀积底部填充材料117。底部填充材料117至少部分地包覆电耦接组件104。在其它实施例中,底部填充材料117可以被省略。
半导体芯片100和引线框架105被塑型材料120包覆,塑型材料120可以是环氧树脂,也可以是其它热固性聚合物。在一个实施例中,塑型材料120基本上完全地包覆半导体芯片100。塑型材料120至少部分地包覆引脚,引脚的第二表面170b被露出以实现与外部器件的连接。在其它实施例中,引线框架105还包括暴露于塑型材料120外部的引脚。在进一步的实施例中,半导体芯片100和引线框架105可采用其他结构来包覆。
尽管在前面的步骤中通过淀积润湿材料111和对引脚进行表面处理来形成附着区112和非附着区113,在其它实施例中,形成附着区112和非附着区113可能还包括其他的步骤。
图2A-2E是根据本发明另一实施例的部分引线框架在微电子封装制作过程中的剖视图。如图2A所示,第一步,在引脚的第一表面107a上淀积掩膜材料108。如图2B和2C所示,第二步,移除部分掩膜材料108,即图案化掩膜材料108以确定引脚第一表面107a的掩盖部分109a和露出部分109b。其中掩盖部分109a对应于附着区112,露出部分109b对应于非附着区113。在图2C所示实施例中,掩盖部分109a呈圆形。在其它实施例中,掩盖部分109a可以是矩形、椭圆形、梯形和/或其他适用的类型。
然后,露出部分109b被处理以获取所需的润湿特性,而掩盖部分109a被剩余的掩膜材料108保护起来不被处理。在一个实施例中,可采用与如图1D所示类似的步骤对引脚的露出部分109b进行处理。在其他实施例中,可使用其他适用的技术对露出部分109b进行处理,以使得在回流期间露出部分109对电耦接组件104的润湿性能不良。
与图1A~图1F所示步骤类似,可根据附着区112和非附着区113所需的润湿角度差对引脚的露出部分109b进行处理。例如,在一个实施例中,引线框架105可包括铜引脚。此时回流期间电耦接组件104与铜引脚之间的润湿接触角是确定的。这样,根据电耦接组件104与铜引脚之间的润湿接触角以及所需的润湿角度差值,可以推导出在回流期间电耦接组件104与非附着区113之间所需的润湿接触角。根据非附着区113所需的润湿接触角,可选择适合的技术和/或操作参数,例如氧离子处理、热处理,来得到非附着区113所需的润湿接触角。
如图2D和2E所示,该微电子封装制作过程的下一步包括移除剩余的掩膜材料108来露出附着区112。最后,引线框架105可以经过其他合适的步骤(如前面图1E和图1F所详细描述的步骤)以形成微电子封装。
图3A-3C是根据本发明又一实施例的部分引线框架在微电子封装制作过程中的剖视图。在该实施例中,采用模板印刷来形成附着区112和非附着区113。如图3A所示,第一步,在靠近引脚的第一表面107a处放置模板132。模板132具有与附着区112相对应的开口134。第二步,如图3B所示,采用喷涂、印刷和/或其他方式通过模板132的开口134(如图3A中的箭头111所示),将润湿材料111形成于引脚的第一表面107a上。
接下来,如图3C所示,从引脚的第一表面107a移除模板132。第一表面107a的露出部分可能会经过如前面图1D中的描述的表面处理步骤。最后,引线框架105可以经过其他合适的步骤(如前面图1E和图1F所详细描述的步骤)以形成微电子封装。
图4A和4B是根据本发明再一实施例的部分引线框架在微电子封装制作过程中的剖视图。在该实施例中,利用预成型构件150来形成附着区112和非附着区113。如图4A所示,该制作过程包括将预成型构件150附着至引脚的第一表面107a。在图4A和4B所示的实施例中,预成型构件150包括具有接口层152和黏着层156的叠层结构。接口层152包括在回流期间对电耦接组件104润湿性良好的第一部分154和润湿性不良的第二部分158。在一个实施例中,第一部分154包括银,第二部分包括铜的氧化物(CuxO)。第一部分154与第二部分158分别和附着区112与非附着区113相对应。
如图4B所示,附着有预成型构件150的引线框架105在被附着至半导体芯片100之前,可能被选择性地加工处理和/或经过其他合适的工艺步骤。尽管在图4A和4B所示的实施例中,预成型构件150具有预先附着的黏着层156。在其它实施例中,预成型构件150包括放置于一个可选底板上的接口层152(未示出),无需黏着层156,而替代性地在将预成型构件150附着至引线框架105之前,在预成型构件150和/或引线框架105上使用黏着剂。
根据本发明的实施例,针对芯片上引线封装做了几个实验。图5A和5B是在实验中截取的芯片上引线封装的剖视图。在第一个实验中,使附着有焊料凸块204的半导体芯片200与具有铜引脚206的引线框架205彼此接触。其中铜引脚206的表面润湿性基本一致。然后,对半导体芯片200和引线框架205进行回流。从图5A可以清楚地看出,焊料凸块206在回流期间不可控地塌陷并彼此接触。
在第二个实验中,使附着有焊料凸块304的半导体芯片300与具有引脚306的引线框架305彼此接触,该引脚306已按照图1A~1E所示的制作过程被处理过。引脚306包括位于其上表面的含有银的润湿焊盘312。然后,对半导体芯片300和引线框架305进行回流。从图5B可以清楚地看出,焊料凸块304基本上保持它的形状,并没有迁移出润湿焊盘312。
上述本发明的说明书和实施仅仅以示例性的方式对本发明进行了说明,这些实施例不是完全详尽的,并不用于限定本发明的范围。对于公开的实施例进行变化和修改都是可能的,其他可行的选择性实施例和对实施例中元件的等同变化可以被本技术领域的普通技术人员所了解。本发明所公开的实施例的其他变化和修改并不超出本发明的精神和保护范围。
Claims (19)
1.一种微电子封装的制作方法,包括以下步骤:
步骤A:在引线框架的引脚上形成附着区和非附着区,其中在回流期间,对于电耦接组件而言,附着区具有比非附着区好的润湿性;
步骤B:使位于半导体芯片上的电耦接组件与引脚的附着区接触;以及
步骤C:回流电耦接组件,使电耦接组件可控地塌陷,以在半导体芯片与引线框架的引脚之间形成电连接。
2.如权利要求1所述的制作方法,其中步骤A包括:
在含铜引脚的表面淀积光刻胶;
图案化光刻胶以形成与附着区相对应的开口,其中引脚的第一部分表面从光刻胶的开口露出,引脚的第二部分表面被光刻胶覆盖;
通过光刻胶的开口在引脚的第一部分表面淀积银;
移除淀积于引脚第二部分表面的光刻胶;以及
氧化引脚的第二部分表面以形成铜的氧化物。
3.如权利要求1所述的制作方法,其中步骤A包括:
在引脚的表面淀积掩膜材料;
图案化掩膜材料以形成与附着区相对应的开口,其中引脚的第一部分表面从掩膜材料的开口露出,引脚的第二部分表面被掩膜材料覆盖;
通过掩膜材料的开口在引脚的第一部分表面淀积润湿材料;
移除淀积于引脚第二部分表面的掩膜材料;以及
处理引脚的第二部分表面,使得在回流期间,对于电耦接组件而言,引脚的第二部分表面具有比第一部分表面差的润湿性。
4.如权利要求1所述的制作方法,其中步骤A包括:
在引脚的表面淀积掩膜材料;
移除部分掩膜材料,露出引脚的第二部分表面,掩膜材料的剩余部分覆盖引脚的第一部分表面;
处理引脚的第二部分表面,使得在回流期间,对于电耦接组件而言,引脚的第二部分表面具有比第一部分表面差的润湿性;以及
移除引脚表面剩余的掩膜材料。
5.如权利要求4所述的制作方法,其中处理引脚第二部分表面的步骤包括对引脚第二部分表面进行氧化。
6.如权利要求1所述的制作方法,其中步骤A包括:
在靠近引脚的表面处设置模板,其中该模板具有与附着区相对应的开口;以及
通过模板的开口在引脚的表面印刷润湿材料。
7.如权利要求1所述的制作方法,其中步骤A包括:
在引脚上表面附着一预成型构件,该预成型构件具有对应于附着区的第一部分和对应于非附着区的第二部分。
8.如权利要求1所述的制作方法,进一步包括:
在电耦接组件接触引脚的附着区之前,将电耦接组件附着于半导体芯片的接触焊盘上;以及
用塑型材料至少部分地包覆半导体芯片、电耦接组件和引脚。
9.如权利要求1所述的方法,其中在回流期间,对于电耦接组件而言,附着区具有第一润湿接触角,非附着区具有第二润湿接触角,其中第一润湿接触角小于第二润湿接触角。
10.如权利要求9所述的方法,其中第二润湿接触角和第一润湿接触角的差值由回流期间电耦接组件从附着区往外的期望迁移度决定。
11.如权利要求9所述的方法,其中步骤A包括:
在引脚的第一部分表面淀积润湿材料;和/或
处理引脚的第二部分表面,使得在回流期间,对于电耦接组件而言,引脚的第二部分表面具有比第一部分表面差的润湿性。
12.如权利要求9所述的方法,其中电耦接组件包括焊料球。
13.一种微电子封装,包括:
半导体芯片,具有接触焊盘;
引线框架,具有引脚,其中引脚包括附着区和非附着区;以及
电耦接组件,位于半导体芯片的接触焊盘和引脚的附着区之间,在半导体芯片的接触焊盘与引脚之间形成电连接;
其中在回流期间,对于电耦接组件而言,引脚的附着区具有比非附着区好的润湿性。
14.如权利要求13所述的微电子封装,其中引脚含有铜,附着区包括位于引脚表面的银,非附着区包括位于引脚表面的铜氧化物,其中电耦接组件与引脚附着区上的银接触。
15.如权利要求13所述的微电子封装,其中引脚包括导电材料,附着区包括位于引脚表面的润湿材料,其中电耦接组件与引脚附着区的润湿材料接触。
16.如权利要求13所述的微电子封装,其中引脚包括导电材料,附着区包括位于引脚表面的润湿材料,非附着区包括导电材料的氧化物,其中电耦接组件与引脚附着区的润湿材料接触。
17.如权利要求13所述的微电子封装,其中在回流期间,对于电耦接组件而言,附着区具有第一润湿接触角,非附着区具有第二润湿接触角,其中第一润湿接触角小于90°,第二润湿接触角大于90°。
18.如权利要求17所述的微电子封装,其中第二润湿接触角与第一润湿接触角的差值大于20°。
19.如权利要求13所述的微电子封装,其中电耦接组件包括焊料球。
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CN107799482B (zh) * | 2016-08-31 | 2020-01-21 | 日月光半导体制造股份有限公司 | 半导体封装结构及制造其之方法 |
US10879215B2 (en) | 2016-08-31 | 2020-12-29 | Advanced Semiconductor Engineering, Inc. | Method for manufacturing a semiconductor device package |
CN110176502A (zh) * | 2018-02-21 | 2019-08-27 | 茂达电子股份有限公司 | 光学检测装置及光学封装结构 |
CN110176502B (zh) * | 2018-02-21 | 2021-07-27 | 茂达电子股份有限公司 | 光学检测装置及光学封装结构 |
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US20150155226A1 (en) | 2015-06-04 |
US9070671B2 (en) | 2015-06-30 |
US8906797B2 (en) | 2014-12-09 |
US20140004662A1 (en) | 2014-01-02 |
US20140377912A1 (en) | 2014-12-25 |
US20120153447A1 (en) | 2012-06-21 |
US8361899B2 (en) | 2013-01-29 |
TW201241943A (en) | 2012-10-16 |
TWI474416B (zh) | 2015-02-21 |
CN202352660U (zh) | 2012-07-25 |
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