CN1387241A - 形成倒装式半导体封装的方法 - Google Patents

形成倒装式半导体封装的方法 Download PDF

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Publication number
CN1387241A
CN1387241A CN02120218A CN02120218A CN1387241A CN 1387241 A CN1387241 A CN 1387241A CN 02120218 A CN02120218 A CN 02120218A CN 02120218 A CN02120218 A CN 02120218A CN 1387241 A CN1387241 A CN 1387241A
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butut
chip
chip semiconductor
lead frame
flip
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CN1231953C (zh
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谭铁悟
R·E·P·爱法利斯
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Advanpack Solutions Pte Ltd
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AIDIPAIK TECHNOLOGY Pte Ltd
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Abstract

一种形成倒装式半导体封装的方法,其主要步骤是:提供氧化(220)的铜引线框和具有从芯片焊盘延伸的铜柱并且在铜柱的自由端上具有焊料球的半导体芯片,焊料球用焊剂涂覆(225)。将半导体芯片放在(230)氧化的铜引线框上,焊料球临近氧化物层上的部分,并且与引线框上的互连位置对准。当再流(235)时,与氧化物层的部分临近的焊剂从互连位置选择性地清除了氧化物层的部分。此外,焊料球变为熔融态并粘结到互连位置的清除了氧化物层的表面上。没有被清除的氧化物层的剩余部分有利地提供了钝化层,此钝化层有利地包容熔融焊料,并防止熔融焊料从互连位置流走。

Description

形成倒装式半导体封装的方法
技术领域
本发明涉及在引线框上形成倒装式(flip chip)半导体封装，更具体地说，涉及在裸铜引线框上形成倒装式半导体封装。
背景技术
在半导体封装中，相当敏感且难以处理将半导体芯片封装到具有外部连接的封装中。封装使半导体芯片更便于处理，还使外部电路容易地与其连接。
已知的半导体封装的方法是采用镀覆的引线框。引线框是布图的金属片，一般是已经用银、镍或钯镀覆的铜。镀覆是必须的以便防止铜的氧化，以提供将粘结焊料的表面，或者当采用引线连接时，可以连接金或铝。金属片的图形提供了形成半导体封装的引线框。
一般，引线框包含用于安装半导体芯片的旗标(flag portion)部分，芯片的背部连接到旗标部分或叶片(paddle)上；引线部分向内向着旗标部分延伸。在封装工艺过程中，在芯片上的焊盘(pad)和引线部分之间连接导线的长度，结果通常在模制复合物中封装了芯片、旗标部分、导线的长度和引线部分的部分；露出的引线部分的遗留部分用于外部电连接。
目前，用于形成倒装式半导体封装的镀覆引线框具有内引线部分和外引线部分。将内引线部分设置为图形，内引线部分上的互连位置与半导体芯片上的焊盘的图形匹配。用从芯片上的焊盘延伸的铜柱挤压半导体芯片，将焊料球附着到铜柱的自由端。
由Francisca Tung在2000年4月27日申请的美国专利申请序列号No.09/564,382、标题为“Improved pillar Connection For Semicinductor Chip andMethod Of Manufacture”和由Francisca Tung在2000年4月26日申请的美国专利申请序列号(未授权)、转让本专利申请的公共受让人的标题为“Improvedpillar Connection For Semicinductor Chip and Method Of Manufacture”教导了形成这里所述的柱状结构。将上述专利申请引入作为参考。
在组装过程中，或者将焊剂印刷到引线框上互连位置或者将焊料球浸到焊剂中。浸焊剂之后，倒转半导体芯片，将其放到引线框上。焊料球临近内引线部分上的互连位置，焊剂润湿互连位置和焊料球。然后再流组件。
在升高的再流温度下，焊剂清洁了互连位置的镀覆表面，焊料球熔融并粘结到互连位置上，这样在半导体芯片上铜柱的自由端和引线框上的互连位置之间形成了焊料互连。
再流后，当使用普通的焊剂时，清洗组件以除去残余的焊剂，然后密封在模制的复合物中。然而，当采用不用清洗的焊剂时，就不需要清洗步骤了。已知得到的封装为引线框上的倒装式半导体封装。
此工艺的一个缺陷是需要镀覆的引线框，镀覆增加了封装的成本。另一个缺陷是当焊料球熔融时，由于在引线框的镀覆表面上没有任何物体来控制或禁止熔融焊料的流动，因此熔融的焊料流到引线部分的整个表面上，这种焊料的流动经常称为溢流，对这种形成在引线框上的倒装式半导体封装产生负面影响。
第一个考虑是，当焊料从互连位置流走时，各个互连具有比提供可靠电连接所需要的焊料更少的焊料。第二个考虑是，具有减少了焊料量的互连不能平坦地支撑半导体芯片。结果会影响引线框上半导体芯片的平整度，并且不平的芯片会产生芯片上铜柱之间的短路。此种情况称为失效的芯片。
第三个考虑是溢流导致焊料流过边缘并流到引线部分的相对的表面上去。此后，在模制过程中，模制复合物不会很好地粘到受影响的表面上去。已知的第四个考虑是毛细(wicking)作用，当引线框上的引线部分成型时，使得芯片下端侧和引线之间具有很小的间隙，并且有的互连位置接近于芯片的边缘，毛细作用出现。在此设置中，互连位置的焊料会沿着引线流动，并且通过毛细作用，向上流动通过小的间隙。
在致力于降低引线框上倒装式半导体封装的成本过程中，已经在试图使用未镀覆的或裸铜引线框，简单地称为铜引线框。然而，在很大程度上，铜引线框也具有上面所讨论的与镀覆的引线框一样的缺陷，此外，当铜裸露时易于氧化，焊料不能很好地粘结到铜氧化物上。
发明内容
本发明的目的在于提供一种形成倒装式半导体封装的方法，其能有效的降低封装成本，并防止焊料的溢流，提高了芯片封装的有效性。
据此，在本发明的一个技术方案中，提供了一种形成倒装式半导体封装的方法，此方法包括步骤：
a)提供具有第一表面的布图的金属导体层，其中第一表面上具有互连位置图形；
b)在布图的金属导体层的第一表面上形成钝化层；
c)提供具有第一表面的半导体芯片，第一表面上具有焊盘图形，其中可再流动的导电淀积物淀积在焊盘上；
d)选择性地设置钝化清除剂；
e)将半导体芯片放到布图的金属导体层上，以形成组件，其中可再流动的导电淀积物临近部分钝化层，其中可再流动的导电淀积物与互连位置的图形相邻，并且其中钝化清除剂粘结到可再流动的导电淀积物上和部分钝化层上；和
f)再流组件，其中钝化清除剂基本上从布图的金属导体层上除去了钝化层的部分，并且其中可再流动的导电淀积物在半导体芯片上的焊盘和布图的金属导体层之间形成了导电互连。
根据同一发明构思，在另一个方案中，本发明提供一种形成倒装式半导体封装的方法，此方法包括步骤：
a)提供具有第一表面的布图的金属导体层，其中第一表面上具有互连位置图形；
b)在布图的金属导体层的第一表面上形成钝化层；
c)提供具有第一表面的半导体芯片，第一表面上具有焊盘图形，其中电导体从焊盘延伸，并且其中焊料淀积物淀积在电导体的自由端上；
d)选择性地淀积焊剂；
e)将半导体芯片放到布图的金属导体层上，以形成组件，其中焊料淀积物临近部分钝化层，其中焊料淀积物与互连位置的图形相邻，并且其中焊剂粘结到焊料淀积物上和部分钝化层上；和
f)再流组件，其中焊剂基本上从布图的金属导体层上除去了部分钝化层，其中焊料淀积物在半导体芯片上的电导体和布图的金属导体层之间形成了焊料互连，并且其中有机材料层蒸发而且在蒸发的同时提供钝化。
本发明的技术效果是：可有效防止互连位置处的熔融焊料流走，这样，改进了铜柱和引线框之间的连接，提高了芯片封装的有效性；且其封装成本较低。
附图说明
图1显示了用于倒装式半导体封装的铜引线框；
图2显示了形成具有半导体芯片和图1的铜引线框的半导体封装的详细工艺流程图；
图3A-3E显示了在图2的工艺过程中，图1的部分铜引线框和半导体芯片的截面示意图；
图4显示了形成具有半导体芯片和图1的铜引线框的半导体封装的详细工艺的流程图；
图5A-5F显示了在图4的工艺过程中，图1的部分引线框和半导体芯片的截面示意图。
具体实施方式
下面根据图1～图5F，给出本发明的较好实施例，并予以详述，进一步提供本发明的技术细节：
采用氧化的铜引线框来形成倒装式半导体封装，而不需要首先除去氧化层。半导体芯片具有从芯片焊盘延伸的铜柱，并且具有附着的焊料球，将半导体芯片浸入焊剂中以便用焊剂覆盖焊料球。然后将半导体芯片放到氧化的引线框上，焊料球临近上面的氧化物层的部分，并且与引线框上的互连位置对准。当再流时，氧化物层的部分上的焊剂选择性地从互连位置清除了这样氧化物层部分。这样，有利地使焊料球熔融并粘结到互连位置的清除了氧化物层的部分上。此外，没有被清除的氧化物层的剩余部分提供了钝化层，此钝化层有利地包容了熔融的焊料，并且防止焊料从互连位置流走。也可以采用抗氧化剂层作为钝化层，当形成焊料互连时，此钝化层蒸发。
图1显示了具有内引线部分101、外引线部分102和板条(damber)部分103的铜引线框100的部分。轮廓线104表示在引线框100上放置半导体芯片(未示出)的位置。在引线框100上形成半导体封装(未示出)之后，连接到半导体芯片的内引线部分101将与半导体芯片一起密封在封装中，外引线部分102将从封装延伸。板条部分103限定了封装的轮廓，在模制工艺过程中提供了密封，在封装中密封了半导体芯片和内引线部分102。一般，如本领域已知的，以条带的形式由供应商提供引线框100，在其上形成几个封装。
参考图2和图3A-3E，根据本发明，用于在引线框100上形成倒装式半导体封装的工艺200开始205，提供210铜引线框100。引线框100是布图的金属引线框，它提供了布图的金属导体层，并且包括由金属片例如铜的模压。可以选择的是，可以通过蚀刻铜片来制造引线框100。当金属片的厚度相当小时，引线框100可以包括挠性电路，而且已知为包含挠性衬底的弯折电路。此外，这里所提到的引线框100延伸到包含陶瓷、层叠体的衬底、聚酰亚胺衬底和带。
可以在互连位置307蚀刻215引线框100来形成凹坑306。两个内引线部分101A和101B如图3A所示，一个具有一个互连位置307A的101A具有一个凹坑306A，另一个具有三个互连位置307B的101B具有三个凹坑306B。
互连位置307形成了与半导体芯片上的焊盘图形对应的图形，所述半导体芯片将安装到引线框100上。蚀刻的凹坑306提供了用于增加熔融焊料含量的汇集区，在后面的工艺200中将变得一目了然。此外，凹坑306还提供了增加的焊料附着表面区。应注意引线框100上的凹坑306加强了工艺200，而不是强制的步骤。在没有凹坑306的情况下焊料也可以粘结到互连位置307。可以在不需要在引线框100上的互连位置307处形成凹坑306的情况下实施本发明。
然后在引线框100上形成220氧化物层310。通常，当引线框100暴露于具有相当高湿度的环境条件时，可以在引线框100上形成220氧化物层310。这是因为铜比其它金属更容易氧化。因此，形成氧化物层310需要引线框100在环境条件中暴露预定时间的步骤。
可以选择的是，在温度升高和湿度增加的受控制的环境中，可以促进氧化物层310的形成。例如，可以在烘箱中具有相当高湿度的腔室中烘烤引线框100预定的时间。还可以在不需要控制湿度的情况下，通过简单的烘烤，在引线框100上形成所需要的氧化物层。
焊料不会很好地粘结到氧化物层上。根据本发明，铜上的氧化物层是钝化层。与焊料掩模一样，可以在铜引线框上的互连位置周围布图此氧化物层，以防止焊料从互连位置流走。因此，可以根据预定的钝化图形在引线框100上形成氧化物层310。
提供用于安装到引线框100上的半导体芯片320，半导体芯片320具有与凹坑306的图形对应的焊盘图形(未示出)。半导体芯片320包含电导体，例如从焊盘延伸的铜柱325。早先提到了关于在半导体晶片上形成铜柱的工艺。然后划割晶片以制造挤压的半导体芯片320。此外，半导体芯片320包含可再流的导电淀积物，例如附着到铜柱325的自由端的焊料淀积物或焊料球330。焊料球330可以通过本领域技术人员已知的各种技术附着。可以选择的是，半导体芯片不是挤压的时，焊料球可以直接附着到焊料焊盘上。
然后，通过用焊剂335涂覆焊料球330，在半导体芯片320上的焊料球330上施加或涂覆225清除剂或钝化清除剂，例如焊剂335。这通常是通过用浸了焊剂335的焊料球330定位半导体芯片320来实现的。在升高的温度下，焊剂335清洁了施加了它的表面，使得焊料粘结到清洁的表面上。施加焊剂335之后，半导体芯片320已准备好安装到引线框100上。可以选择的是，焊剂335可以根据与引线框100上的互连位置307的图形对应的图形印刷到引线框100上。
然后在引线框100的上面定位半导体芯片320，将焊料球330和引线框100上的互连位置307对准。焊料球330与互连位置307对准之后，将半导体芯片320放到230引线框100上。这里的放置可以包含对半导体芯片330施加并保持预定的力，使其压抵引线框100。
当半导体芯片320放到了引线框100上时，在互连位置307处，焊料球330的下表面临近氧化物层310的部分340，焊料球330上的焊剂335流到焊料球330的下表面和氧化物层310的表面之间的楔形间隙345中。在为下一步的准备中，在互连位置307处，焊料球330上的焊剂335润湿或粘结到氧化物层310的部分340上。由焊剂润湿的氧化物层310的部分确定了将从互连位置307选择性清除或除去的部分。
几个参数影响选择除去氧化物层310的部分340。这些参数包含采用的焊剂的类型和将被除去的氧化物量。例如，在裸铜引线框上，使用的美国Alphametals的已知为WS609的焊剂已经取得了好的结果。对于具体的半导体封装类型来说，测量得到的倒装式半导体封装的可靠性以便具体选择这些参数。一个可靠性的测量是检测由于接点断开或开裂而出现的开路。因此，使用的焊剂类型和形成的氧化物层趋向于在引线框上倒装式半导体封装的不同类型之间变化。
然后再流235半导体芯片320、引线框100、氧化物层310和焊剂335的组件350。在再流235过程中，焊剂335将引线框100上互连位置307的氧化物层310的部分340清除掉，并且焊料球330变为熔融态。熔融的焊料345流到互连位置307的清洁了的表面上，并粘结到此清洁的表面上。然而，互连位置307周围的氧化层310的部分355没有被清除掉，这些部分355作为钝化层或焊料掩模，包容互连位置307处的熔融焊料345。因此，熔融焊料345可以流到铜柱325上。这样可以提高铜柱325上粘结焊料345的表面积，可以增加铜柱325和引线框100之间的连接的机械强度，这样产生了更可靠的电连接。
因此，所述的本发明选择性地除去了互连处氧化物层的部分，有利地留下了剩余的氧化物层作为引线框上的钝化层，防止互连位置处的熔融焊料流走。这样，改进了铜柱和引线框之间的连接。
再流235之后，当采用通常的焊剂时，清洗组件350以除去任何剩余的焊剂，并且将组件350密封245在模制复合物中(未示出)以便在引线框100上制造倒装式半导体封装(未示出)。可以选择的是，当采用不用清洗的焊剂时，就不需要清洗了。因此，从引线框100分割半导体封装的最后步骤之后，板条部分103被切断，工艺200结束250。
如本领域技术人员已知的，可以在分割之前，存在另外的形成外部引线部分102和测试半导体芯片320的功能的步骤。
参考图4和图5A-5F，根据本发明，可选择的用于在引线框100上形成倒装式半导体封装的工艺400开始405，提供410铜引线框100。与前面一样，可以蚀刻415引线框100以便在互连位置307形成凹坑306。这里，在其上形成氧化之前，或者已经从引线框100上除去氧化之后，提供铜引线框1 00。
然后在引线框100上施加420有机材料覆盖层510。覆盖层材料可以包括美国LeaRonal制造的Cuoprotec。通常，有机材料510以液态的形式供应，通过将铜引线框100浸入有机材料510来涂覆。有机材料有效地在铜引线框100的表面上形成保护膜，防止氧化。
根据本发明，焊料不能很好地粘结到有机材料510上，有机材料覆盖层510是钝化层，可以在铜引线框的焊料互连位置的周围布图此钝化层，以便防止焊料从互连位置流走。
然后，如早先所述，将焊剂335施加425到半导体芯片330上的焊料球330上，这样半导体芯片已准备好安装到引线框100上。
然后将半导体芯片320定位到引线框100上，焊料球335与引线框100上的互连位置对准。对准后，将半导体芯片320放430到引线框100上。而且，这里的放置可以包含在半导体芯片组件332上作用和保持预定的力以使其抵压引线框100。
当半导体芯片320放到引线框100上时，在互连位置307处，焊料球330的下表面与有机材料覆盖层510的部分540临近，焊料球330上的焊剂335流到焊料球330的下表面和有机材料覆盖层510之间的楔形间隙中。在为下一步准备中，在互连位置307用焊剂335润湿了有机材料覆盖层510的表面。
然后再流435半导体芯片320、引线框100、有机材料覆盖层510和焊剂135的组件550。在再流435过程中，焊剂335清除掉了引线框100上的互连位置307处的有机材料覆盖层510的部分540，焊料球330变为熔融状态。熔融的焊料555流到互连位置307的清除了的表面上，并粘结到清洁的表面上。然而，互连位置307周围的有机材料覆盖层510的部分506没有被清除掉，但开始蒸发，部分560的未蒸发的部分作为钝化层，在互连307处包容熔融的焊料555。因此，熔融焊料555可以跑到铜柱325上，并且可以带米前面所说的好处。
当再流435组件550时，焊料在半导体芯片320和引线框100之间形成互连。而有机覆盖层510的部分560从引线框100上蒸发，直到有机材料510从引线框100上完全蒸发掉，如图5F所示。
接着，如果使用普通的焊剂，清洗440组件550，密封445，并从引线框100分割447如此形成的半导体封装。当使用不用清洗的焊剂时，就不需要清洗。当然同样要考虑成型外引线部分102和测试。
本领域技术人员应理解，使用氧化物层形成钝化层时所作的各种考虑在采用有机材料层作为钝化层时同样应该考虑。
因此，所述的本发明使用具有有机材料覆盖层的未氧化的铜引线框。再流工序在互连位置处选择性地除去了有机材料覆盖层的一部分，有利地蒸发了有机材料覆盖层的剩余部分。蒸发有机材料在引线框上提供了钝化层，以便防止互连位置的熔融焊料流走。结果，形成焊料互连之后，有机材料覆盖层的剩余部分从引线框蒸发掉。
所述的本发明提供了在具有氧化层的铜引线框上形成倒装式半导体封装的方法，氧化层阻止焊料从引线框上的互连位置流走。此外，也可以以同样的方式采用抗氧化剂层。
这是通过选择性地施加焊剂以便从铜引线框上的互连位置除去氧化层的部分来实现的。氧化物的剩余部分作为焊料掩模，提供了防止焊料从铜引线框上的互连位置流走的钝化层。
这样，所述的本发明提供了一种形成倒装式半导体封装的方法，它克服了或至少减轻了先有技术的上述问题。
应理解，尽管只详细描述了本发明的一个具体实施例，但在不离开本发明范围的情况下，本领域技术人员可以作出各种修改和改进。

Claims (41)

1.一种形成倒装式半导体封装的方法，此方法包括步骤：
a)提供具有第一表面的布图的金属导体层，其中第一表面上具有互连位置图形；
b)在布图的金属导体层的第一表面上形成钝化层；
c)提供具有第一表面的半导体芯片，第一表面上具有焊盘图形，其中可再流动的导电淀积物淀积在焊盘上；
d)选择性地设置钝化清除剂；
e)将半导体芯片放到布图的金属导体层上，以形成组件，其中可再流动的导电淀积物临近部分钝化层，其中可再流动的导电淀积物与互连位置的图形相邻，并且其中钝化清除剂粘结到可再流动的导电淀积物上和部分钝化层上；和
f)再流组件，其中钝化清除剂基本上从布图的金属导体层上除去了钝化层的部分，并且其中可再流动的导电淀积物在半导体芯片上的焊盘和布图的金属导体层上的互连位置之间形成了导电互连。
2.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，在步骤a)之后的步骤包括步骤：在布图的金属导体层的互连位置形成凹坑，以便增加步骤f)过程中可流动导电淀积物的含量。
3.根据权利要求2所述的形成倒装式半导体封装的方法，其特征在于，所述的形成凹坑的步骤包括在布图的金属导体层的互连位置进行蚀刻的步骤。
4.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，形成钝化层的步骤b)包括在布图的金属导体层的第一表面上形成氧化物层的步骤。
5.根据权利要求4所述的形成倒装式半导体封装的方法，其特征在于，在布图的金属导体层的第一表面上形成氧化物层的步骤b)包括根据布图的金属导体层的第一表面上的预定钝化图形布图氧化物层的步骤。
6.根据权利要求4所述的形成倒装式半导体封装的方法，其特征在于，所述的形成氧化物层的步骤包括烘焙布图的金属导体层的步骤。
7.根据权利要求4所述的形成倒装式半导体封装的方法，其特征在于，所述的形成氧化物层的步骤包括将布图的金属导体层暴露于相对潮湿的条件下的步骤。
8.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，选择性地设置钝化清除剂的步骤d)包括在可再流动的导电淀积物上淀积钝化清除剂的步骤。
9.根据权利要求8所述的形成倒装式半导体封装的方法，其特征在于，在可再流动的导电淀积物上设置钝化清除剂的步骤包括用钝化清除剂涂覆可再流动的导电淀积物的步骤。
10.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，选择性地设置钝化清除剂地步骤d)包括在钝化层上根据互连位置的图形设置钝化清除剂的步骤。
11.根据权利要求10所述的形成倒装式半导体封装的方法，其特征在于，所述的在钝化层上设置钝化清除剂的步骤包括在钝化层上根据互连位置的图形印刷钝化清除剂的步骤。
12.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，在步骤e)之前的步骤包括将可再流动的导电淀积物于互连位置的图形对准的步骤。
13.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，还包括：在步骤f)之后，密封至少一部分组件以便在布图的金属导体层上形成半导体封装的步骤。
14.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，还包括：在步骤f)之后，清洗组件的步骤。
15.根据权利要求14所述的形成倒装式半导体封装的方法，其特征在于，所述的清洗的步骤包括等离子清洗的步骤。
16.根据权利要求14所述的形成倒装式半导体封装的方法，其特征在于，还包括：在清洗步骤之后，密封至少一部分组件以便在布图的金属层上形成半导体封装的步骤。
17.根据权利要求16所述的形成倒装式半导体封装的方法，其特征在于，所述的密封步骤包括模制步骤。
18.根据权利要求16所述的形成倒装式半导体封装的方法，其特征在于，还包括：在密封步骤之后，从布图的金属导体层分割半导体封装的步骤。
19.根据权利要求1所述的形成倒装式半导体封装的方法，其特征在于，步骤a)包括提供布图的铜引线框的步骤。
20.根据权利要求19所述的形成倒装式半导体封装的方法，其特征在于，步骤b)包括在布图的铜引线框上形成铜氧化物层的步骤。
21.根据权利要求20所述的形成倒装式半导体封装的方法，其特征在于，步骤c)包括步骤：提供具有第一表面的半导体芯片，第一表面上具有焊盘图形，其中焊料淀积物淀积在焊盘上。
22.根据权利要求21所述的形成倒装式半导体封装的方法，其特征在于，步骤d)包括选择性地设置焊剂的步骤。
23.根据权利要求22所述的形成倒装式半导体封装的方法，其特征在于，步骤e)包括将半导体芯片放在布图的铜引线框上的步骤，其中焊料淀积物临近铜氧化物层的部分，其中焊料淀积物接近互连位置的图形，并且其中焊剂粘结到焊料淀积物和铜氧化物层的部分上。
24.根据权利要求23所述的形成倒装式半导体封装的方法，其特征在于，步骤f)包括再流组件的步骤，其中焊剂基本上从布图的铜引线框上清除了铜氧化物层的部分，并且其中焊料淀积物在半导体芯片上的焊盘和布图的铜引线框上的互连位置之间形成导电互连。
25.根据权利要求19所述的形成倒装式半导体封装的方法，其特征在于，步骤b)包括在布图的铜引线框上形成抗氧化剂层，以便防止布图的铜引线框进一步氧化的步骤。
26.根据权利要求25所述的形成倒装式半导体封装的方法，其特征在于，步骤b)包括在布图的铜引线框上形成有机材料层的步骤。
27.根据权利要求26的所述的形成倒装式半导体封装的方法，其特征在于，步骤c)包括提供具有第一表面的半导体芯片的步骤，在第一表面上具有焊盘图形，其中焊料淀积物淀积在焊盘上。
28.根据权利要求27所述的形成倒装式半导体封装的方法，其特征在于，步骤d)包括选择性地淀积焊剂的步骤。
29.根据权利要求28所述的形成倒装式半导体封装的方法，其特征在于，步骤e)包括在布图的铜引线框上放置半导体芯片，以便形成组件的步骤，其中焊料淀积物临近有机材料层的部分，其中焊料淀积物于互连位置的图形相邻，并且其中焊剂粘结到焊料淀积物和有机材料层的部分上。
30.根据权利要求29所述的形成倒装式半导体封装的方法，其特征在于，步骤f)包括再流组件的步骤，其中焊剂基本上从布图的铜引线框上清除了有机材料层的部分，并且其中焊料淀积物在半导体芯片上的焊盘和布图的铜引线框的互连位置之间形成导电互连。
31.根据权利要求30所述的形成倒装式半导体封装的方法，其特征在于，还包括在步骤f)之后在布图的铜引线框上蒸发有机材料层的剩余部分的步骤。
32.一种形成倒装式半导体封装的方法，此方法包括步骤：
a)提供具有第一表面的布图的金属导体层，其中第一表面上具有互连位置图形；
b)在布图的金属导体层的第一表面上形成钝化层；
c)提供具有第一表面的半导体芯片，第一表面上具有焊盘图形，其中电导体从焊盘延伸，并且其中焊料淀积物淀积在电导体的自由端上；
d)选择性地淀积焊剂；
e)将半导体芯片放到布图的金属导体层上，以形成组件，其中焊料淀积物临近部分钝化层，其中焊料淀积物与互连位置的图形相邻，并且其中焊剂粘结到焊料淀积物和部分钝化层上；和
f)再流组件，其中焊剂基本上从布图的金属导体层上除去了部分钝化层，其中焊料淀积物在半导体芯片上的电导体和布图的金属导体层上的互连位置之间形成了焊料互连，并且其中有机材料层蒸发而且在蒸发的同时提供钝化。
33.根据权利要求32所述的形成倒装式半导体封装的方法，其特征在于，形成钝化层的步骤b)包括在布图的金属导体层的第一表面上形成氧化物层的步骤。
34.根据权利要求33所述的形成倒装式半导体封装的方法，其特征在于，步骤b)中的在布图的金属导体层的第一表面上形成氧化物层的步骤，包括在布图的金属导体层的第一表面上根据预定的钝化图形布图氧化物层的步骤。
35.根据权利要求32所述的形成倒装式半导体封装的方法，其特征在于，在焊料淀积物上选择性地设置焊剂的步骤d)包括用焊剂涂覆焊料淀积物的步骤。
36.根据权利要求35所述的形成倒装式半导体封装的方法，其特征在于，还包括在步骤f)之后进行等离子清洗组件的步骤。
37.根据权利要求36所述的形成倒装式半导体封装的方法，其特征在于，在清洗组件的步骤之后，进行密封至少一部分组件以便在布图的金属导体层上形成半导体封装的步骤。
38.根据权利要求32所述的形成倒装式半导体封装的方法，其特征在于，步骤a)包括提供布图的铜引线框的步骤。
39.根据权利要求38所述的形成倒装式半导体封装的方法，其特征在于，步骤b)包括在布图的铜引线框上形成铜氧化物的步骤。
40.根据权利要求38所述的形成倒装式半导体封装的方法，其特征在于，步骤b)包括在布图的铜引线框上形成抗氧化剂层以便防止布图的铜引线框的第一表面进一步氧化的步骤。
41.根据权利要求40所述的形成倒装式半导体封装的方法，其特征在于，步骤b)包括在布图的铜引线框上形成有机材料层的步骤。
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