CN1855405A - 一种倒装芯片方法 - Google Patents

一种倒装芯片方法 Download PDF

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CN1855405A
CN1855405A CNA2006100031715A CN200610003171A CN1855405A CN 1855405 A CN1855405 A CN 1855405A CN A2006100031715 A CNA2006100031715 A CN A2006100031715A CN 200610003171 A CN200610003171 A CN 200610003171A CN 1855405 A CN1855405 A CN 1855405A
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substrate
pad
bump
semiconductor chip
chip
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金永财
金舜荣
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Abstract

本发明涉及一种使用金凸点和喷墨打印技术的倒装芯片方法。所述倒装芯片方法包括：在半导体芯片上形成金凸点；利用喷墨打印技术将焊料墨印刷在基板的第一焊盘上；将半导体芯片安装到基板上，以使金凸点和第一焊盘接触；以及回流焊该基板。本发明可以降低加工成本和缩短加工时间，可以将微小间距的半导体芯片安装到基板上，并且通过去除对形成阻焊剂的需求，可以实现微小间距的基板焊盘。

Description

一种倒装芯片方法
技术领域
本发明涉及一种倒装芯片(flip chip)方法，更具体地涉及利用通过喷墨打印技术印刷的焊料墨，将半导体芯片上形成的金凸点(bump)附着到基板焊盘(pad)上的倒装芯片方法。
背景技术
将芯片固定或物理连接到基板上称为键合(bonding)，并且存在几种键合的方法，例如芯片键合、引线键合和倒装芯片键合，等等。这里，倒装芯片键合是在芯片的连接焊盘上形成凸点并直接连接到PCB基板的工艺。由于它不需要事先连接过程，并且是简单和适合的工艺，同时在集成度和性能方面具有优异的效果，因此它在朝向更小器件发展的电子产品方面引起了很大关注。
今天，倒装芯片方法具有多种用途，包括互联网主干交换。使用倒装芯片方法能提高交换系统的电性能和热性能，并且不但能使净引线长度(netwiring length)最小，而且还能使基板和其整个系统最小。倒装芯片方法目前用于计算机和移动电话中，以便满足包括大小、重量和引线宽度最小化的需求。
传统倒装芯片方法的例子，如图1到3所示，包括使用焊料凸点的方法，重新排列焊料凸点的方法，以及使用金凸点和粘合剂的方法。
图1是表示使用焊料凸点13的传统倒装芯片方法的剖视图，其中焊料凸点13在与基板焊盘19接触时熔化，以将半导体芯片11连接到基板焊盘19上。在形成在基板17上的一部分基板焊盘19上涂覆焊膏15，用于粘附到焊料凸点13上。焊膏15是使用金属掩模通过丝网印刷技术涂覆在基板焊盘19上。而且，在基板焊盘19之间形成阻焊剂21，用于防止由于熔融焊料凸点13的流动造成基板焊盘之间短路。
但是，最近随着半导体芯片集成度增大和尺寸减小的趋势一直持续，不但芯片焊盘电连接到基板焊盘的数量增多，而且芯片焊盘的间距也在减小，由此基板焊盘的大小和间距(间隙)也变得微小。因此，将焊膏印刷到基板焊盘19上的金属掩模的孔也变得微小，这阻碍了焊膏通过金属掩模的孔排出。并且，由于阻焊剂21也必须在设计基板时考虑，因此在设计具有微小间距的基板焊盘时要受到限制。
图2是表示重新排列焊料凸点13以解决上述问题的传统倒装芯片方法的示意图。如图2所示，这种方法通过从半导体芯片的原始芯片焊盘25再次连接图案27而重新排列焊盘，并且接着在其顶部形成焊料凸点13。但是，这种方法产生的问题是增加了加工时间和加工成本。
图3是表示使用金凸点14和粘合剂23的传统倒装芯片方法的剖视图。如图3所示，金凸点14形成在半导体芯片11上，与基板焊盘19对应。粘合剂涂覆在基板17的表面，例如各向异性导电膜(ACF)或不导电膏(NCP)。金凸点14通过热压结合在基板焊盘19上。
因此，在使用金凸点和粘合剂的传统倒装芯片方法中，高成本的粘合剂，诸如各向异性导电膜(ACF)或不导电膏(NCP)，以及通过倒装芯片键合机使用诸如热压的键合方法，将导致加工时间长和加工成本高。
发明内容
为解决上述问题提出本发明，因此本发明的一个目的是提供一种倒装芯片方法，该方法不但能够降低加工成本和减少加工时间，而且还能够将具有微小间距的半导体芯片装到基板上。
本发明的另一个目的是提供一种倒装芯片方法，该方法能够通过去除形成阻焊剂的需求而减小基板焊盘之间的间距。
为了达到上述目的，本发明通过下面的实施方式实现。
根据本发明一种实施方式的倒装芯片方法包括：在半导体芯片上形成金凸点，利用喷墨打印技术将焊料墨印刷在基板的第一焊盘上，将半导体芯片装到基板上以使金凸点和第一焊盘接触，以及回流焊该基板。
本发明的倒装芯片方法还可以包括：通过丝网印刷技术将焊膏印刷在基板的第二焊盘上，并将普通元件装在第二焊盘上。而且，根据本发明一种实施方式的倒装芯片方法还可以包括底部填充(underfilling)。
优选地，金凸点是通过镀(plating)形成的，并使用芯片安装机将半导体芯片和普通元件装在基板上，从而提高加工速度。
附图说明
图1是表示使用焊料凸点的传统倒装芯片方法的剖视图；
图2是表示使用焊料凸点重新排列的传统倒装芯片方法的示意图；
图3是表示使用金凸点和粘合剂的传统倒装芯片方法的剖视图；
图4是表示根据本发明一种实施方式的倒装芯片方法的流程图；
图5a是表示在半导体芯片上形成金凸点的剖视图；
图5b是表示在半导体芯片上形成金凸点的平面图；
图6是表示涂覆有焊膏的第二焊盘的平面图，上面使用金属掩模通过丝网印刷技术安装普通元件；
图7是表示利用喷墨打印技术印刷有焊料墨的基板第一焊盘的平面图；
图8是表示通过喷墨打印技术在基板的第一焊盘上形成焊料墨的剖视图；
图9是表示使用芯片安装机安装半导体芯片和普通元件的示意图；
图10是表示当焊料墨熔化时金凸点和基板的第一焊盘结合的剖视图。
具体实施方式
下面将参考附图更加详细地描述本发明的实施方式。
图4是表示根据本发明一种实施方式的倒装芯片方法的流程图。如图4所示，本发明的倒装芯片方法包括：在半导体芯片上形成金凸点(S11)，通过丝网印刷技术将焊膏印刷在基板的第二焊盘上(S13)，利用喷墨打印技术将焊料墨印刷在基板的第一焊盘上(S15)，安装半导体芯片和普通元件(S17)，回流焊(S19)，以及底部填充(S21)。
图5a和5b是表示在半导体芯片31上形成金凸点33(S11)的剖视图和平面图。金(Au)的优点在于是一种柔性金属以及电的良导体，并具有优异的热可靠性和外观。金凸点33是通过镀形成在半导体芯片31上。金凸点33的宽度和高度以及金凸点33之间的间距可以根据基板的焊盘(未图示)而改变。当半导体芯片31装在基板上时，金凸点33通过印刷在第一焊盘上的焊料墨与第一焊盘结合。
图6是表示使用金属掩模48在基板43的第二焊盘39’上涂覆焊膏37(S13)的平面图。如图6所示，在基板43上形成第一焊盘39和第二焊盘39’，第一焊盘39具有微小间距并且上面装有半导体芯片，第二焊盘39’具有较大间距并且上面装有普通元件(电阻、电容、电感、OP放大器，等等)。由于与第一焊盘39相比，第二焊盘39’的焊盘尺寸和焊盘间距(间隙)较大，因此对于第二焊盘39’来说，焊膏可以更好地排出，从而使用金属掩模48可以容易地将焊膏37涂覆在第二焊盘39’上。金属掩模48上形成与第二焊盘39’形状相同的多个孔48a。在第二焊盘39’之间涂覆阻焊剂41(图中表示为灰色)。
图7是表示利用喷墨打印技术将焊料墨印刷在基板43的第一焊盘39上(S15)的平面图，图8是表示通过喷墨打印技术在基板43的第一焊盘39上形成焊料墨的剖视图。
如图7所示，由于上面安装有半导体芯片(未图示)的第一焊盘39具有微小间距，因此难以如上所述利用焊膏和金属掩模使用丝网印刷技术。由此使用喷墨打印机，它不但能打印微小图案，而且能缩短操作时间，从而将焊料墨印刷在第一焊盘39上。如图8所示，印刷的焊料墨35的厚度小于金凸点33的厚度。焊料墨35的厚度可以根据金凸点33的大小和间距而改变。
在基板43的第一焊盘39部分上未涂覆阻焊剂41。这是由于，如同传统焊料凸点一样，附着在第一焊盘39上的金凸点33不会熔化和流向其它焊盘。而且，焊料墨35也不会流向其它焊盘，因为它印刷得很薄。这样，利用根据本发明一种实施方式的第一焊盘39，焊盘之间的间隙可以做得微小，因为不需要阻焊剂。并且，也可以安装具有微小间距的半导体芯片。
焊料墨35是一种含有金属纳米颗粒的微小液滴形式的墨。焊料墨35中所含的金属包括锡(Sn)63％(重量百分数)和铅(Pb)37％(重量百分数)。为增大铅的导电性可以包括银，因此可以使用锡(Sn)62％(重量百分数)、铅(Pb)36％(重量百分数)和银(Ag)2％(重量百分数)。而且，由于铅对人体有毒，可以不用，可以使用含有锡(Sn)、银(Ag)和铜(Cu)的无铅焊料墨35。焊料墨35在回流焊(S19)过程中熔化，并且在金凸点33和第一焊盘39之间形成金属间化合物(IMC)。由于金属间化合物是非常稳定的材料，因此在附着力方面具有高的可靠性。此外，由于焊料墨35在现有技术中作为粘合剂(NCP、ACF)，因此本发明的倒装芯片方法不需要昂贵的粘合剂，从而可以降低加工成本。
图9是表示使用芯片安装机47安装半导体芯片31和普通元件45(S17)的示意图。
如图9所示，芯片安装机47将半导体芯片31安装在第一焊盘39上，将诸如电阻、电容、电感、OP放大器等的普通元件45安装在第二焊盘39’上。由于半导体芯片31和普通元件45是用典型的芯片安装机47高速安装的，并且由于没有包括使用倒装芯片键合机的工序，因此本发明的倒装芯片方法可以缩短加工时间。
芯片安装机47是将半导体芯片或普通元件高速安装到上面形成有焊膏37或焊料墨35的基板的焊盘上的一种装置。芯片安装机47不但可以安装小芯片，例如2125、3216和TANTAL，而且可以高速安装IC，例如接头型、小尺寸封装(SOP：引线面(lead face)在各个方向朝外的IC)、J形引线小外形封装(SOJ：引线面在各个方向朝内的IC)、四方扁平封装(QFP：引线面朝外的扁平方形IC)、塑料有引线芯片载体封装(PLCC：引线面朝内的IC)、球栅阵列封装(BGA：焊料球按栅格阵列附着在封装底部的无引线元件)、以及芯片尺寸封装(CSP)，等等。
图10是表示根据本发明一种实施方式，当通过回流焊(S19)熔化焊料墨35时，金凸点33和第一焊盘39之间形成金属间化合物的剖视图。回流焊是指将上面装有半导体芯片31和普通元件45的基板43加热到一定温度使焊膏37和焊料墨35熔化的工艺。回流焊温度根据所用的焊膏37和焊料墨35而改变，但一般约为200℃。回流焊时间也根据基板大小和芯片的数量或类型而改变。在典型回流焊中，优选地，温度缓慢升高，缓慢下降，以防止焊膏流走和出现裂纹。
金凸点33和第一焊盘39是通过由焊料墨35形成的金属间化合物而结合的，并且由于焊料墨35具有很薄的厚度，等于或小于30μm，因此即使在熔化后也不会流走。
底部填充(S21)是使用绝缘树脂完全填充半导体芯片31或普通元件45的底部。底部填充可以抵抗物理冲击，例如掉落的冲击或者基板的位移冲击。还可以防止由于工作温度变化产生的热冲击、灰尘或水分产生的电迁移或者引线的α射线造成的故障。优选地，用于底部填充的树脂不但需要物理和化学性能稳定，而且还应该在高温下具有快速渗透性。另外，在注射器内不应形成气泡。对于底部填充装置来说，优选的是可以稳定涂覆并快速填充树脂的装置。在使用底部填充装置填充树脂之后，使用硬化装置将树脂硬化。
虽然参考特殊实施方式详细说明了本发明的精神，但这些实施方式仅是为了解释的目的，并不限制本发明。应该认识到，本领域的一般技术人员在不偏离本发明的范围和精神的情况下，可以改变或修改这些实施方式。
根据如上所述的本发明，本发明不但可以降低加工成本和缩短加工时间，而且可以将微小间距的半导体芯片安装到基板上。
另外，本发明通过去除对形成阻焊剂的需求，可以实现微小间距的基板焊盘。

Claims (5)

1.一种倒装芯片方法，包括：
在半导体芯片上形成金凸点；
利用喷墨打印技术将焊料墨印刷在基板的第一焊盘上；
将半导体芯片安装到基板上，以使金凸点和第一焊盘接触；以及
回流焊该基板。
2.如权利要求1所述的方法，还包括：
通过丝网印刷技术将焊膏印刷在基板的第二焊盘上；以及
将普通元件安装在上面印刷了焊膏的第二焊盘上。
3.如权利要求1或2所述的方法，还包括底部填充。
4.如权利要求1或2所述的方法，其中金凸点是通过镀形成的。
5.如权利要求2所述的方法，其中半导体芯片和普通元件是用芯片安装机安装的。
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