CN102256435A - 使用柔性互连结构的多层印制电路板及其制作方法 - Google Patents
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Abstract
本发明提供一种使用柔性互连结构的多层印制电路板及其制作方法。该多层印制电路板包括内部互连层以及半导体封装,该半导体封装包括末端是自由端的柔性互连结构,其中,所述柔性互连结构与所述内部互连层彼此电连接。
Description
技术领域
本文所公开的发明涉及多层印制电路板以及多层印制电路板的制作方法。
背景技术
已经存在使电子设备小型化的趋势。为了实现这样的小型化,已经要求电子设备的构成元件占用更小的空间。专利文献1公开了一种包括嵌入式半导体模块的结构。该结构直接通过引脚电极为半导体芯片提供电连接。专利文献2公开了一种通过半导体封装将上电路基板和下电路基板彼此连接的结构。
半导体芯片也需要具有以更短的间隔排列的更小的电极,以应对进一步的小型化以及输入信号和输出信号数目的增加。因为此,设置在安装板上的电极也需要更小,并以更短的间距进行排列。这导致安装板上的布线密度增加,这样增加了制造难度,由此降低了生产率。在上面所述的相关技术的情况下,由于结构原因,在安装板上可实现的布线密度存在限制。
由此,令人期望克服该问题。可能需要多层印制电路板,该多层印制电路板中,可以在对端子位置没有结构上施加的限制的情况下扩展用于半导体封装的互连区域。还可能需要这样的多层印制电路板的制作方法。
[专利文献1]日本特开专利公报No.2005-39227
[专利文献2]日本特开专利公报No.2004-363566
发明内容
根据本发明的一个方面,提供一种多层印制电路板,该多层印制电路板包括内部互连层以及半导体封装,该半导体封装包括末端是自由端的柔性互连结构,其中,所述柔性互连结构与所述内部互连层彼此电连接。
根据另一个方面,提供一种多层印制电路板的制作方法,该多层印制电路板包括内部互连层,所述方法包括以下步骤:将半导体封装置于形成有导电焊盘的基板上,使得所述半导体封装与所述导电焊盘对准,所述半导体封装包括末端是自由端的柔性互连结构;在所述半导体封装周围设置绝缘层;以及在所述柔性互连结构和形成在所述绝缘层上的所述内部互连层之间提供电连接。
附图说明
图1是根据第一实施方式的半导体封装的截面图;
图2是根据第二实施方式的半导体封装的截面图;
图3是根据第三实施方式的半导体封装的截面图;
图4是根据第四实施方式的半导体封装的截面图;
图5是示出了根据第五实施方式的印制电路板制作方法中工艺步骤的图;
图6是示出了根据第五实施方式的印制电路板制作方法中工艺步骤的图;
图7是示出了根据第五实施方式的印制电路板制作方法中工艺步骤的图;
图8是在根据第五实施方式的印制电路板制作方法中通过将柔性互连结构置于绝缘层上所获得的结构的顶视立体图;
图9是示出了根据第六实施方式的印制电路板制作方法中工艺步骤的图;
图10是示出了根据第六实施方式的印制电路板制作方法中工艺步骤的图;
图11是示出了根据第六实施方式的印制电路板制作方法中工艺步骤的图;以及
图12是示出了根据第六实施方式的印制电路板制作方法中工艺步骤的图。
具体实施方式
下面将参照附图描述实施方式。
图1是根据第一实施方式的半导体装置(即,半导体封装)1的截面图。如图1中所示,半导体封装1包括半导体芯片11、互连结构12、端子13以及柔性互连结构14。在本实施方式中,刚性互连结构12和柔性互连结构14一起构成如后面将要描述的刚性-柔性基板。在本实施方式中,半导体芯片11连接到刚性互连结构12的上表面。半导体芯片11可以是单独设置的半导体芯片,或者可以是用密封材料密封有一个或更多个半导体芯片的结构。封装结构可以是例如BGA(ball grid array,球栅阵列)结构或CSP(chip size package,芯片尺寸封装)结构。刚性互连结构12的绝缘层和导电层中的至少一个层与柔性互连结构14的绝缘层和导电层交替地排列,由此构成刚性-柔性基板。下面将描述各结构。
刚性互连结构12连接到半导体芯片11,并且充当用于与后面将描述的半导体嵌入式印制电路板连接的封装基板。如图1所示,半导体芯片11置于刚性互连结构12的、与该刚性互联结构的绝缘层平行的一面上。端子13设置在刚性互连结构12的另一面上。刚性互连结构12可以包括一个或更多个绝缘层以及一个或更多个导电层。这些层与柔性互连结构14的一个或更多个绝缘层以及一个或更多个导电层交替地设置,由此构成刚性-柔性基板。刚性互连结构12的一个或更多个绝缘层由树脂制成,该树脂可以是诸如玻璃纤维环氧树脂(glass epoxy)等的硬材料。当刚性互连结构12包括多个导电层时,在刚性互连结构12内部具有在这些导电层之间提供电连接的结构。刚性互连结构12可以具有由单个导电层构成的单层结构或者由多个导电层构成的多层结构。
端子13形成在刚性互连结构12的一面上,并且充当刚性-柔性基板的电极。端子13还充当用于与后面将描述的安装板连接的端子。端子13可以是附接在刚性互连结构12的电极焊盘上的导电结构,诸如焊球或金属突起(如金的突起)。
各个柔性互连结构14还可以包括一个或更多个导电层和一个或更多个绝缘层。形成在柔性互连结构14上的电极如同刚性互连结构12的端子13一样,充当刚性-柔性基板的电极。柔性互连结构14的部分结合到刚性互连结构12中,作为组合的多层结构的一部分,由此形成刚性-柔性基板的一部分。各柔性互连结构14从刚性互连结构12的侧面(即,侧端)向外延伸。柔性互连结构14的末端(distal)保持在开放状态,即,为自由端。刚性互连结构12可以仅包括绝缘层,并且柔性互连结构14可以是单导电层结构。在该情况下,柔性互连结构14置于刚性互连结构12的绝缘层之间,使得刚性-柔性基板作为整体是单层结构。刚性互连结构12的侧面是与安装有半导体芯片11的面相垂直的面。利用这种构造,柔性互连结构14从半导体芯片11向外延伸,如图1所示。
各柔性互连结构14可以包括仅一个导电层,或者可以包括多个导电层。当刚性互连结构12具有多层结构时,各柔性互连结构14置于刚性互连结构12的多个层之间,以形成多层结构的一部分。图1中所示的柔性互连结构14可以形成为整体的完整件。在该情况下,柔性互连结构14的中心部分可以置于刚性互连结构12的绝缘层之间,以形成多层结构的一部分。另选地,图1中所示的多个柔性互连结构14可以是分离件。在该情况下,柔性互连结构14可以在相同层结合到刚性互连结构12中或者分别在不同的层结合到刚性互连结构12中,以形成多层结构的一部分。即,这些柔性互连结构14可以处于一个在另一个上的状态,而彼此之间没有连接。在这些不同的构造中的任意一种构造中,柔性互连结构14的一部分露出并从刚性互连结构12的侧面延伸,使得柔性互连结构14的末端保持在开放状态。这里,末端保持在开放状态的事实意味着柔性互连结构14的末端是自由端,该自由端能够做自由移动,以不受限制的方式弯曲柔性互连结构14。可以存在上面安装有半导体芯片11的另一柔性互连结构14。进一步地,如同图1中所示的示例中,所有柔性互连结构14可以从刚性互连结构12延伸,这些柔性互连结构的末端保持在开放状态。包括柔性互连结构14和刚性互连结构12这两者的多层结构的一部分具有一个或更多个层间过孔,以在这些互连结构之间进行连接。
柔性互连结构14可以包括:12至50微米厚的一个或更多个绝缘膜,以及12至50微米厚的一个或更多个导电箔,它们被设置为一个在另一个上。绝缘膜可以是聚酰亚胺膜、聚乙烯膜等。由这些材料形成的柔性互连结构14可以重复弯曲。由此,对柔性互连结构14的放置可以根据需要进行多次尝试和改变。柔性互连结构14的面积尺寸越大,柔性互连结构14的放置宽容度越大。通过考虑半导体封装1的尺寸,可以确定该面积尺寸。
如上所述,刚性-柔性基板使柔性互连结构14的末端保持在开放状态。由此,半导体封装1的互连区域可以与柔性互连结构14可达到的区域一样宽。柔性互连结构14充当端子,以在半导体封装1和外部设备之间提供电连接。当需要增加半导体封装1的端子数目时,半导体封装1的端子数目可以在与安装和制造有关的条件所施加的限制内自由地进行选择。由于柔性互连结构14充当端子,以提供与外部设备的电连接,因此尽管半导体封装1端子数目增加,但是可以对刚性互连结构12的端子13的尺寸和节距设置足够的余裕。因此,对半导体封装1的使用使得可以避免制造的难度,如增加端子引脚数目、最小化互连线以及缩短它们的节距的难度。可以由此容易地制造包括嵌入式半导体设备的多层印制电路板。
下面,将通过参照图2至图4,来描述内部嵌入有半导体封装1的多层印制电路板(为了方便,下文简称为“印制电路板”)。图2是根据第二实施方式的印制电路板2的截面图。图3是根据第三实施方式的印制电路板的截面图。图4是根据第四实施方式的印制电路板的截面图。如图2所示,印制电路板2包括半导体封装1、端子焊盘21、密封构件22和过孔24a、24b、24c和24d。如图3所示,印制电路板3包括半导体封装1、端子焊盘31、密封构件32和过孔34c。如图4所示,印制电路板4包括半导体封装1、端子焊盘41a和41b、密封构件42和过孔44c。下面将描述各结构。
如图2和图3所示,端子焊盘21和31分别置于半导体封装1所处的收容区域29和30中。端子焊盘21和31通过例如焊料接合连接到刚性互连结构12的端子13。如图4所示,端子焊盘41b置于半导体封装1所处的收容区域52中。通过使用各向异性导电粘合剂,将端子焊盘41b连接到从刚性互连结构12延伸的柔性互连结构14b。如图4所示,端子焊盘41a置于收容区域52(半导体封装1位于该收容区域)外部的区域51中。通过使用各向异性粘合剂,将端子焊盘41a连接到半导体封装1的柔性互连结构14a。密封构件22、32和42密封半导体封装1,并且分别被绝缘层23、33和43围绕。密封构件22、32和42可以由环氧树脂材料、热固性树脂材料或热塑性树脂材料等制成。绝缘层23、33和43可以由树脂或预浸料(即,预浸渍材料)等制成。位于收容区域29、39和52上方的绝缘层28、38和48可以由树脂、预浸料或涂有树脂的铜箔等制成。用于形成绝缘层23、33、43、28、38和48的材料可以用作密封构件22、32和42。另选地,用于形成绝缘层23、33、43、28、38和48的树脂流或预灌封的(pre-embedded)树脂流可以用于形成密封构件22、32和42。过孔24a等将在后面进行描述。下面将描述印制电路板2至4的各电路板。
在第二实施方式的印制电路板2中,柔性互连结构14中的一个柔性互连结构(下文被称为“第一柔性互连结构14a”)置于绝缘层23上,并且柔性互连结构14中的另一个柔性互连结构(下文被称为“第二柔性互连结构14b”)置于半导体芯片11上。第一柔性互连结构14a通过过孔24a和24b连接到内部互连层25和表面互连层26。第二柔性互连结构14b置于半导体芯片11上并且用密封构件22进行密封。第二柔性互连结构14b通过穿过密封构件22的过孔24c连接到内部互连层25,并且第二柔性互连结构14b还通过过孔24d连接到表面互连层26。内部互连层25还连接到除了半导体封装1的其他设备等(未示出)。这些设备等可以位于绝缘层27上,该绝缘层27位于收容区域29的下方。印制电路板2由于其结构而具有优越的散热特性,在印制电路板2的结构中过孔24c位于靠近半导体芯片11的位置,使得热通过过孔24c和24d等从半导体芯片11向外部传送。
在第三实施方式的印制电路板3中,第一柔性互连结构14a置于绝缘层33上。接着,将半导体芯片11通过密封构件32来进行密封,第二柔性互连结构14b的一部分暴露在密封构件32外部。第二柔性互连结构14b置于密封构件32的顶部。在安置了绝缘层38之后,形成过孔34c和内部互连层35和36。内部互连层35和36连接到第一柔性互连结构14a和第二柔性互连结构14b。除了第二柔性互连结构14b的结构之外,印制电路板3的结构与第二实施方式的印制电路板2的结构相同或类似。印制电路板3由于其结构而具有优越的散热特性,在印制电路板3的结构中过孔34c位于靠近半导体芯片11的位置,使得热通过密封构件32和过孔34c从半导体芯片11向外部传送。可以根据第一柔性互连结构14a和第二柔性互连结构14b的设置来确定对过孔的设置。因此,可以容易实现半导体封装1,而没有由绝缘层37上互连线的细节所施加的限制。
在第四实施方式的印制电路板4中,半导体封装1的半导体芯片11被安置为面对位于收容区域52下面的绝缘层47。第二柔性互连结构14b通过导电构件49耦接至位于收容区域52中的端子41b。进一步地,第一柔性互连结构14a通过导电构件49耦接至位于绝缘层47的区域51中的端子41a。导电构件49可以通过各向异性导电膏、各向异性导电粘合剂、各向异性导电膜、金属突起或焊料等提供电连接。刚性互连结构12通过过孔44c连接到内部互连层45等。
如上所述,第二至第四实施方式的印制电路板2至4使用具有柔性互连结构14的半导体封装1。对印制电路板中互连图案的设计由此不受端子位置所限制。柔性互连结构14具有穿过绝缘层的开口,这些开口充当用于电连接的端子。柔性互连结构14由此可以充当端子,以代替端子13,由此帮助避免缩短端子13的节距。
下面,将描述根据第五实施方式的印制电路板制作方法。图5至图7是示出了根据本实施方式的印制电路板制造步骤的图。
如图5所示,在绝缘层27上形成包括要连接到半导体封装1的端子焊盘21的互连图案。端子焊盘21设置在半导体封装1的收容区域29内。尽管未示出,但是元件27可以是在通过过孔可电连接的前后表面上具有导电主体的单个绝缘层,或者可以是包括多个绝缘层和具有内部电连接的导电层的结构。
如图6所示,在将半导体封装1的端子13与端子焊盘21对准的同时,将半导体封装1置于绝缘层27上。接着,通过焊料接合等来固定安装半导体封装1。接着,将绝缘层23设置在半导体封装1周围。尽管未示出,但层23可以是单个绝缘层,或者可以是包括多个绝缘层和具有内部电连接的导电层的结构。第一柔性互连结构14a置于绝缘层23上。第二柔性互连结构14b置于半导体芯片11上。图8是通过将半导体封装1的第一柔性互连结构14a置于绝缘层23上所获得的结构的顶视立体图。图6是沿线A-A截取的截面图。如图6所示,第一柔性互连结构14a置于绝缘层23上,并且第二柔性互连结构14b置于半导体芯片11上。第一柔性互连结构14a可以置于该第一柔性互连结构14a的可移动范围内的任何位置,由此对收容区域29内的互连图案的设计不施加任何限制。
如图7所示,用密封构件22来密封收容区域29中的半导体封装1。如前所述,可以采用用于形成绝缘层28的树脂流或灌封的树脂流来形成密封构件22。绝缘层28置于密封构件22、绝缘层23和第一柔性互连结构14a上,随后在绝缘层28上形成铜膜。接着,在铜膜上形成掩模,以执行构图工艺,来形成内部互连层25。接着,激光束用于在第一柔性互连结构14a的端子位置制作穿过绝缘层28和内部互连层25的孔,随后执行镀铜工艺,例如,以形成过孔24a。同时地,激光束用于在第二柔性互连结构14b的端子位置制作穿过密封构件22、绝缘层28和内部互连层25的孔,随后执行镀铜工艺,以形成过孔24c。接着,通过执行与制作内部互连层25的制造步骤类似的制造步骤,来形成表面互连层26。代替通过对激光孔进行镀铜来提供电连接的方法,可以通过用导电膏填充激光孔提供电连接。另选地,可以通过在铜膜上形成金属突起,并接着使这些突起穿透绝缘层28,来提供内部互连层25和柔性互连结构14a和14b之间的电连接。根据制造条件,可以选择这些方法中的任意方法。
下面将描述根据第六实施方式的印制电路板制作方法。图9至图12是示出了根据本实施方式的印制电路板制造步骤的图。可以注意到,将省略对与第五实施方式的那些工艺步骤相同或类似的工艺步骤的描述。
如图9所示,在绝缘层47上形成互连图案。互连图案包括要连接到第一柔性互连结构14a的端子焊盘41a,并且还包括要连接到第二柔性互连结构14b的端子焊盘41b。尽管未示出,但是通过导电结构设置与焊盘41a和41b的电连接。这样的导电结构的示例包括:各向异性导电膏、各向异性导电粘合剂、各向异性导电膜、金属突起或焊膏等,根据选择的安装方法,将导电结构置于第一区域51和第二区域(即,收容区域)52中。尽管未示出,但是元件47可以是在通过过孔可电连接的前后表面上具有导电主体的单个绝缘层,或者可以是包括多个绝缘层和具有内部电连接的导电层的结构。
接着,如图10所示,安置半导体封装1,刚性互连结构12面朝上,即,刚性互连结构12的电极400面朝上。这样做时,半导体封装1的第二柔性互连结构14b卷绕在半导体芯片11周围。接着,将第二柔性互连结构14b的导电点电连接到端子焊盘41b。进一步地,将第一柔性互连结构14a置于第一区域41中。接着,将第一柔性互连结构14a的导电点电连接到端子焊盘41a。如上所述设置的半导体封装1具有面朝下、以与绝缘层47相对的半导体芯片11,如图10所示。并且,第一柔性互连结构14a和第二柔性互连结构14b通过各向异性导电粘合剂等分别连接到端子焊盘41a和端子焊盘41b。导电构件49的不必提供电连接的部分可以维持绝缘特性。
接着,如图11所示,将绝缘层43设置在半导体封装1周围,而保持露出半导体封装1。尽管未示出,但是层43可以是单个绝缘层,或者可以是包括多个绝缘层和具有内部电连接的导电层的结构。如图12所示,用密封构件42来密封半导体封装1,随后通过使用与第五实施方式中使用的那些工艺步骤类似的工艺步骤来形成绝缘层48、过孔、内部互连层45和46。
如上所述,根据本实施方式的印制电路板制作方法可以使半导体封装1容易安装,即使当端子焊盘41a位于第一区域51中时,只要这些焊盘位于第一柔性互连结构14a的可移动范围内。可以将第一柔性互连结构14a置于绝缘层43和绝缘层48之间,来代替将第一柔性互连结构14a置于第一区域51中。在该情况下,可以执行与第五实施方式中的那些工艺步骤类似的工艺步骤。利用这样的构造,可以根据需要将过孔形成在第一柔性互连结构14a和内部互连层45之间。
在本实施方式的半导体封装1中,第一柔性互连结构14a和第二柔性互连结构14b连接到刚性互连结构12的两个侧面。当需要提供大数量的电连接时,可以设置柔性互连结构14,以从刚性互连结构12的所有侧面延伸。利用这样的构造,即使当连接引脚的数目增加时,也可以抑制电极400的节距的缩短。进一步地,可以将多个柔性互连结构14设置到刚性互连结构12的一个侧面。以这种方式,通过考虑第一区域51中的互连图案可以适当地选择柔性互连结构14的位置和数目。
在此之前描述的印制电路板2至4(图2至图4)仅为示例。根据设计规范,可以适当地选择性地组合这些实施方式的结构。
所公开的实施方式的印制电路板2至4(图2至图4)可以与电子部件、连接器、插座或冷却结构等提供的期望功能一起实现,并且可以整体充当电气设备。
所公开的实施方式的印制电路板可以用于电子设备,如个人计算机、便携式电话、数字照相机等,其通过使用功能性安装基板单元来实现,该功能性安装基板单元通过在公开的多层印制电路板上安装无源部件和有源部件来形成。
根据至少一个实施方式,可以在不受刚性互连结构的面积尺寸所施加的限制的情况下来设计互连图案的细节,如线宽、线间隔、焊盘尺寸和焊盘间隔等。
本文中所用的所有示例和条件性语言都旨在处于教示的目的,以辅助读者理解由发明者为了推进现有技术而贡献的本发明和概念,并且本文中所用的所有示例和条件性语言应当被解释为不限于这种特定叙述的示例和条件,并且本说明书中对这样的示例的组织也不涉及显示本发明的优势和劣势。尽管已经详细描述了本发明的实施方式,但是应当理解,在不偏离本发明的精神和范围的情况下,可以对其作出多种改变、替换和变化。
Claims (10)
1.一种多层印制电路板,该多层印制电路板包括:
内部互连层;以及
半导体封装,该半导体封装包括末端是自由端的柔性互连结构,
其中,所述柔性互连结构与所述内部互连层彼此电连接。
2.根据权利要求1所述的印制电路板,其中,所述柔性互连结构从收容所述半导体封装的收容区域向外延伸,以电连接至所述内部互连层。
3.根据权利要求1所述的印制电路板,其中,所述半导体封装包括半导体芯片,并且其中,所述柔性互连结构被安置为与所述半导体芯片的表面直接接触,并通过过孔电连接至所述内部互连层。
4.根据权利要求1所述的印制电路板,其中,所述半导体封装包括半导体芯片,并且其中,所述柔性互连结构隔着密封构件位于所述半导体芯片上方,并电连接至所述内部互连层。
5.根据权利要求1所述的印制电路板,其中,所述柔性互连结构包括通过导电构件连接至端子焊盘的部分,所述端子焊盘位于收容所述半导体封装的收容区域的外部。
6.一种多层印制电路板的制作方法,该多层印制电路板包括内部互连层,该方法包括以下步骤:
将半导体封装置于形成有导电焊盘的基板上,使得所述半导体封装与所述导电焊盘对准,所述半导体封装包括末端是自由端的柔性互连结构;
在所述半导体封装周围设置绝缘层;以及
在所述柔性互连结构和形成在所述绝缘层上的所述内部互连层之间提供电连接。
7.根据权利要求6所述的方法,该方法包括以下步骤:
将所述柔性互连结构的一部分安置为与所述半导体封装的半导体芯片的表面直接接触;以及
通过所述柔性互连结构的所述一部分和所述内部互连层之间的过孔提供电连接。
8.根据权利要求6所述的方法,包括:
隔着密封构件将所述柔性互连结构的一部分置于所述半导体封装的半导体芯片的表面上方;以及
在所述柔性互连结构的所述一部分和所述内部互连层之间提供电连接。
9.根据权利要求6所述的方法,包括通过导电构件将所述柔性互连结构的一部分连接至位于收容所述半导体封装的收容区域的外部的端子焊盘。
10.一种电子设备,该电子设备包括:
外壳;
安装在所述外壳中的多层印制电路板,所述多层印制电路板包括内部互连层以及半导体封装,该半导体封装具有末端是自由端的柔性互连结构,其中,所述柔性互连结构和所述内部互连层彼此电连接。
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CN104051405A (zh) * | 2013-03-11 | 2014-09-17 | 欣兴电子股份有限公司 | 嵌埋有电子组件的线路板结构及其制法 |
CN104640350A (zh) * | 2013-11-11 | 2015-05-20 | 日月光半导体制造股份有限公司 | 电路板模块 |
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KR20170026676A (ko) | 2015-08-26 | 2017-03-09 | 에스케이하이닉스 주식회사 | 슬라이딩 상호 연결 배선 구조를 포함하는 플렉서블 소자 |
JP2018098487A (ja) | 2016-12-14 | 2018-06-21 | 株式会社村田製作所 | 半導体モジュール |
US10410963B1 (en) | 2018-06-07 | 2019-09-10 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Deformed layer for short electric connection between structures of electric device |
JP7211267B2 (ja) | 2019-05-29 | 2023-01-24 | 株式会社デンソー | 半導体パッケージの製造方法 |
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JP2011243897A (ja) | 2011-12-01 |
KR101139084B1 (ko) | 2012-06-01 |
TW201206267A (en) | 2012-02-01 |
US20110286188A1 (en) | 2011-11-24 |
EP2389049A1 (en) | 2011-11-23 |
KR20110128227A (ko) | 2011-11-29 |
EP2389049B1 (en) | 2013-03-06 |
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