CN102169827A - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

Info

Publication number
CN102169827A
CN102169827A CN2010105058797A CN201010505879A CN102169827A CN 102169827 A CN102169827 A CN 102169827A CN 2010105058797 A CN2010105058797 A CN 2010105058797A CN 201010505879 A CN201010505879 A CN 201010505879A CN 102169827 A CN102169827 A CN 102169827A
Authority
CN
China
Prior art keywords
sic substrate
oxidation
semiconductor device
manufacture method
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2010105058797A
Other languages
English (en)
Inventor
小林和雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN102169827A publication Critical patent/CN102169827A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048Making electrodes
    • H01L21/049Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8213Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using SiC technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

本发明提供一种半导体装置的制造方法。需要一种进行湿氧化引起的栅极氧化膜中含有羟基不避免就能实现更高可靠性的栅极氧化膜的形成方法。本发明的半导体装置的制造方法具有如下工序:(a)在SiC衬底上导入氢以及氧;(b)在SiC衬底上使氢以及氧发生燃烧反应,利用燃烧反应在SiC衬底(1)表面形成作为硅氧化膜的栅极氧化膜(4)。

Description

半导体装置的制造方法
技术领域
本发明涉及半导体装置的制造方法,特别涉及在碳化硅(SiC)衬底上的氧化工序中提供降低SiC衬底和氧化膜界面的界面能级并且可靠性较高的氧化膜的方法。
背景技术
对于碳化硅(SiC)来说,绝缘击穿电场强度(dielectric breakdownfield strength)比硅(Si)大1个数量级左右,因此,用于保持耐压的漂移层与Si的情况相比,能够薄到1/10,能够降低功率器件的损失。
但是,在SiC的硅面与碳面,表现由于结晶的离子性或键合顺序(bond sequence)的不同等的影响而不同的表面或界面的物理性质,在将SiC衬底上氧化了的情况下,在热氧化速度等方面产生差异。因此,在SiC-MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)的栅极氧化膜形成中,需要根据结晶面进行氧化条件的最优化。这是因为,氧化条件对反转沟道迁移率或氧化膜可靠性产生很大的影响。
作为以往的氧化方法,有如下两种方法:仅供给氧并形成氧化膜的干氧化法;在反应炉跟前使氧以及氢燃烧,在反应炉中提供其水蒸汽环境,形成氧化膜的湿氧化法。
对于在SiC衬底上以湿氧化法所形成的栅极氧化膜来说,水蒸汽环境中的氢原子有效地对界面的不饱和键进行氢封端,所以,具有使界面能级降低的效果,MOSFET的反转沟道迁移率提高。此外,在湿氧化法中,氧化力较强,存在促进界面的残留碳的脱离而减少界面能级的倾向。因此,优选采用湿氧化。
但是,当确认利用该湿氧化法得到的氧化膜的可靠性时,由于在栅极氧化膜中含有大量羟基(OH基)的影响,与利用干氧化法所形成的栅极氧化膜相比,绝缘击穿电场强度变差。
由于这些原因,在非专利文献1中进行了如下研究:在SiC-MOSFET的栅极氧化膜形成中,在利用干氧化法进行氧化之后,利用湿氧化法进行再氧化,由此,兼顾高迁移率和高可靠性。
【非专利文献1】東芝レビユ一Vol.63(No.10),《高チヤネル移動度と高信頼性を両立したSiC-MOSFET》2008
在非专利文献1所记载的方法中,需要如下的栅极氧化膜的形成方法:进行湿氧化所引起的羟基的含有没有被避免而能进一步实现高可靠性。
发明内容
本发明是为了解决上述课题而提出的,其目的在于提供一种具有可靠性较高的栅极氧化膜的半导体装置的制造方法。
本发明的半导体装置的制造方法具有如下工序:(a)在SiC衬底上导入氢以及氧;(b)在所述SiC衬底上使所述氢以及氧发生燃烧反应,利用所述燃烧反应,在所述SiC衬底表面形成硅氧化膜。
根据本发明的半导体装置的制造方法,具有(a)在SiC衬底上导入氢以及氧的工序和(b)在所述SiC衬底上使所述氢以及氧发生燃烧反应并利用所述燃烧反应在所述SiC衬底表面形成硅氧化膜的工序,由此,能够制造具有可靠性较高的栅极氧化膜的半导体装置。
附图说明
图1是实施方式1的半导体装置的剖面图。
图2是实施方式1的半导体装置的制造方法中所使用的半导体制造装置的概要图。
图3是示出正上方燃烧氧化和湿氧化的半导体装置的可靠性比较的图。
图4是实施方式1的半导体装置的剖面图。
图5是实施方式1的半导体装置的制造方法中所使用的半导体制造装置的概要图。
附图标记说明:
1、8、10SiC衬底
2P型SiC扩散层
3N型SiC扩散层
4、11、12栅极氧化膜
5多晶Si电极
6卤素灯
7辐射温度计
9气体导入口
13正上方燃烧氧化处理室
14干氧化处理室
15HTO炉
16、17预抽室
18搬送室
具体实施方式
<A.实施方式1>
<A-1.制造方法>
在图1中示出作为实施方式1的半导体装置的SiC-MOSFET的剖面结构。图1所示的SiC-MOSFET形成于在SiC衬底上1a上形成有SiC外延层(漂移层)1b的衬底上。以下,包括SiC衬底1a和SiC外延层1b,称作SiC衬底1。在SiC衬底1表面的构图之后,注入Al,由此,分别分离地扩散P型SiC扩散层2,进而,在构图之后,在P型SiC扩散层2上,扩散N型SiC扩散层3。
然后,经由利用热处理进行的扩散层的活性化工序,在SiC衬底1上成膜栅极氧化膜4(硅氧化膜),在扩散了P型SiC扩散层2、N型SiC扩散层3的区域所夹持的位置,形成有作为栅电极的多晶Si电极5。
对于图1所示的栅极氧化膜4来说,当在与SiC衬底1的界面形成了很多缺陷能级时,在迁移率、可靠性方面产生恶化。
以往,采用预先使氢、氧燃烧并且将利用该燃烧所产生的水蒸汽环境送入反应炉内进行氧化的湿氧化,但是,在利用湿氧化所成膜的栅极氧化膜4中含有很多羟基,由此,使迁移率、可靠性恶化。因此,在本发明中,作为其他氧化法,利用正上方燃烧氧化进行栅极氧化膜4的成膜。此处,正上方燃烧氧化是指如下的氧化法:将氢、氧原封不动地导入到衬底上,在衬底上引起燃烧反应,使用与此相伴的氧化反应。
为了进行正上方燃烧氧化,使用图2所示的灯照射型单晶片氧化装置(左图)。图2所示的灯照射型单晶片氧化装置是如下装置:在反应室上部设置卤素灯6,利用反应室下部的辐射温度计7确认SiC衬底8的背面温度,将该温度反馈给灯功率(未图示),进行加热控制。
在减压下(133Pa左右)从气体导入口9将氢气、氧气导入到1000℃以上的热环境中。然后,在导入了氢气、氧气的状态下(右图),在利用卤素灯6选择性地加热后的SiC衬底8正上方产生燃烧反应(2H2+O2→2H2O),进行SiC的热氧化。
在以往的湿氧化中,在大气压的处理室内使氢、氧燃烧时,燃烧引起的石英屑成为垃圾尘埃的问题,所以,通常在处理室前设置燃烧室,此处,预先使氢、氧燃烧,将通过燃烧而产生的水蒸汽环境送入到处理室内。
相对于此,在正上方燃烧氧化中,在SiC衬底8正上方产生上述的燃烧反应。由于燃烧反应在正上方产生,所以,作为燃烧反应的中间生成体的游离基(radical)(O游离基等)支配性地有助于氧化。因此,发明人发现,能够降低在栅极氧化膜中所含的羟基,此外,与H2O相比,游离基(例如,O游离基)的氧化力强,所以,进行SiC中的碳的脱离,能够成膜可靠性更高的栅极氧化膜。
此外,如图2(左图)所示,在SiC衬底8的背面侧,在SiC衬底8的半径方向在6处配置有辐射温度计7,通过使SiC衬底8旋转,从能够进行该6个区域间的温度控制,所以,湿氧化(成批处理方式(batchmode))的膜厚的面内均一性为3%左右,相对于此,正上方燃烧氧化(单晶片式)的膜厚的面内均一性为1%以内。
并且,在正上方燃烧氧化中,H2O的分压低。此外,被认为有助于氧化的O游离基随着栅极氧化膜的生长而失活,难以扩散。即,栅极氧化膜中的氧化速度变慢。因此,能够抑制氧化引起的热应力。
如上所述,利用使用了该灯照射型单晶片氧化装置的正上方燃烧氧化,使栅极氧化膜成膜,由此,能够制造迁移率、可靠性较高的SiC-MOSFET。
此外,导入到灯照射型单晶片氧化装置中的NO、N2O气体是用于将SiC衬底8界面氮化以降低界面缺陷的气体。
<A-2.动作>
在图3中示出使用了Si衬底的情况下的CVS-TDDB(ConstantVoltage Stress-Time Dependent Dielectric Breakdown)评价的结果。CVS-TDDB是指,在恒定电压下,评价绝缘击穿了的半导体装置数目随着时间的变化。在图中,纵轴表示故障率,横轴表示时间的经过。
图3所示的评价结果是使用如下制成的TEG(Test Element Group)进行的:在STI(Shallow Trench Isolation)的分离基底形成利用正上方燃烧氧化(单晶片式)所形成的氧化膜(膜厚为7.2nm)和利用湿氧化(成批处理方式)所形成的氧化膜(膜厚为7.2nm)这两种氧化膜,并且,形成多晶Si电极,并且经过构图、背面研磨。具体地说,评价在温度125℃下使11MV/cm的应力施加(10mA判定)持续10秒的时刻的故障率(10sec故障率)。
如图3所示,以往的方法即湿氧化(在图3中以三角形表示)为19.8%的10sec故障率,相对于此,正上方燃烧氧化(在图3中以圆形表示)为5.2%的10sec故障率,比湿氧化的情况下的10sec故障率低,此外,到达绝缘击穿之前的经过时间也是正上方燃烧氧化优良。因此,能够确认,与湿氧化相比,正上方燃烧氧化形成可靠性较高的氧化膜。
此处,在正上方燃烧氧化中,被认为支配性地有助于氧化的O游离基随着氧化膜的生长而在氧化膜中失活,难以在氧化膜中扩散,由此,氧化率变低。特别是,对于SiC来说,与Si相比,氧化速度较慢,所以,特别是,形成面向功率器件的栅极氧化膜这样的较厚的栅极氧化膜(100nm左右)是困难的。此外,在单晶片型的氧化装置中进行本实施方式中的正上方燃烧氧化,所以,热集中在SiC衬底上,长时间的处理成为损伤SiC衬底的原因。因此,对于利用正上方燃烧氧化在SiC衬底上形成栅极氧化膜来说,优选抑制为20nm以下。
作为其对策方法,在利用正上方燃烧氧化形成20nm以下的栅极氧化膜11之后,进行仅在氧的环境中的干氧化,进而,形成栅极氧化膜12,由此,能够将总的栅极绝缘膜形成为较厚的100nm以上(参照图4)。在该情况下,在进行干氧化时,在SiC衬底10上已经利用正上方燃烧氧化形成大约20nm以下的栅极氧化膜11,所以,在利用干氧化成膜剩余的厚度的情况下,也不会引起干氧化的缺点即界面能级密度的增加。但是,使上述的顺序相反,在利用干氧化形成栅极氧化膜之后,利用正上方燃烧氧化追加形成栅极氧化膜的情况下,也具有提高栅极氧化膜的可靠性的效果。
此外,在利用上述的方法追加形成栅极氧化膜的情况下,能够使用图5所示的装置。对于该装置来说,经由搬送室18,连接有正上方燃烧氧化处理室13、干氧化处理室14、HTO炉15、预抽室(loadlock chamber)16、17,能够使处理室内保持真空并且不向大气开放地进行正上方燃烧氧化和干氧化。即,使用具有不使SiC衬底暴露在大气中而进行工序转移的机构的装置,由此,能够保持清洁度,能够形成将异物混入到栅极氧化膜中以及有机氧化膜的介入排除了的可靠性较高的栅极氧化膜,能够制造迁移率、可靠性较高的半导体装置。
此外,虽未图示,但是,在利用正上方燃烧氧化形成栅极氧化膜之后,利用CVD进行氧化膜形成,追加形成栅极氧化膜,由此,能够将总的栅极氧化膜形成得较厚。
<A-3.效果>
根据本发明的实施方式1,在半导体装置的制造方法中,具有(a)在SiC衬底1上导入氢以及氧的工序和(b)在SiC衬底1上使氢和氧发生燃烧反应并利用燃烧反应在SiC衬底1表面形成作为硅氧化膜的栅极氧化膜4的工序,由此,能够制造具有可靠性较高的栅极氧化膜的半导体装置。
根据本发明的实施方式1,在半导体装置的制造方法中,工序(a)、(b)使用灯照射型单晶片氧化装置进行,该灯照射型单晶片氧化装置在SiC衬底1上照射光,从而在SiC衬底1上形成温度比周围高的高温环境,由此,能够缩短处理时间,制造具有可靠性较高的栅极氧化膜的半导体装置。
此外,根据本发明的实施方式1,在半导体装置的制造方法中,具有(c)将SiC衬底1表面干氧化,另外形成作为硅氧化膜的栅极氧化膜12的工序,由此,能够形成100nm左右的较厚的栅极氧化膜,能够制造面向需要这样的厚度的栅极氧化膜的功率器件的半导体装置。特别是,对于SiC来说,与Si的情况相比,氧化速度较慢,在形成面向功率器件的栅极氧化膜的情况下是有效的。
此外,根据本发明的实施方式1,在半导体装置的制造方法中,工序(c)在工序(b)之后进行,由此,由于已经利用正上方燃烧氧化形成了栅极氧化膜11,所以,能够抑制干氧化引起的界面能级密度的增加。
此外,根据本发明的实施方式1,在半导体装置的制造方法中,在在工序(b)之后,还具有(c)利用CVD对SiC衬底1表面进行氧化膜形成,另外形成硅氧化膜的工序,由此,能够形成100nm左右的较厚的栅极氧化膜,能够制造面向需要这样的厚度的栅极氧化膜的功率器件的半导体装置。
此外,根据本发明的实施方式1,在半导体装置的制造方法中,工序(a)、(b)、(c)使用不使SiC衬底暴露在大气环境中就能够进行工序转移的结构的装置进行,由此,能够形成将异物混入到栅极氧化膜中以及有机氧化膜的介入排除了的可靠性较高的栅极绝缘膜,能够制造迁移率、可靠性较高的半导体装置。
此外,根据本发明的实施方式1,在半导体装置的制造方法中,使用方案2~5中的任意一项所述的半导体装置的制造方法,在SiC衬底1上形成100nm以上的栅极氧化膜时,利用工序(b)形成20nm以下的硅氧化膜作为栅极氧化膜,利用工序(c)形成剩余的厚度部分的硅氧化膜作为栅极氧化膜,由此,能够使用如下方法,即,作为能够利用氧化速度较慢的正上方燃烧氧化所形成的厚度,形成20nm以下的栅极氧化膜,并且以利用干氧化或者CVD进行的氧化膜形成补充相对于100nm的剩余的厚度,能够制造面向需要这样的厚度的栅极氧化膜的功率器件的半导体装置。

Claims (7)

1.一种半导体装置的制造方法,具有如下工序:
(a)在SiC衬底上导入氢以及氧;
(b)在所述SiC衬底上使所述氢以及氧发生燃烧反应,利用所述燃烧反应在所述SiC衬底表面形成硅氧化膜。
2.如权利要求1所述的半导体装置的制造方法,其特征在于,
所述工序(a)、(b)是使用灯照射型单晶片氧化装置进行的,该灯照射型单晶片氧化装置在所述SiC衬底上照射光,从而在所述SiC衬底上形成温度比周围高的高温环境。
3.如权利要求1或者2所述的半导体装置的制造方法,其特征在于,还具有如下工序:
(c)对所述SiC衬底表面进行干氧化,另外形成硅氧化膜。
4.如权利要求3所述的半导体装置的制造方法,其特征在于,
所述工序(c)在所述工序(b)之后进行。
5.如权利要求1或者2所述的半导体装置的制造方法,其特征在于,
在所述工序(b)之后还具有:利用CVD对SiC衬底表面进行氧化膜形成,另外形成硅氧化膜的工序(c)。
6.如权利要求3所述的半导体装置的制造方法,其特征在于,
所述工序(a)、(b)、(c)使用不使所述SiC衬底暴露在大气环境中就能进行工序转移的结构的装置进行。
7.一种半导体装置的制造方法,其特征在于,
使用权利要求3所述的半导体装置的制造方法在所述SiC衬底上形成100nm以上的栅极氧化膜时,
利用所述工序(b),形成20nm以下的所述硅氧化膜作为所述栅极绝缘膜,
利用所述工序(c),形成剩余的膜厚部分的所述硅氧化膜作为所述栅极氧化膜。
CN2010105058797A 2010-02-25 2010-10-11 半导体装置的制造方法 Pending CN102169827A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010039627A JP5371831B2 (ja) 2010-02-25 2010-02-25 半導体装置の製造方法
JP2010-039627 2010-02-25

Publications (1)

Publication Number Publication Date
CN102169827A true CN102169827A (zh) 2011-08-31

Family

ID=44356941

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010105058797A Pending CN102169827A (zh) 2010-02-25 2010-10-11 半导体装置的制造方法

Country Status (5)

Country Link
US (2) US8236707B2 (zh)
JP (1) JP5371831B2 (zh)
KR (1) KR101236497B1 (zh)
CN (1) CN102169827A (zh)
DE (1) DE102010064214A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105206513A (zh) * 2015-09-28 2015-12-30 安徽工业大学 用氮和硼改善4H-SiC MOSFET反型层迁移率的方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9518734B2 (en) 2013-01-28 2016-12-13 General Electric Technology Gmbh Fluid distribution and mixing grid for mixing gases
US10002931B2 (en) 2013-07-31 2018-06-19 Mitsubishi Electric Corporation Silicon carbide semiconductor device
JP6890271B2 (ja) * 2017-03-21 2021-06-18 パナソニックIpマネジメント株式会社 半導体装置およびその製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414244A (en) * 1993-04-21 1995-05-09 Tokyo Electron Limited Semiconductor wafer heat treatment apparatus
US6037273A (en) * 1997-07-11 2000-03-14 Applied Materials, Inc. Method and apparatus for insitu vapor generation
CN1975992A (zh) * 2005-11-14 2007-06-06 精工爱普生株式会社 半导体装置的制造方法及电子设备的制造方法
CN101438398A (zh) * 2006-05-05 2009-05-20 应用材料股份有限公司 用于制作场效应晶体管的栅极介电的方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6706572B1 (en) * 1994-08-31 2004-03-16 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a thin film transistor using a high pressure oxidation step
JPH10284488A (ja) 1997-04-03 1998-10-23 Hitachi Ltd 半導体集積回路装置の製造方法および製造装置
JP3491050B2 (ja) * 1997-05-14 2004-01-26 富士電機ホールディングス株式会社 炭化けい素半導体装置の熱酸化膜形成方法
JP3413174B2 (ja) * 1997-07-11 2003-06-03 アプライド マテリアルズ インコーポレイテッド In−situ蒸気生成方法及び装置
US6221789B1 (en) * 1998-07-29 2001-04-24 Intel Corporation Thin oxides of silicon
JP3372030B2 (ja) 1999-10-04 2003-01-27 日本電気株式会社 薄膜絶縁膜の形成方法
JP2001274154A (ja) * 2000-01-18 2001-10-05 Applied Materials Inc 成膜方法、成膜装置、半導体装置及びその製造方法
JP2001230442A (ja) 2000-02-15 2001-08-24 Matsushita Electric Ind Co Ltd 光検出素子
JP2005079430A (ja) 2003-09-02 2005-03-24 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2006269641A (ja) * 2005-03-23 2006-10-05 National Institute Of Advanced Industrial & Technology 半導体装置及びその製造方法
JP2006294928A (ja) 2005-04-12 2006-10-26 Renesas Technology Corp 半導体記憶装置およびその製造方法
JP4453693B2 (ja) 2005-11-14 2010-04-21 セイコーエプソン株式会社 半導体装置の製造方法及び電子機器の製造方法
JP5057903B2 (ja) * 2007-09-06 2012-10-24 三菱電機株式会社 炭化珪素半導体装置の製造方法
JP2009283693A (ja) * 2008-05-22 2009-12-03 Oki Semiconductor Co Ltd 半導体装置の製造方法
US8217398B2 (en) * 2008-10-15 2012-07-10 General Electric Company Method for the formation of a gate oxide on a SiC substrate and SiC substrates and devices prepared thereby

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414244A (en) * 1993-04-21 1995-05-09 Tokyo Electron Limited Semiconductor wafer heat treatment apparatus
US6037273A (en) * 1997-07-11 2000-03-14 Applied Materials, Inc. Method and apparatus for insitu vapor generation
CN1975992A (zh) * 2005-11-14 2007-06-06 精工爱普生株式会社 半导体装置的制造方法及电子设备的制造方法
CN101438398A (zh) * 2006-05-05 2009-05-20 应用材料股份有限公司 用于制作场效应晶体管的栅极介电的方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105206513A (zh) * 2015-09-28 2015-12-30 安徽工业大学 用氮和硼改善4H-SiC MOSFET反型层迁移率的方法
CN105206513B (zh) * 2015-09-28 2018-01-09 安徽工业大学 用氮和硼改善4H‑SiC MOSFET反型层迁移率的方法

Also Published As

Publication number Publication date
US8236707B2 (en) 2012-08-07
KR101236497B1 (ko) 2013-02-21
KR20110097643A (ko) 2011-08-31
JP2011176158A (ja) 2011-09-08
JP5371831B2 (ja) 2013-12-18
US20120252223A1 (en) 2012-10-04
US20110207336A1 (en) 2011-08-25
DE102010064214A1 (de) 2011-08-25

Similar Documents

Publication Publication Date Title
CN102194885B (zh) N型隐埋沟道的碳化硅demosfet器件及制备方法
CN101859706B (zh) 碳化硅半导体装置的制造方法及碳化硅半导体装置
CN101283439B (zh) 形成具有高反型层迁移性的碳化硅mosfets的方法
CN102244099B (zh) 外延沟道的SiCIEMOSFET器件及制备方法
CN106711207B (zh) 一种纵向沟道的SiC结型栅双极型晶体管及其制备方法
CN103928344A (zh) 一种基于N型纳米薄层来提高N型DiMOSFET沟道迁移率方法
WO2015014263A1 (zh) 绝缘栅双极性晶体管的制造方法
CN102169827A (zh) 半导体装置的制造方法
CN106340448B (zh) SiC功率MOSFET器件栅氧化层的制备方法及SiC功率MOSFET器件
CN103928309B (zh) N沟道碳化硅绝缘栅双极型晶体管的制备方法
US8217398B2 (en) Method for the formation of a gate oxide on a SiC substrate and SiC substrates and devices prepared thereby
CN103928321B (zh) 碳化硅绝缘栅双极型晶体管的制备方法
JP2010080787A (ja) 半導体装置の製造方法
CN105826195B (zh) 一种超结功率器件及其制作方法
CN103811353A (zh) 一种结型场效应晶体管及其制备方法
WO2023015611A1 (zh) 半导体晶圆的复合结构、半导体晶圆及其制法和应用
CN102237396A (zh) 半导体器件及其制造方法
CN109585564A (zh) 一种碳化硅mosfet器件及其制备方法
CN105551944B (zh) 功率晶体管的制造方法
CN105161526B (zh) 提高垂直导电结构SiC MOSFET沟道迁移率的方法
CN103928322B (zh) 穿通型碳化硅绝缘栅双极型晶体管的制备方法
CN113871468A (zh) 一种具有叠栅结构的碳化硅mis器件及其制备方法
CN105810731A (zh) 碳化硅半导体元件以及其制造方法
CN109524304A (zh) 碳化硅栅介质氟等离子体的处理方法及碳化硅功率器件
CN103839812A (zh) 一种半导体器件及其制备方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20110831