WO2015014263A1 - 绝缘栅双极性晶体管的制造方法 - Google Patents
绝缘栅双极性晶体管的制造方法 Download PDFInfo
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- WO2015014263A1 WO2015014263A1 PCT/CN2014/083186 CN2014083186W WO2015014263A1 WO 2015014263 A1 WO2015014263 A1 WO 2015014263A1 CN 2014083186 W CN2014083186 W CN 2014083186W WO 2015014263 A1 WO2015014263 A1 WO 2015014263A1
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- insulated gate
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 11
- 238000002513 implantation Methods 0.000 claims description 5
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
Abstract
Description
Claims (8)
- 一种绝缘栅双极性晶体管的制造方法,其特征在于,包括以下步骤:提供第一导电类型的半导体衬底,该半导体衬底具有第一主面和第二主面;在所述半导体衬底的第一主面形成第二导电类型的场终止层;在所述场终止层上生长氧化层;去除所述场终止层上的氧化层;在去除所述氧化层后的所述场终止层上形成外延层;及在所述外延层上继续制造所述绝缘栅双极性晶体管。
- 如权利要求1所述的绝缘栅双极性晶体管的制造方法,其特征在于:所述第一导电类型的半导体衬底为P型衬底材料。
- 如权利要求1所述的绝缘栅双极性晶体管的制造方法,其特征在于:所述氧化层的厚度为100Å~25000Å。
- 如权利要求1所述的绝缘栅双极性晶体管的制造方法,其特征在于:在800℃~1100℃的干氧或氢氧氧化或水汽氧化环境中对形成有所述场终止层上的半导体衬底进行氧化以得到所述氧化层。
- 如权利要求1所述的绝缘栅双极性晶体管的制造方法,其特征在于:在所述场终止层上生长所述氧化层时,同时也在所述半导体衬底的第二主面上形成有氧化层,所述制造方法还包括:去除所述半导体衬底的第二主面上形成的氧化层。
- 如权利要求1所述的绝缘栅双极性晶体管的制造方法,其特征在于:采用湿法腐蚀工艺或者湿法腐蚀与干法腐蚀相结合的工艺去除所述场终止层上的氧化层。
- 如权利要求1所述的绝缘栅双极性晶体管的制造方法,其特征在于:通过N型杂质表面注入和高温推阱的工艺在所述半导体衬底的第一主面形成场终止层。
- 如权利要求7所述的绝缘栅双极性晶体管的制造方法,其特征在于:N型杂质的注入剂量为5E11/cm2~1E15/cm2,能量为30KeV~200KeV。
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US14/902,516 US9620615B2 (en) | 2013-07-29 | 2014-07-29 | IGBT manufacturing method |
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CN201310323481.5 | 2013-07-29 | ||
CN201310323481.5A CN104347401B (zh) | 2013-07-29 | 2013-07-29 | 一种绝缘栅双极性晶体管的制造方法 |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US9666682B2 (en) | 2013-09-02 | 2017-05-30 | Csmc Technologies Fab1 Co., Ltd. | Reverse conduction insulated gate bipolar transistor (IGBT) manufacturing method |
US9673193B2 (en) | 2013-08-23 | 2017-06-06 | Csmc Technologies Fab1 Co., Ltd. | Manufacturing method for reverse conducting insulated gate bipolar transistor |
US9862595B2 (en) | 2014-01-07 | 2018-01-09 | Csmc Technologies Fab1 Co., Ltd. | Method for manufacturing thin-film support beam |
US9954074B2 (en) | 2013-07-22 | 2018-04-24 | Csmc Technologies Fab1 Co., Ltd. | Insulated gate bipolar transistor and manufacturing method therefor |
US10818655B2 (en) | 2013-12-06 | 2020-10-27 | Csmc Technologies Fab2 Co., Ltd. | Semiconductor device and related method of adjusting threshold voltage in semiconductor device during manufacture via counter doping in diffusion region |
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CN106483758B (zh) | 2015-09-02 | 2019-08-20 | 无锡华润上华科技有限公司 | 光学邻近效应修正方法和系统 |
CN106653842B (zh) | 2015-10-28 | 2019-05-17 | 无锡华润上华科技有限公司 | 一种具有静电释放保护结构的半导体器件 |
CN106816468B (zh) | 2015-11-30 | 2020-07-10 | 无锡华润上华科技有限公司 | 具有resurf结构的横向扩散金属氧化物半导体场效应管 |
CN107465983B (zh) | 2016-06-03 | 2021-06-04 | 无锡华润上华科技有限公司 | Mems麦克风及其制备方法 |
CN113838747A (zh) * | 2020-06-23 | 2021-12-24 | 上海先进半导体制造有限公司 | 带外延层的半导体器件及其制作方法 |
CN114005753B (zh) * | 2021-10-29 | 2023-07-11 | 西安微电子技术研究所 | 一种igbt产品的氧化工艺方法及氧化后igbt产品 |
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US9954074B2 (en) | 2013-07-22 | 2018-04-24 | Csmc Technologies Fab1 Co., Ltd. | Insulated gate bipolar transistor and manufacturing method therefor |
US9673193B2 (en) | 2013-08-23 | 2017-06-06 | Csmc Technologies Fab1 Co., Ltd. | Manufacturing method for reverse conducting insulated gate bipolar transistor |
US9666682B2 (en) | 2013-09-02 | 2017-05-30 | Csmc Technologies Fab1 Co., Ltd. | Reverse conduction insulated gate bipolar transistor (IGBT) manufacturing method |
US10818655B2 (en) | 2013-12-06 | 2020-10-27 | Csmc Technologies Fab2 Co., Ltd. | Semiconductor device and related method of adjusting threshold voltage in semiconductor device during manufacture via counter doping in diffusion region |
US9862595B2 (en) | 2014-01-07 | 2018-01-09 | Csmc Technologies Fab1 Co., Ltd. | Method for manufacturing thin-film support beam |
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CN104347401B (zh) | 2017-05-10 |
US20160380071A1 (en) | 2016-12-29 |
US9620615B2 (en) | 2017-04-11 |
CN104347401A (zh) | 2015-02-11 |
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