CN104701356B - 半导体器件及其制备方法 - Google Patents

半导体器件及其制备方法 Download PDF

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CN104701356B
CN104701356B CN201310661381.3A CN201310661381A CN104701356B CN 104701356 B CN104701356 B CN 104701356B CN 201310661381 A CN201310661381 A CN 201310661381A CN 104701356 B CN104701356 B CN 104701356B
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CN104701356A (zh
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张广胜
张森
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CSMC Technologies Corp
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Abstract

本发明提供一种半导体器件，包括衬底，衬底上的埋层，埋层上的扩散层及扩散层上的栅极；所述扩散层包括第一扩散区和第二扩散区，所述第二扩散区的杂质类型与所述第一扩散区的杂质类型相反；在所述第二扩散区内还形成有多个第三扩散区，所述第三扩散区的杂质类型与所述第二扩散区的杂质类型相反。上述半导体器件，通过在第二扩散区内形成杂质类型相反的多个第三扩散区，可以通过调整第三扩散区的大小从而实现对第二扩散区浓度的调节及控制，实现对半导体器件的阈值电压的控制，获得可变阈值的半导体器件。

Description

半导体器件及其制备方法
技术领域
本发明涉及半导体制备技术领域，特别是涉及一种半导体器件及其制备方法。
背景技术
在常规的用于启动电路的半导体器件中，工艺生产过程中基本是运用固有的工艺条件来寄生出一定阈值电压的半导体器件，其阈值电压为不可调。
发明内容
基于此，有必要针对上述问题，提供一种可变阈值的半导体器件。
还提供一种可变阈值的半导体器件的制备方法。
在其中一个实施例中，包括衬底，衬底上的埋层，埋层上的扩散层及扩散层上的栅极；所述扩散层包括第一扩散区和第二扩散区，所述第二扩散区的杂质类型与所述第一扩散区的杂质类型相反；在所述第二扩散区内还形成有多个第三扩散区，所述第三扩散区的杂质类型与所述第二扩散区的杂质类型相反。
在其中一个实施例中，所述第三扩散区为规则间隔排列。
在其中一个实施例中，所述第三扩散区的边长小于或等于所述第三扩散区相互之间的间隔宽度。
在其中一个实施例中，所述第三扩散区的杂质类型与所述栅极的杂质类型相反。
在其中一个实施例中，所述埋层包括第一埋层区和第二埋层区，所述第一埋层区和所述第二埋层区的杂质类型相反，所述第一埋层区的杂质类型与所述第一扩散区的杂质类型相同。
在其中一个实施例中，所述半导体器件包括常开型器件区域和常关型器件区域，所述常开型器件区域和常关型器件区域各设有一第一埋层区，并共享一个第二埋层区；所述常开型器件区域和常关型器件区域各设有一第一扩散区，并共享一个第二扩散区；所述半导体器件还包括形成于所述第二扩散区内、所述常开型器件区域和常关型器件区域交界处的共享漏极引出区，所述共享漏极引出区作为常开型器件和常关型器件共同的漏极引出区，所述共享漏极引出区的杂质类型与所述第二扩散区的杂质类型相同。
在其中一个实施例中，所述常开型器件区域的第一扩散区内设有衬底引出区，所述常开型器件区域的第二扩散区内设有源极引出区，所述源极引出区与所述衬底引出区的杂质类型相反，所述源极引出区和所述衬底引出区的间隔大于零。
在其中一个实施例中，所述常关型器件区域的第一扩散区内还设有源极引出区和衬底引出区，所述源极引出区和所述衬底引出区的间隔为大于或等于零。
在其中一个实施例中，所述半导体器件为横向扩散金属氧化物半导体器件。
一种半导体器件的制备方法，包括步骤：提供衬底，在所述衬底上形成埋层；在所述埋层上形成包含第一扩散区和第二扩散区的扩散层，所述第一扩散区的杂质类型与所述第二扩散区的杂质类型相反；在所述第二扩散区内形成多个第三扩散区，所述第三扩散区的杂质类型与所述第二扩散区的杂质类型相反；形成半导体器件的栅极、漏极引出区以及源极引出区。
上述半导体器件的制备方法，通过在第二扩散区内形成杂质类型相反的多个第三扩散区，可以通过调整第三扩散区的大小从而实现对第二扩散区浓度的调节及控制，实现对半导体器件的阈值电压的控制，获得可变阈值的半导体器件。
附图说明
图1为一实施例中半导体器件的局部剖视图；
图2为另一实施例中半导体器件的局部剖视图；
图3为一实施例中半导体器件的制备方法的流程图；
图4为一实施例中半导体器件的制备方法中形成多个第三扩散区的示意图。
具体实施方式
为使本发明的目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施方式做详细的说明。
图1为一实施例中半导体器件100的结构剖视图。在本实施例中，半导体器件100为横向扩散金属氧化物半导体器件。半导体器件100包括衬底110。衬底110为本领域技术人员习知的半导体材料。衬底110上设有埋层120。埋层120包括第一埋层区122和第二埋层区124。第一埋层区122和第二埋层区124是通过离子注入进行掺杂，掺杂杂质类型相反。在本实施例中，通过两次注入来形成埋层120，可以避免使用过多的推结来形成埋层120。通过第一埋层区122和第二埋层区124共同形成器件的耐高压区域，可以提高器件的耐压性能。在埋层120上形成有扩散层130。在本实施例中，扩散层130包括第一扩散区132以及第二扩散区134。其中，第一扩散区132的杂质类型与第一埋层区122的杂质类型相同；第一扩散区132的杂质类型与第二扩散区134的杂质类型相反。
在本实施例中，第二扩散区134内还形成有多个第三扩散区136。第三扩散区136的杂质类型与第二扩散区134的杂质类型相反。通过形成的多个第三扩散区136，并对第三扩散区136的大小以及注入离子的浓度和剂量进行调整从而实现第二扩散区134的杂质浓度的调节和控制，使得半导体器件100的阈值电压可调。具体地，第三扩散区136通过离子注入形成。第三扩散区136为规则间隔排列，其边长应小于或等于第三扩散区136之间的间隔宽度。第三扩散区136的边长不易过大，否则易在第二扩散区134内形成相反杂质类型的岛。
在半导体器件100的第二扩散区上形成有栅极144。第三扩散区的杂质类型与所述栅极的杂质类型相反。栅极144与硅基之间的氧化层厚度可以根据实际需要进行设定。在第二扩散区134上还形成漏极引出区142和源极引出区146。漏极引出区142的杂质类型与第二扩散区134的杂质类型相同。在第一扩散区132上形成有衬底引出区148。衬底引出区148和源极引出区146的杂质类型相反。
在其他实施例中，半导体器件可以为包括常开型器件区域和常关型器件区域的半导体器件，如图2所示。所述半导体器件200包括常开型器件区域10和常关型器件区域20。常开型器件区域10和常关型器件区域20各设有一第一埋层区122，并共享一个第二埋层区124。常开型器件区域10和常关型器件区域20各设有一第一扩散区132，并共享一个第二扩散区134。半导体器件200还包括形成于所述第二扩散区134内、常开型器件区域10和常关型器件区域20交界处的共享漏极引出区142。共享漏极引出区142作为常开型器件10和常关型器件20共同的漏极引出区，这样在进行布局设计时，可以很大程度上减小器件的面积，从而提高器件的可设计性以及器件的通用性，并且，本半导体器件可同时获得常开型器件和常关型器件，在很大程度上可以简化制备流程，节约成本。在本实施例中，共享漏极引出区142的杂质类型与第二扩散区134的杂质类型相同。
在本实施例中，常开型器件区域10所在的第二扩散区134上形成有第三扩散区136、栅极144以及源极引出区146；第一扩散区132上形成有衬底引出区148。常开型器件区域10的源极引出区146和衬底引出区148的间隔为大于零。当源极引出区146和衬底引出区148的间隔为零时，二者之间的击穿电压很低，器件将无法使用。常关型器件区域20的第一扩散区232上形成有衬底引出区246以及源极引出区248，衬底引出区246和源极引出区248的杂质浓度较高，相互之间的间隔为大于或等于零。在常关型器件20所在的第二扩散区134内形成有第三扩散区236，以实现对第二扩散区134的浓度调节，提高器件的性能。
如图3所示，还提供一种半导体器件的制备方法，包括以下步骤。
S310，提供衬底，在衬底上注入形成埋层。
衬底的材质为本领域技术人员习知的半导体材料。在衬底上通过离子注入形成埋层。在本实施例中，埋层通过两次注入形成，即先后完成第一埋层区、第二埋层区的制备。第一埋层区和第二埋层区的杂质类型相反。通过分两次注入来形成埋层区，可以避免使用过多的推结来实现埋层区的制备。同时通过第一埋层区和第二埋层区共同形成器件的耐高压区域，以提高器件的耐压性能。
S320，在埋层正面形成包含第一扩散区和第二扩散区的扩散层。
在埋层正面形成扩散层，扩散层包括第一扩散区和第二扩散区。第一扩散区和第二扩散区的杂质类型相反。第一扩散区的杂质类型与第一埋层区的杂质类型相同。
S330，在第二扩散区上形成多个第三扩散区。
在第二扩散区上形成一层光刻胶，并在第二扩散区上方对应的光刻胶处开设多个第三扩散区的注入窗口。图4为开设多个注入窗口的光刻胶的俯视图。光刻胶410位于扩散区上方，并在第二扩散区上方形成多个第三扩散区的注入窗口420。通过注入窗口420进行掺杂杂质的注入，掺杂杂质类型与第二扩散区的杂质类型相反，并按一定比例进行注入，在第二扩散区形成多个第三扩散区，以调节第二扩散区的杂质浓度，实现对器件阈值电压的调节和控制，以获得可变阈值的半导体器件。在本实施例中，注入窗口420为规则间隔排列。其形状可以根据实际需要进行设计。在本实施例中，注入窗口为正方形，在其他的实施例中，注入窗口还可以为其他的形状。注入窗口的大小以及注入窗口相互之间的间隔需要根据不同的阈值电压来进行调节。不同的阈值电压所对应的注入窗口大小以及注入窗口相互之间的间隔大小也不相同。在本实施例中，注入窗口不能过大，其边长应小于或等于注入窗口相互之间的间隔宽度。否则，当注入窗口过大时，易使得在第二扩散区内形成杂质类型相反的岛。
S340，形成半导体器件的栅极、源极引出区、漏极引出区以及衬底引出区。
在第二扩散区上形成栅极、漏极引出区以及源极引出区，在第一扩散区内形成衬底引出区域。漏极引出区的杂质类型与第二扩散区的杂质类型相同，源极引出区的杂质类型与衬底引出区的杂质类型相反。
在另一实施例中，半导体器件器件为包括常开型器件区域和常关型器件区域的器件时，在制备过程中，常开型器件区域和常关型器件区域为同步进行。在制备埋层过程中，常开型器件区域和常关型器件区域各形成一第一埋层区，并共享一第二埋层区。常开型器件区域和常关型器件区域各制备一第一扩散区，并共享一第二扩散区。在制备完埋层以及扩散层后，还包括制备共享漏极引出区的步骤，即在第二扩散区、常开型器件区域和常关型器件区域的交界处形成共享漏极引出区。共享漏极引出区的杂质类型与第二扩散区的杂质类型相同。共享漏极引出区作为常开型器件和常关型器件共同的漏极引出区，在进行布局设计时可以很大程度上减小器件的面积，从而实现提供器件的可设计性。且在获得常开型器件的同时也可以获得常关器件，简化了器件的制造工艺流程，节约了工艺成本。
在本实施例中，还包括在常开型器件区域所在的第二扩散区上形成第三扩散区、栅极以及源极引出区的步骤；以及在第一扩散区上形成衬底引出区。常开型器件区域的源极引出区和衬底引出区的间隔为大于零。当源极引出区和衬底引出区的间隔为零时，二者之间的击穿电压很低，器件将无法使用。在常关型器件区域的第一扩散区上形成衬底引出区以及源极引出区，衬底引出区和源极引出区的杂质浓度较高，相互之间的间隔为大于或等于零。在常关型器件所在的第二扩散区内形成第三扩散区，以实现对第二扩散区的浓度调节，提高器件的性能。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (10)

1.一种半导体器件，其特征在于，包括衬底，衬底上的埋层，埋层上的扩散层及扩散层上的栅极；所述扩散层包括第一扩散区和第二扩散区，所述第二扩散区的杂质类型与所述第一扩散区的杂质类型相反；在所述第二扩散区内还形成有多个第三扩散区，所述第三扩散区的杂质类型与所述第二扩散区的杂质类型相反；所述第一扩散区内形成有衬底引出区，所述第二扩散区内形成有栅极、漏极引出区和源极引出区；所述第三扩散区位于漏极引出区和源极引出区之间，且所述第三扩散区与漏极引出区和源极引出区相离；通过形成的多个第三扩散区，并对第三扩散区的大小以及注入离子的浓度和剂量进行调整从而实现第二扩散区的杂质浓度的调节和控制，使得半导体器件的阈值电压可调。
2.根据权利要求1所述的半导体器件，其特征在于，所述第三扩散区为规则间隔排列。
3.根据权利要求2所述的半导体器件，其特征在于，所述第三扩散区的边长小于或等于所述第三扩散区相互之间的间隔宽度。
4.根据权利要求1所述的半导体器件，其特征在于，所述第三扩散区的杂质类型与所述栅极的杂质类型相反。
5.根据权利要求1所述的半导体器件，其特征在于，所述埋层包括第一埋层区和第二埋层区，所述第一埋层区和所述第二埋层区的杂质类型相反，所述第一埋层区的杂质类型与所述第一扩散区的杂质类型相同。
6.根据权利要求5所述的半导体器件，其特征在于，所述半导体器件包括常开型器件区域和常关型器件区域，所述常开型器件区域和常关型器件区域各设有一第一埋层区，并共享一个第二埋层区；所述常开型器件区域和常关型器件区域各设有一第一扩散区，并共享一个第二扩散区；所述半导体器件还包括形成于所述第二扩散区内、所述常开型器件区域和常关型器件区域交界处的共享漏极引出区，所述共享漏极引出区作为常开型器件和常关型器件共同的漏极引出区，所述共享漏极引出区的杂质类型与所述第二扩散区的杂质类型相同。
7.根据权利要求6所述的半导体器件，其特征在于，所述常开型器件区域的第一扩散区内设有衬底引出区，所述常开型器件区域的第二扩散区内设有源极引出区，所述源极引出区与所述衬底引出区的杂质类型相反，所述源极引出区和所述衬底引出区的间隔大于零。
8.根据权利要求6所述的半导体器件，其特征在于，所述常关型器件区域的第一扩散区内还设有源极引出区和衬底引出区，所述源极引出区和所述衬底引出区的间隔为大于或等于零。
9.根据权利要求1～8任一所述的半导体器件，其特征在于，所述半导体器件为横向扩散金属氧化物半导体器件。
10.一种半导体器件的制备方法，包括步骤：
提供衬底，在所述衬底上形成埋层；
在所述埋层上形成包含第一扩散区和第二扩散区的扩散层，所述第一扩散区的杂质类型与所述第二扩散区的杂质类型相反；
在所述第二扩散区内形成多个第三扩散区，所述第三扩散区的杂质类型与所述第二扩散区的杂质类型相反；所述第一扩散区内形成有衬底引出区，所述第二扩散区内还形成有栅极、漏极引出区和源极引出区；所述第三扩散区位于漏极引出区和源极引出区之间，且所述第三扩散区与漏极引出区和源极引出区相离；通过形成的多个第三扩散区，并对第三扩散区的大小以及注入离子的浓度和剂量进行调整从而实现第二扩散区的杂质浓度的调节和控制，使得半导体器件的阈值电压可调；
形成半导体器件的栅极、漏极引出区以及源极引出区。
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