CN102165565B - 用以使穿过衬底的过孔侧壁及其它深蚀刻特征部光滑的后蚀刻反应等离子体研磨 - Google Patents

用以使穿过衬底的过孔侧壁及其它深蚀刻特征部光滑的后蚀刻反应等离子体研磨 Download PDF

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Publication number
CN102165565B
CN102165565B CN200980133906.8A CN200980133906A CN102165565B CN 102165565 B CN102165565 B CN 102165565B CN 200980133906 A CN200980133906 A CN 200980133906A CN 102165565 B CN102165565 B CN 102165565B
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features
silicon
power
substrate
scope
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Expired - Fee Related
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CN200980133906.8A
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English (en)
Chinese (zh)
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CN102165565A (zh
Inventor
乔恩·法尔
夏尔马·帕马斯
科哈利德·西拉朱迪茵
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Applied Materials Inc
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Applied Materials Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32146—Amplitude modulation, includes pulsing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN200980133906.8A 2008-08-27 2009-08-11 用以使穿过衬底的过孔侧壁及其它深蚀刻特征部光滑的后蚀刻反应等离子体研磨 Expired - Fee Related CN102165565B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/229,946 US9039908B2 (en) 2008-08-27 2008-08-27 Post etch reactive plasma milling to smooth through substrate via sidewalls and other deeply etched features
US12/229,946 2008-08-27
PCT/US2009/004613 WO2010027400A2 (en) 2008-08-27 2009-08-11 Post etch reactive plasma milling to smooth through substrate via sidewalls and other deeply etched features

Publications (2)

Publication Number Publication Date
CN102165565A CN102165565A (zh) 2011-08-24
CN102165565B true CN102165565B (zh) 2015-08-12

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CN200980133906.8A Expired - Fee Related CN102165565B (zh) 2008-08-27 2009-08-11 用以使穿过衬底的过孔侧壁及其它深蚀刻特征部光滑的后蚀刻反应等离子体研磨

Country Status (6)

Country Link
US (1) US9039908B2 (cg-RX-API-DMAC10.html)
JP (1) JP5674663B2 (cg-RX-API-DMAC10.html)
KR (1) KR101468614B1 (cg-RX-API-DMAC10.html)
CN (1) CN102165565B (cg-RX-API-DMAC10.html)
TW (1) TWI494996B (cg-RX-API-DMAC10.html)
WO (1) WO2010027400A2 (cg-RX-API-DMAC10.html)

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US9041210B2 (en) 2012-06-19 2015-05-26 International Business Machines Corporation Through silicon via wafer and methods of manufacturing
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US20150087144A1 (en) * 2013-09-26 2015-03-26 Taiwan Semiconductor Manufacturing Company Ltd. Apparatus and method of manufacturing metal gate semiconductor device
KR102148336B1 (ko) 2013-11-26 2020-08-27 삼성전자주식회사 표면 처리 방법, 반도체 제조 방법 및 이에 의해 제조된 반도체 장치
CN104752331B (zh) * 2013-12-31 2018-08-07 中微半导体设备(上海)有限公司 一种硅通孔刻蚀方法
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JP7281741B2 (ja) * 2019-08-23 2023-05-26 パナソニックＩｐマネジメント株式会社 素子チップのスムージング方法および素子チップの製造方法
KR102297835B1 (ko) * 2019-11-21 2021-09-02 (재)한국나노기술원 테이퍼 형태의 경사벽을 갖는 비아 홀 제조 방법
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WO2024073390A1 (en) * 2022-09-29 2024-04-04 Lam Research Corporation Post etch plasma treatment for reducing sidewall contaminants and roughness
US20240258112A1 (en) * 2023-01-30 2024-08-01 Texas Instruments Incorporated Multi-loop time varying bosch process for 2-dimensional small cd high aspect ratio deep silicon trench etching
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TW202607815A (zh) * 2024-03-22 2026-02-16 日商東京威力科創股份有限公司 基板處理方法及電漿處理裝置
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Also Published As

Publication number Publication date
KR20110052723A (ko) 2011-05-18
TWI494996B (zh) 2015-08-01
CN102165565A (zh) 2011-08-24
US20100055400A1 (en) 2010-03-04
KR101468614B1 (ko) 2014-12-04
JP2012501540A (ja) 2012-01-19
WO2010027400A3 (en) 2010-04-29
US9039908B2 (en) 2015-05-26
TW201009933A (en) 2010-03-01
WO2010027400A2 (en) 2010-03-11
JP5674663B2 (ja) 2015-02-25

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