CN102132398B - 用于互连的自对准阻挡层 - Google Patents
用于互连的自对准阻挡层 Download PDFInfo
- Publication number
- CN102132398B CN102132398B CN200980112816.0A CN200980112816A CN102132398B CN 102132398 B CN102132398 B CN 102132398B CN 200980112816 A CN200980112816 A CN 200980112816A CN 102132398 B CN102132398 B CN 102132398B
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- CN
- China
- Prior art keywords
- metal
- deposited
- copper
- manganese
- depositing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 0 CCC(C)([C@]([C@@]1**)([C@]11C2([C@@]3C22)C1(*)[C@]3(C1)C(C)=N)N=CC)[C@]21N Chemical compound CCC(C)([C@]([C@@]1**)([C@]11C2([C@@]3C22)C1(*)[C@]3(C1)C(C)=N)N=CC)[C@]21N 0.000 description 1
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/16—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal carbonyl compounds
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/18—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76858—After-treatment introducing at least one additional element into the layer by diffusing alloying elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/101—Forming openings in dielectrics
- H01L2221/1015—Forming openings in dielectrics for dual damascene structures
- H01L2221/1036—Dual damascene with different via-level and trench-level dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Mechanical Engineering (AREA)
- Materials Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US3865708P | 2008-03-21 | 2008-03-21 | |
| US61/038,657 | 2008-03-21 | ||
| US4323608P | 2008-04-08 | 2008-04-08 | |
| US61/043,236 | 2008-04-08 | ||
| US7446708P | 2008-06-20 | 2008-06-20 | |
| US61/074,467 | 2008-06-20 | ||
| PCT/US2009/037826 WO2009117670A2 (en) | 2008-03-21 | 2009-03-20 | Self-aligned barrier layers for interconnects |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102132398A CN102132398A (zh) | 2011-07-20 |
| CN102132398B true CN102132398B (zh) | 2015-01-28 |
Family
ID=41091558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200980112816.0A Expired - Fee Related CN102132398B (zh) | 2008-03-21 | 2009-03-20 | 用于互连的自对准阻挡层 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7932176B2 (enExample) |
| JP (1) | JP5820267B2 (enExample) |
| KR (2) | KR101649714B1 (enExample) |
| CN (1) | CN102132398B (enExample) |
| WO (1) | WO2009117670A2 (enExample) |
Families Citing this family (58)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4783561B2 (ja) * | 2004-09-27 | 2011-09-28 | 株式会社アルバック | 銅配線の形成方法 |
| EP1909320A1 (en) * | 2006-10-05 | 2008-04-09 | ST Microelectronics Crolles 2 SAS | Copper diffusion barrier |
| KR101649714B1 (ko) | 2008-03-21 | 2016-08-30 | 프레지던트 앤드 펠로우즈 오브 하바드 칼리지 | 상호접속부를 위한 자기정렬 배리어 층 |
| JP5280267B2 (ja) * | 2009-03-27 | 2013-09-04 | 株式会社日本総合研究所 | 製造方法および車両 |
| JP5507909B2 (ja) * | 2009-07-14 | 2014-05-28 | 東京エレクトロン株式会社 | 成膜方法 |
| WO2011050073A1 (en) * | 2009-10-23 | 2011-04-28 | President And Fellows Of Harvard College | Self-aligned barrier and capping layers for interconnects |
| KR102345456B1 (ko) | 2009-11-27 | 2021-12-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작방법 |
| US8138084B2 (en) | 2009-12-23 | 2012-03-20 | Intel Corporation | Electroless Cu plating for enhanced self-forming barrier layers |
| US20110266676A1 (en) * | 2010-05-03 | 2011-11-03 | Toshiba America Electronic Components, Inc. | Method for forming interconnection line and semiconductor structure |
| US9926639B2 (en) | 2010-07-16 | 2018-03-27 | Applied Materials, Inc. | Methods for forming barrier/seed layers for copper interconnect structures |
| US8492289B2 (en) | 2010-09-15 | 2013-07-23 | International Business Machines Corporation | Barrier layer formation for metal interconnects through enhanced impurity diffusion |
| TWI550119B (zh) | 2010-11-02 | 2016-09-21 | 宇部興產股份有限公司 | (醯胺胺基烷)金屬化合物、及利用該金屬化合物之含金屬之薄膜之製造方法 |
| US8492897B2 (en) * | 2011-09-14 | 2013-07-23 | International Business Machines Corporation | Microstructure modification in copper interconnect structures |
| US9190323B2 (en) * | 2012-01-19 | 2015-11-17 | GlobalFoundries, Inc. | Semiconductor devices with copper interconnects and methods for fabricating same |
| WO2013153777A1 (ja) * | 2012-04-11 | 2013-10-17 | 東京エレクトロン株式会社 | 半導体装置の製造方法、半導体装置、半導体製造装置 |
| US9076661B2 (en) | 2012-04-13 | 2015-07-07 | Applied Materials, Inc. | Methods for manganese nitride integration |
| US9048294B2 (en) | 2012-04-13 | 2015-06-02 | Applied Materials, Inc. | Methods for depositing manganese and manganese nitrides |
| US9054109B2 (en) * | 2012-05-29 | 2015-06-09 | International Business Machines Corporation | Corrosion/etching protection in integration circuit fabrications |
| US8710660B2 (en) * | 2012-07-20 | 2014-04-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Hybrid interconnect scheme including aluminum metal line in low-k dielectric |
| CN102768988B (zh) * | 2012-07-25 | 2014-10-15 | 上海华力微电子有限公司 | 一种有效判定铜扩散阻挡层阻挡能力的方法 |
| JP5969306B2 (ja) | 2012-08-08 | 2016-08-17 | 東京エレクトロン株式会社 | Cu配線の形成方法 |
| US8765602B2 (en) | 2012-08-30 | 2014-07-01 | International Business Machines Corporation | Doping of copper wiring structures in back end of line processing |
| JP6117588B2 (ja) | 2012-12-12 | 2017-04-19 | 東京エレクトロン株式会社 | Cu配線の形成方法 |
| JP2014141739A (ja) | 2012-12-27 | 2014-08-07 | Tokyo Electron Ltd | 金属マンガン膜の成膜方法、処理システム、電子デバイスの製造方法および電子デバイス |
| JP6030439B2 (ja) | 2012-12-27 | 2016-11-24 | 東京エレクトロン株式会社 | マンガン含有膜の形成方法、処理システム、および電子デバイスの製造方法 |
| US9209134B2 (en) * | 2013-03-14 | 2015-12-08 | Intermolecular, Inc. | Method to increase interconnect reliability |
| US9184093B2 (en) | 2013-03-15 | 2015-11-10 | Applied Materials, Inc. | Integrated cluster to enable next generation interconnect |
| CN104103575B (zh) * | 2013-04-10 | 2017-12-29 | 中芯国际集成电路制造(上海)有限公司 | 铜互连线的形成方法 |
| US9064937B2 (en) | 2013-05-30 | 2015-06-23 | International Business Machines Corporation | Substrate bonding with diffusion barrier structures |
| JP6257217B2 (ja) | 2013-08-22 | 2018-01-10 | 東京エレクトロン株式会社 | Cu配線構造の形成方法 |
| US9043743B2 (en) * | 2013-10-22 | 2015-05-26 | International Business Machines Corporation | Automated residual material detection |
| US9362228B2 (en) * | 2013-10-22 | 2016-06-07 | Globalfoundries Inc. | Electro-migration enhancing method for self-forming barrier process in copper metalization |
| US9275952B2 (en) | 2014-01-24 | 2016-03-01 | International Business Machines Corporation | Ultrathin superlattice of MnO/Mn/MnN and other metal oxide/metal/metal nitride liners and caps for copper low dielectric constant interconnects |
| US9343357B2 (en) * | 2014-02-28 | 2016-05-17 | Qualcomm Incorporated | Selective conductive barrier layer formation |
| FR3025396A1 (fr) | 2014-09-02 | 2016-03-04 | St Microelectronics Tours Sas | Procede de fabrication d'un element de connexion electrique |
| US9728502B2 (en) * | 2014-11-10 | 2017-08-08 | Samsung Electronics Co., Ltd. | Metal oxysilicate diffusion barriers for damascene metallization with low RC delays and methods for forming the same |
| JP2016167545A (ja) * | 2015-03-10 | 2016-09-15 | 東京エレクトロン株式会社 | ビアホール底のクリーニング方法および半導体装置の製造方法 |
| JP2017050304A (ja) | 2015-08-31 | 2017-03-09 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
| US9842805B2 (en) | 2015-09-24 | 2017-12-12 | International Business Machines Corporation | Drive-in Mn before copper plating |
| JP6559046B2 (ja) | 2015-11-04 | 2019-08-14 | 東京エレクトロン株式会社 | パターン形成方法 |
| US20160083405A1 (en) * | 2015-11-30 | 2016-03-24 | L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude | Tantalum- or vanadium-containing film forming compositions and vapor deposition of tantalum- or vanadium-containing films |
| JP2017135237A (ja) * | 2016-01-27 | 2017-08-03 | 東京エレクトロン株式会社 | Cu配線の製造方法およびCu配線製造システム |
| US10049974B2 (en) | 2016-08-30 | 2018-08-14 | International Business Machines Corporation | Metal silicate spacers for fully aligned vias |
| US10229851B2 (en) | 2016-08-30 | 2019-03-12 | International Business Machines Corporation | Self-forming barrier for use in air gap formation |
| US9786760B1 (en) | 2016-09-29 | 2017-10-10 | International Business Machines Corporation | Air gap and air spacer pinch off |
| WO2018125247A1 (en) * | 2016-12-31 | 2018-07-05 | Intel Corporation | Hardened plug for improved shorting margin |
| US10760156B2 (en) | 2017-10-13 | 2020-09-01 | Honeywell International Inc. | Copper manganese sputtering target |
| CN108047274B (zh) * | 2017-12-15 | 2019-08-20 | 江南大学 | 一种铜互连阻挡层材料用吡啶基Mn(Ⅱ)化合物 |
| US10204829B1 (en) | 2018-01-12 | 2019-02-12 | International Business Machines Corporation | Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers |
| US11035036B2 (en) | 2018-02-01 | 2021-06-15 | Honeywell International Inc. | Method of forming copper alloy sputtering targets with refined shape and microstructure |
| US11152294B2 (en) | 2018-04-09 | 2021-10-19 | Corning Incorporated | Hermetic metallized via with improved reliability |
| US11133216B2 (en) | 2018-06-01 | 2021-09-28 | International Business Machines Corporation | Interconnect structure |
| JP2022502567A (ja) | 2018-09-20 | 2022-01-11 | 財團法人工業技術研究院Industrial Technology Research Institute | 薄いガラスのガラス貫通ビアのための銅による金属化 |
| KR20250083587A (ko) | 2019-02-21 | 2025-06-10 | 코닝 인코포레이티드 | 구리-금속화된 쓰루 홀을 갖는 유리 또는 유리 세라믹 물품 및 이를 제조하기 위한 공정 |
| US10818589B2 (en) | 2019-03-13 | 2020-10-27 | International Business Machines Corporation | Metal interconnect structures with self-forming sidewall barrier layer |
| JP7161767B2 (ja) * | 2019-04-22 | 2022-10-27 | 気相成長株式会社 | 形成材料、形成方法、及び新規化合物 |
| KR20220053482A (ko) * | 2020-10-22 | 2022-04-29 | 에이에스엠 아이피 홀딩 비.브이. | 바나듐 금속을 증착하는 방법, 구조체, 소자 및 증착 어셈블리 |
| CN112687617B (zh) * | 2020-12-24 | 2022-07-22 | 中国电子科技集团公司第十三研究所 | 绝缘子针的制备方法及绝缘子针 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6077774A (en) * | 1996-03-29 | 2000-06-20 | Texas Instruments Incorporated | Method of forming ultra-thin and conformal diffusion barriers encapsulating copper |
| US6203613B1 (en) * | 1999-10-19 | 2001-03-20 | International Business Machines Corporation | Atomic layer deposition with nitrate containing precursors |
| US6413815B1 (en) * | 2001-07-17 | 2002-07-02 | Macronix International Co., Ltd. | Method of forming a MIM capacitor |
| CN1726303A (zh) * | 2002-11-15 | 2006-01-25 | 哈佛学院院长等 | 使用脒基金属的原子层沉积 |
| CN1945825A (zh) * | 2005-10-03 | 2007-04-11 | 恩益禧电子股份有限公司 | 半导体器件及其制作方法 |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6060534A (en) | 1996-07-11 | 2000-05-09 | Scimed Life Systems, Inc. | Medical devices comprising ionically and non-ionically crosslinked polymer hydrogels having improved mechanical properties |
| US6951682B1 (en) | 1998-12-01 | 2005-10-04 | Syntrix Biochip, Inc. | Porous coatings bearing ligand arrays and use thereof |
| KR100383759B1 (ko) | 2000-06-15 | 2003-05-14 | 주식회사 하이닉스반도체 | 반도체 소자의 구리 금속 배선 형성 방법 |
| US20030134499A1 (en) * | 2002-01-15 | 2003-07-17 | International Business Machines Corporation | Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof |
| US7026714B2 (en) * | 2003-03-18 | 2006-04-11 | Cunningham James A | Copper interconnect systems which use conductive, metal-based cap layers |
| KR100563817B1 (ko) | 2003-12-30 | 2006-03-28 | 동부아남반도체 주식회사 | 반도체 소자의 구리 배선 형성 방법 |
| JP4478038B2 (ja) * | 2004-02-27 | 2010-06-09 | 株式会社半導体理工学研究センター | 半導体装置及びその製造方法 |
| DE102004019241A1 (de) | 2004-04-16 | 2005-11-03 | Cellmed Ag | Injizierbare vernetzte und unvernetzte Alginate und ihre Verwendung in der Medizin und in der ästhetischen Chirurgie |
| US7879710B2 (en) | 2005-05-18 | 2011-02-01 | Intermolecular, Inc. | Substrate processing including a masking layer |
| EP1909320A1 (en) * | 2006-10-05 | 2008-04-09 | ST Microelectronics Crolles 2 SAS | Copper diffusion barrier |
| JP4236201B2 (ja) * | 2005-08-30 | 2009-03-11 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP4272191B2 (ja) * | 2005-08-30 | 2009-06-03 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP2009518844A (ja) | 2005-12-07 | 2009-05-07 | エヌエックスピー ビー ヴィ | 半導体ディバイスのための構造における第2材料内に埋設する第1材料の表面に層を形成する方法 |
| WO2007071497A1 (en) * | 2005-12-20 | 2007-06-28 | Ciba Holding Inc. | Oxime ester photoinitiators |
| JP2007173511A (ja) * | 2005-12-22 | 2007-07-05 | Sony Corp | 半導体装置の製造方法 |
| JP4741965B2 (ja) * | 2006-03-23 | 2011-08-10 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| JP2007308789A (ja) | 2006-04-19 | 2007-11-29 | Tokyo Electron Ltd | 成膜装置及び成膜方法 |
| JP2008013848A (ja) | 2006-06-08 | 2008-01-24 | Tokyo Electron Ltd | 成膜装置及び成膜方法 |
| US20080032064A1 (en) | 2006-07-10 | 2008-02-07 | President And Fellows Of Harvard College | Selective sealing of porous dielectric materials |
| KR101059709B1 (ko) * | 2006-07-14 | 2011-08-29 | 가부시키가이샤 알박 | 반도체 장치의 제조 방법 |
| EP2142682B1 (en) * | 2007-04-09 | 2014-12-03 | President and Fellows of Harvard College | Cobalt nitride layers for copper interconnects and methods for forming them |
| DE102007035837A1 (de) * | 2007-07-31 | 2009-02-05 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement mit einer Kornorientierungsschicht |
| US7884475B2 (en) * | 2007-10-16 | 2011-02-08 | International Business Machines Corporation | Conductor structure including manganese oxide capping layer |
| US20090117731A1 (en) * | 2007-11-01 | 2009-05-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor interconnection structure and method for making the same |
| US7555191B1 (en) | 2008-01-30 | 2009-06-30 | Joshua John Edward Moore | Self-locking unidirectional interposer springs for optical transceiver modules |
| US7651943B2 (en) * | 2008-02-18 | 2010-01-26 | Taiwan Semicondcutor Manufacturing Company, Ltd. | Forming diffusion barriers by annealing copper alloy layers |
| KR101649714B1 (ko) * | 2008-03-21 | 2016-08-30 | 프레지던트 앤드 펠로우즈 오브 하바드 칼리지 | 상호접속부를 위한 자기정렬 배리어 층 |
-
2009
- 2009-03-20 KR KR1020107022353A patent/KR101649714B1/ko not_active Expired - Fee Related
- 2009-03-20 WO PCT/US2009/037826 patent/WO2009117670A2/en not_active Ceased
- 2009-03-20 CN CN200980112816.0A patent/CN102132398B/zh not_active Expired - Fee Related
- 2009-03-20 KR KR1020167022151A patent/KR101803221B1/ko active Active
- 2009-03-20 JP JP2011500986A patent/JP5820267B2/ja not_active Expired - Fee Related
- 2009-03-20 US US12/408,473 patent/US7932176B2/en active Active
-
2011
- 2011-03-18 US US13/051,792 patent/US8222134B2/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6077774A (en) * | 1996-03-29 | 2000-06-20 | Texas Instruments Incorporated | Method of forming ultra-thin and conformal diffusion barriers encapsulating copper |
| US6203613B1 (en) * | 1999-10-19 | 2001-03-20 | International Business Machines Corporation | Atomic layer deposition with nitrate containing precursors |
| US6413815B1 (en) * | 2001-07-17 | 2002-07-02 | Macronix International Co., Ltd. | Method of forming a MIM capacitor |
| CN1726303A (zh) * | 2002-11-15 | 2006-01-25 | 哈佛学院院长等 | 使用脒基金属的原子层沉积 |
| CN1945825A (zh) * | 2005-10-03 | 2007-04-11 | 恩益禧电子股份有限公司 | 半导体器件及其制作方法 |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2008-13848A 2008.01.24 * |
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| WO2009117670A2 (en) | 2009-09-24 |
| JP2011525697A (ja) | 2011-09-22 |
| CN102132398A (zh) | 2011-07-20 |
| KR101803221B1 (ko) | 2017-11-29 |
| US20110254164A1 (en) | 2011-10-20 |
| US8222134B2 (en) | 2012-07-17 |
| JP5820267B2 (ja) | 2015-11-24 |
| US20090263965A1 (en) | 2009-10-22 |
| KR20120020035A (ko) | 2012-03-07 |
| US7932176B2 (en) | 2011-04-26 |
| KR101649714B1 (ko) | 2016-08-30 |
| WO2009117670A3 (en) | 2012-03-22 |
| KR20160102570A (ko) | 2016-08-30 |
| HK1159852A1 (en) | 2012-08-03 |
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