CN102110677A - 配线元件与电子芯片的装配方法 - Google Patents
配线元件与电子芯片的装配方法 Download PDFInfo
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- CN102110677A CN102110677A CN2010106030356A CN201010603035A CN102110677A CN 102110677 A CN102110677 A CN 102110677A CN 2010106030356 A CN2010106030356 A CN 2010106030356A CN 201010603035 A CN201010603035 A CN 201010603035A CN 102110677 A CN102110677 A CN 102110677A
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Abstract
本发明提供一种配线元件与电子芯片的装配方法、电子芯片、多个芯片的制造方法以及组件。配线元件与电子芯片的装配方法的第一个步骤包括将配线元件布置在由第一元件和第二元件限定的芯片的槽中,该第一元件和第二元件由包括可塑性变形的材料的连接元件连接;然后第二个步骤包括压紧第一元件和第二元件以使连接元件变形直到将配线元件固定在槽中。
Description
技术领域
本发明涉及一种配线元件与电子芯片的装配方法。
背景技术
目前,存在许多用于将微电子芯片彼此机械和电连接的技术。传统的技术包括:一旦芯片已经形成在衬底上且通过切割被分离,便在芯片之间制成刚性机械连接。然后,在形成保护涂层之前,将固定在刚性支撑上的芯片电连接。当芯片连接的复杂度很大时,通常采用这种在刚性支撑上进行连接的方法。然而,这种方法的主要不足在于采用刚性机械连接,该刚性机械连接尤其不适合于柔性结构的集成。
如图1所示,申请人所提交的文件WO2008/025889中描述了包括两个平行的主表面1和2以及相对的侧面3a和3b的微电子芯片。侧面3a和3b的至少之一包括提供有电连接元件(未示出)的槽4,该电连接元件形成轴与槽4的纵轴平行的配线元件5的外壳。该电连接元件通过金属化槽4的至少一部分而实现。轴与槽4的纵轴平行的配线元件5可以通过外加材料的焊接、通过电解、通过接合或者通过嵌入而固定到槽4。嵌入槽4中要求配线元件5和槽4的尺寸合适。嵌入的强度可能会不足且通常需要通过添加粘合剂或者金属实现的强化阶段。
文件EP2099060中描述了芯片彼此装配的组件的制造方法。芯片包括容纳配线元件的槽。而且,该配线元件嵌入在槽中。
发明内容
本发明的目标是提供一种不具有现有技术的缺点的电子芯片,该电子芯片能够将芯片与不同类型和不同尺寸的配线元件装配在一起。
该目标由权利要求书,更具体地由包括以下步骤的方法实现,这些步骤为:
将配线元件布置在芯片的槽中,该芯片由第一元件和第二元件限定,该第一元件和第二元件由包括可塑性变形的材料的连接元件连接;以及
压紧第一元件和第二元件以使连接元件变形直到配线元件固定在槽中。
本发明也涉及一种电子芯片,其包括:
第一元件和第二元件;
连接元件,分隔第一元件和第二元件;
槽,两端敞开,且由第一元件、第二元件和连接元件限定;以及
电接触衬垫,布置在槽中,
该连接元件包括通过在第一元件和第二元件的位置处进行压紧而可塑性变形的材料,且当进行压紧时在第一元件和第二元件接触之前该材料能够流动而到达衬垫。
本发明也涉及一种多个芯片的制造方法,包括以下步骤:
制备包括多个有源区域的有源板,每个有源区域包括至少一个电子部件以及连接到相关的有源区域的电接触衬垫;
形成一组件,该组件由在有源板上放置对向板而形成并且在有源板与对向板之间插设有可变形材料以沿有源区域的边缘之一在每个有源区域的位置处形成腔;
将组件沿有源区域的边缘切割以形成多个芯片,切割路线穿过所述腔以在切割之后获得多个芯片,该多个芯片的每个至少包括由连接元件分隔的第一元件和第二元件以及槽,该连接元件由可变形材料形成,且在所述芯片的表面的位置处所述槽由第一元件、第二元件和连接元件限定,所述电接触衬垫布置在所述槽中且当压紧芯片时在第一元件和第二元件接触之前连接元件的所述可变形材料能够流动到达衬垫。
本发明也涉及一种组件,包括:
微电子芯片,包括第一元件和第二元件;
导电的配线元件,夹置在第一元件与第二元件之间;
连接元件,接触第一元件、第二元件和配线元件,该连接元件具有将配线元件固定到第一元件和第二元件至少之一的作用。
附图说明
根据对仅为了非限制性的目的给出的且示出在附图中的本发明的特定实施例的以下描述,本发明的其他优点和特征将变得更显而易见,附图中:
图1是示出根据现有技术的具有用于配线元件的嵌入槽的芯片;
图2示出根据本发明实施例的芯片;
图3示出图2的芯片的俯视图;
图4到6示出根据本发明的芯片的不同实施例;
图7和8示出配线元件与电子芯片的装配方法;
图9示出提供有停止件的芯片的截面图;
图10示出提供有在压紧步骤中用于引导第一元件和第二元件朝着彼此的移动的构件的芯片;
图11示出图10的芯片的俯视图;
图12、13、14、17和18示出多个芯片的第一制造方法;
图14到18示出多个芯片的第二制造方法;
图19和20示出由第三和第四制造方法获得的芯片的两个其他备选实施例。
具体实施方式
与根据现有技术的电子芯片不同,以下所描述的芯片包括由可塑性变形的材料制成的连接元件,这样的连接元件使得槽的宽度可以改变。
这样,配线元件可以布置在芯片的槽中,优选该配线元件的轴平行于该槽的轴。该芯片由第一元件和第二元件限定,而该第一元件和第二元件由含可塑性变形材料的连接元件连接。该槽也可以由通过连接元件连接的第一元件和第二元件来限定。然后,压紧(clamping)第一和第二元件使得连接元件变形,直到该配线元件固定在槽中。
图2到11示出的且能够采用上述方法的电子芯片包括由连接元件6分隔的第一元件8和第二元件8’。芯片还包括槽4a,槽4a两端敞开且由第一元件8、第二元件8’和连接元件6限定。这样,槽4a可以包括例如由面对第一元件8和第二元件8’的自由面形成的两个侧壁,所述侧壁9a和9b能够通过由连接元件6的一部分形成的底部9c而彼此接合。在所述芯片需要例如与配线元件电连接的情况下,该芯片可以包括电接触衬垫7。这样的衬垫7可以布置在槽4a中,优选布置在槽4a的侧壁之一9a上。连接元件6可以包括通过在第一元件8和第二元件8’的位置处压紧而可塑性变形的材料,且当进行压紧时在第一元件8和第二元件8’接触之前该材料能够流动而到达衬垫7。当进行压紧时,连接元件6的材料实际上能够到达衬垫。尽管采用压入(pinch into)或者进入配线元件的衬垫是优选的,但在槽不包括衬垫的情况下,与可变形且能够流动的连接元件6相结合的压紧也可以充分地机械固定配线元件。
这样,以该方式形成的芯片包括通过侧面3a和3b而彼此接合的两个主表面1和2,且槽4a优选通过侧面之一制成。
连接元件6形成分隔两个元件8和8’的间隔物或间隔物的一部分的等效构件。
在所示出的实施例中,芯片的通常形状是平行六面体形,两个外部主表面1和2因此而具有基本相同的尺寸,而且它们通过四个侧面而接合。当然其他芯片形状也是可以的。例如,具有呈现凸起的外部主表面1的第一元件8也是可以的。侧面还可以是主表面的延伸,而不作为主表面之间的精确的限定边缘。
在图2和3中示出的第一实施例中,芯片包括由连接元件6分隔的第一元件8和第二元件8’,并且第一元件8和第二元件8’与连接元件6一起限定容纳配线元件5的纵向槽4a。如以上所描述,槽4a包括分别由面对第一元件8和第二元件8’的自由面形成的两个侧壁9a和9b。电连接衬垫7设置在槽4a的侧壁之一(图2中的侧壁9a)上,从而在衬垫7的顶部与相对的侧壁(图2中的9b)之间限定自由区域。该自由区域被设计为容纳配线元件,例如容纳以配线元件的芯(core)平行于槽的方式插入的配线元件。
根据第一实施例,第一元件8和第二元件8’优选具有相同的尺寸,且在由连接元件6分隔的同时布置为彼此面对。具有相同的尺寸意味着:第一元件8和第二元件8’的宽度I5和长度I9基本相同,如表示图2的俯视图的图3所示。根据图2和3的具体示例,槽4a包括由连接元件6限定的底部9c,该底部9c接合两个相对的侧壁9a和9b。槽的两个侧壁9a和9b分隔开的距离于是等于连接元件6的高度I1。
为了限定槽4a,连接元件6优选设置为相对于第一元件8和第二元件8’的边缘靠后(图2和图3)。在图3中,连接元件6的宽度I6小于芯片的宽度I5。
在该相对于以下描述的其他实施例是优选的特定实施例中,连接元件6由单层可变形材料形成,且该层的顶表面和底表面优选平行于芯片的主表面且分别接触第一元件8和第二元件8’。
根据本发明的一个特征,第一元件8与第二元件8’之间的连接元件6包括一材料,例如,当在垂直于外部主表面1和2的相反方向上进行芯片的压紧时,该材料可通过按压芯片的外部主表面1和2的位置处使芯片压紧而变形。当进行压紧时,该可变形材料发生形变且横向流动,具体地,朝着槽4a流动且进入槽4a,优选该材料到达配线元件5。压紧可以垂直于连接元件6的面进行。
形成连接元件6的可变形材料的量优选足以使在压紧之前插入槽中的配线元件5能够通过所述材料固定到芯片的第一元件8和第二元件8’的至少之一。换言之,当经受合理的压力即不容易损伤芯片的其余构件的压力时,可变形材料的特性必须容许其变形达到配线元件5的位置处。此外,优选可变形层的特性为:在压力已经释放后,可变形层仍接触连接元件6且参与配线元件5的固定。
由此,在压紧步骤之后,将配线元件5固定在槽中可以例如通过将所述配线元件5机械地夹在第一元件8与第二元件8’之间以及衬垫7与元件8之间和/或通过使连接元件6变形直到接触配线元件5来进行。
此外,在压紧之后,优选可变形材料继续发挥第一元件8和第二元件8’的连接元件的作用,即,继续保证这两个元件彼此固定。一部分材料或余下的材料层例如可以保持夹置在元件8和8’之间。换言之,压紧步骤之后为释放压紧的步骤,而在释放压紧的步骤之后连接元件6仍处于变形状态。
根据备选实施例,也可以提供用于锁止(latching)该组件的构件(未示出)。这样的构件可以例如由分别位于第一元件8和第二元件8’上的阴咬合构件和阳咬合构件而形成。这些咬合构件应例如避免在压紧步骤之后必须保持压紧来固定组件。
在芯片制造、芯片与配线元件的装配以及装配后芯片的长期机械强度方面,可变形材料层表现出许多无可争辩的优点。
实际上,到目前为止,配线元件仅简单地嵌入槽中,因此对于给定的芯片必须采用正确校准的配线元件。由此,可变形的连接元件能够使不同类型的配线元件,特别是不同直径和不同形状的配线元件被使用。此外,本发明的方法对配线元件厚度的改变以及槽在自由区域的位置处的尺寸改变不太敏感。
根据图4示出的备选实施例,芯片包括容纳配线元件的两个槽4a和4b。这两个槽4a和4b优选布置在连接元件6每侧,且每个槽可以包括至少一个连接衬垫7。第二槽4b于是优选形成在第二侧面3b的位置处,该第二侧面3b优选与第一侧面3a相对且平行。以与第一侧面3a的槽4a相同的方式,第二侧面3b的槽4b至少由第一元件8、第二元件8’和连接元件6限定。
在压紧之前分隔衬垫7的顶部与相对于所述衬垫7的侧壁9b的距离I7优选稍大于配线元件5的直径Df,以便于配线元件5的插入。在压紧之后,第一元件8和第二元件8’优选通过最初形成连接元件6的所述可变形材料而彼此固定。配线元件5优选在压紧后由所述材料固定到芯片的第一元件8和第二元件8’的至少之一。
根据图5中示出的芯片的第二实施例,第一元件8或第二元件8’之一(图5中的第一元件8)包括突起部(salient part)10,该突起部10在所述元件的至少一个边缘的位置处形成肩部,在图5中,两个肩部被制造为部分形成两个相似的相对槽4a和4b。形成连接元件6的可变形材料层优选具有与第一元件8的突起部10等同的纵向尺寸和横向尺寸,以便覆盖突起部10的整个顶部。未支承突起部10的元件(图5中的第二元件8’)通过连接元件6固定到支承突起部10的第一元件8。由此,槽4a优选由两个相对的侧壁9a和9b以及接合两个侧壁9a和9b的底部9c限定,该两个相对的侧壁9a和9b分别由面对第一元件8和第二元件8’的自由面形成,所述底部9c由突起部10和连接元件6形成。分隔槽的两个侧壁9a和9b的距离I8等于连接元件6的高度I1加突起部10的高度I2。在图5中,槽4a和4b的连接衬垫7由第二元件8’支撑,该第二元件8’于是为包括例如电子部件的有源元件。
在压紧后,为了能够使配线元件5充分在衬垫7的顶部与相对于所述衬垫7的侧壁9b之间的自由区域的位置处夹紧在相关槽中,优选突起部10的高度I2加可变形材料层的剩余厚度大于衬垫的高度I3,从而可以固定配线元件的至少一部分。还优选突起部10的高度I2加压紧后可变形材料层的剩余厚度与连接衬垫的高度I3之间的差值小于配线元件5的直径Df。这种限制使得在压紧后导电配线元件能够在自由区域的位置处夹紧在电连接衬垫7与槽的相对于所述连接衬垫7的顶部的侧壁9b之间。优选地,如以上所描述,分隔衬垫7的顶部与相对于所述衬垫7的侧壁9b的距离I7在压紧之前稍大于配线元件5的直径,以便于插入配线元件5。自然地,在压紧之后,第一元件8和第二元件8’优选通过最初形成连接元件6的所述材料而彼此固定。更具体地,连接元件的可变形层在两个元件8和8’之间变薄,而可变形材料的剩余厚度能够确保固定所述元件8和8’。剩余可变形层优选流动达到导电衬垫7以及存在于槽4a和4b中的配线元件。因此,配线元件5优选由所述可变形材料固定到芯片的第一元件8和第二元件8’的至少之一。如果配线元件5被上漆(enamelling)或者覆盖有聚合物绝缘层,则之前限定的高度差优选小于配线元件5的导电芯的直径。
根据图6中示出的电子芯片的第三实施例,两个元件8和8’分别具有在元件8和8’的边缘所在的位置处形成肩部的突起部10和10’。突起部10和10’的横向和纵向尺寸优选与连接元件6相似。在侧面3a和3b至少之一上,该芯片包括由两个相对侧壁9a和9b以及接合两个侧壁9a和9b的底部9c限定的槽4a,该两个相对侧壁9a和9b分别由第一元件8和第二元件8’面对的自由面形成,所述底部由第一元件8的突起部10、第二元件8’的突起部10’及连接元件6形成。换言之,分隔槽4a的两个侧壁9a和9b的距离I8等于连接元件6的高度I1加第一元件8的突起部10的高度I2加第二元件8’的突起部10’的高度I2’(I8=I1+I2+I2’)。在图6的示例中,芯片包括两个相对的槽4a和4b,且电连接衬垫7由第二元件8’支撑,第二元件8’包括例如连接到连接衬垫7的电子部件。
为了在压紧之后在衬垫7的顶部与相对于所述衬垫的侧壁(图7中的壁9b)之间的自由区域的位置处实现配线元件5的充分夹紧,优选第一元件8的突起部10的高度I2加第二元件8’的突起部10’的高度I’2加可变形材料层的剩余厚度大于每个连接衬垫7的高度I3,使得在压紧后配线元件的至少一部分可以被固定。而且,优选第一元件8的突起部10的高度I2加第二元件8’的突起部10’的高度I’2并加上可变形材料层压紧后的剩余厚度与连接衬垫的高度I3的差值小于配线元件5的直径Df。这种限制使导电配线元件能够在压紧后在自由面的位置处夹紧在电连接衬垫7与槽的相对于所述连接衬垫7的顶部的侧壁9b之间。衬垫7的顶部与相对于所述衬垫7的侧壁9b在压紧之前分隔开的距离I7优选稍大于配线元件5的直径Df,以便于配线元件5的插入。
自然地,如之前所描述,在压紧之后,第一元件8和第二元件8’优选通过最初形成连接元件6的所述材料而彼此固定。以相同的方式,配线元件5优选由所述可变形材料固定到芯片的第一元件8或第二元件8’的至少之一。如果配线元件5被上漆(enamelling)或者覆盖有聚合物绝缘层,则之前限定的高度差优选小于配线元件5的导电芯的直径。
图7和8示出用于在两个配线元件上装配如图5所示的包括两个槽4a和4b的芯片的方法。这些图图解了当通过沿箭头P1和P2的方向向芯片的两个相对的主表面1和2施加压力而进行压紧时,形成连接元件6的可变形材料层的变形。首先,配线元件5a和5b优选在相应的自由区域(分隔衬垫7的顶部与相对于衬垫的侧壁的区域)的位置处纵向地分别插入槽4a和4b中。然后,在第一元件8和第二元件8’的压紧步骤期间,连接元件6变形且配线元件5a和5b优选在每个连接衬垫7的顶部与相对于所述连接衬垫7的侧壁9b之间的自由区域的位置处机械地夹紧。在压紧期间,形成连接元件6的材料流动,以便填充每个纵向槽的至少一部分。在表示压紧后的芯片状态的图8中,构成连接元件6的可变形材料的量在流动后足以完全覆盖每个槽的配线元件5a和5b,由此使组件固定,而不需要进行的另外的接合步骤。相同的原理自然适用于不同的实施例。
衬垫7、7a和7b以及相关的配线元件5、5a和5b优选具有不同的硬度,使得当压缩发生时,延展性最差的材料使延展性最好的材料发生变形,这使得能够实现密切接触而有利于在电连接衬垫与相关的导电配线元件之间形成良好的电接触。通常,如果电连接衬垫由硬度大于配线元件的材料形成,则电连接衬垫会进入配线元件。于是,优选控制施加在第一元件8和第二元件8’上的压紧(图8中的箭头P1、P2),以不进入配线元件太多并防止配线元件被切割。在图7和8中,当衬垫7a(左槽)在衬垫的平行于支撑衬垫的侧壁的截面中的尺寸大于配线元件的直径时,优选连接衬垫7a在压紧之后进入配线元件5a的进入程度较小。例如,衬垫7a进入配线元件5a的深度对于直径范围从15μm到500μm的配线元件可以为1μm。该深度使得能够在电连接衬垫7a与配线元件5a之间获得充分密切的接触,以实现良好品质的导电连接。衬垫7a进入配线元件5a的深度优选不超过配线元件5a的直径的20%,使得当组件受压时,配线元件5a能够保持足够的抗断强度。
另一方面,在所述衬垫的平行于支撑所述衬垫的侧壁的截面中,如果衬垫(诸如,图7和8中右边的衬垫7b)具有比配线元件5b的直径小得多的尺寸,则该衬垫可以以针尖刺入的方式(pin-point manner)进入配线元件5b,例如超过配线元件5b的直径的40%到100%,而不存在使配线元件5b破裂的风险。以非限制性的方式,在该备选实施例中,衬垫7b的尺寸小于配线元件5b的直径的20%。
如图9所示,在夹紧和/或连接元件变形的位置处的应力可以通过添加在进行压紧时限制连接元件6变形的停止构件18(例如,单个停止件)而被控制,所述停止件优选制作在第一元件8和第二元件8’之一(图9中的第一元件8)的面对另一元件的表面上,使得当压紧发生时能够限制连接元件6的变形。在图9中,两个停止件18由沉没在连接元件6中的突出物表示,所述突出物的高度大于衬垫7a和7b的高度。这种类型的停止件自然可以添加在所描述的所有其他实施例中,具体地与图2至图6关联的实施例中。在包括突起部的实施例中,该突起部自身可以形成停止件。在压紧步骤期间,第一元件8和第二元件8’朝向彼此的移动由此被突出物所限制,以避免损坏配线元件5。这样的突出物也防止大量的可变形材料流动,这样的可变形材料的大量流动会有害于压紧后元件8和8’的固定质量。
根据图10和11示出的备选实施例,第一元件8包括突起部10,该突起部10的横向和纵向尺寸基本等于连接元件6的横向和纵向尺寸。如同图5的实施例,槽的底部9c由连接元件6和突起部10限定。芯片还包括引导构件19,例如突起部10,当压缩发生时用于保持第一元件8和第二元件8’彼此面对。没有这些引导构件19,第一元件8和第二元件8’事实上会移动而不再对准。在图10中,引导构件固定到第二元件8’,优选固定到连接元件6的每侧,并且引导构件为条形,当压缩发生时其能够引导突起部10。引导构件19优选具有大于连接元件6的高度I1的高度I10,当压缩发生时以便确保突起部10被正确地引导。引导构件19还可以具有大于突起部10的高度I2的高度I10,以形成限制连接元件6的压缩的停止件。
根据备选实施例,第一元件8和第二元件8’都是有源元件,即,它们都包括电子部件。例如,作为示例,在图10和11中,第一元件8可以包括电池(未示出),第二元件8’可以包括被设计为由电池供电的电子部件。这样,该电池必须连接到第二元件8’的电子部件。为此,第一元件8的突起部10可以包括第一电连接端子20a和20b,被设计为当压紧进行时且当第一元件8和第二元件8’朝着彼此移动时与位于第二元件8’上的第二电连接端子21a和21b电接触。引导构件19的存在优选能够使端子20a和20b保持为分别面对端子21a和21b。用于在两个元件上制造连接端子以及使这些端子接通的技术在J.Brun等发表于2006年5月22日到26日举办的“4th European Microelectronicsand Packaging Symposium”的论文“LOCALIZED MICRO-INSERTCONNECTIONS FOR SMART CARD SECURE MICRO PACKAGING”中被描述。
根据特定实施例,连接元件6的可变形材料是热固性聚合物、热塑性聚合物或易熔材料。
在每个配线元件5已经插入相应的槽中之后,热压缩被施加到芯片(图8),即,压力(在图8中由箭头P1和P2表示)被施加到两个主表面1和2,同时芯片由加热构件(未示出)加热。施加到主表面1和2的压力取决于连接元件6在给定温度下的变形特性。通常,为了软化例如由热固性材料或热塑性材料制成的连接元件,对于从80℃到260℃之间的温度,压力可以在5kg/cm2到30kg/cm2之间,这样的结果例如利用由Brewer Science出售的HT1010(热固性聚合物)制成的连接元件能够被获得。当发生热压缩时,连接元件6被软化或液化,并且构成所述连接元件的材料被部分地向外排出,使得其能够填充每个槽的全部或部分。在图8中,连接元件已经软化且第一元件8和第二元件8’的压缩已经使形成连接元件6的材料排出,从而几乎填满槽4a和4b。这样,导电配线元件5被机械地夹紧在电连接衬垫7的顶部与槽4的相对于所述衬垫的侧壁9b之间。最后,在使组件的状态能够被凝固的冷却阶段压力必须被保持。保持压力能够使电子芯片的状态被凝固并保持配线元件5与连接衬垫7之间的密切接触。自然地,如果芯片包括两个槽4a和4b,每个槽都提供有特有的连接衬垫7,则形成连接元件的材料优选电绝缘以防止不期望的衬垫之间的短路。
其中,在构成连接元件6的(热固性或热塑性)聚合物的量不足以填充槽或槽4a和4b的情况下,可以采用由聚合物覆盖的配线元件5(未示出),该聚合物优选具有与形成连接元件6的聚合物相同的特性。由此,在热压缩步骤期间,覆盖配线元件5的聚合物软化或变成粘滞性的。这样,覆盖配线元件5和连接元件6的热塑性材料或聚合物材料的和使槽或各槽4a和4b能够被填充。
连接元件6也可以由诸如铟或铅的易熔金属材料制成。因此,当芯片仅包括单个槽时可以采用铅。
之前描述的多个芯片可以通过配线元件彼此连接,这样,配线元件的导电芯能够构建芯片的共用数据总线或电源总线。
因此,组件可以包括含第一元件8和第二元件8’的微电子芯片,并且导电配线元件夹置在第一元件8与第二元件8’之间。组件还包括接触第一元件8、第二元件8’和配线元件的连接元件6,该连接元件6参与将配线元件固定到第一元件8和第二元件8’的至少之一。
大体上,用于制造多个芯片的方法可以包括如下步骤:
-制备包括多个有源区域的有源板13,每个有源区域包括至少一个电子部件,且每个有源区域可以在其边缘之一附近包括至少一个电连接衬垫7,换言之,有源区域可以包括电连接到所述相关的有源区域的电接触衬垫7;
-形成组件,该组件通过在有源板13上放置对向板11来构建并且在有源板13与对向板11之间插设有可变形材料以沿所述有源区域的边缘之一在每个有源区域的位置处形成腔,根据利用衬垫7的备选实施例,该腔能够沿容纳衬垫的边缘形成;
-将所述组件沿有源区域的边缘切割以形成芯片,该切割路线穿过所述腔以在切割之后获得多个芯片,该多个芯片的每个至少包括由连接元件6(该连接元件6由可变形材料形成)分隔的第一元件8和第二元件8’以及槽4a和4b,在所述芯片的一个表面的位置处该槽4a和4b由第一元件8、第二元件8’和连接元件6限定,所述电接触衬垫7布置在槽4a和4b中,并且当优选通过在第一元件8和第二元件8’的位置处进行压紧而使芯片压紧时在第一元件8和第二元件8’接触之前连接元件6的所述可变形材料能够流动到达衬垫7。
实际上,有源板可以是晶片,对向板也可以是晶片。
为了优化产量以实现图5所示类型的芯片,如图14所示,在对向板11被转移到有源板13之前,基本平行的沟槽12可以制作在对向板11上。然后,沟槽12形成由可变形材料和有源板预先限定的腔。
根据图12到14及图17到18示出的芯片制造方法的第一实施例,在制作沟槽之前,被设计为形成连接元件的材料层6’首先沉积在对向板11上(图12)。在沉积材料6’之后,每个芯片的连接元件6的位置被图案化(图13),例如通过光刻步骤以及之后通过退火的显影而被图案化。作为示例,对于沉积厚度为40μm的来自Shinu Etsu的SinR3170型聚合树脂层,通过在140℃下退火30分钟来进行显影。
然后,沟槽12(图14)制作在聚合物已经被去除的区域14(图13)的位置处。然后,对向板11被转移到包括电子部件的有源板13上(图17),使得连接元件6对准在每个有源区域上以限定一个或多个槽。在转移且确认对准之后,有源板13和对向板11被压向彼此,例如在200℃下用5巴的压力压5分钟。最后,在位于对向板11的沟槽12下面的腔的区域处切割芯片。
根据图14到18示出的制造方法的第二实施例,沟槽12首先被制作在对向板11中(图15)。然后,对向板11例如经由包括沟槽12的表面被浸入液态的热固性聚合物或热塑性聚合物中使得例如在分隔每个沟槽12的部分15的顶部处浸渍对向板11,从而形成材料6’。然后,在对向板11被转移到有源板13上使得连接元件6对准在每个有源区域上以限定每个芯片的一个或多个槽(图17)之前,该聚合物被干燥。在转移且确认对准之后,有源板13和对向板11被压向彼此,例如在200℃用5巴的压力压5分钟。最后,该芯片被切割(图18)以形成多个芯片。
根据图19中示出的制造方法的第三实施例,形成连接元件6的材料是在于对向板11中形成沟槽12之后布置在对向板11与有源板13之间的热塑性膜17。换言之,对向板11被转移到有源板13上从而夹置热塑性膜17。热塑性膜优选被拉紧,以形成相互密合的有源板13/热塑性膜17/对向板11组件,而防止热塑性膜呈现出褶皱。在此备选实施例中,当芯片被切割时,如图19所示,膜17的一部分16在每个槽中保持为不移动。当配线元件5被插入时膜17的部分16可以被机械地驱逐到槽4的底部并在热压缩步骤期间能够熔化。对应于膜17的部分16的额外聚合物由此可以起作用以确保热压缩步骤期间槽4的均匀填充。
根据该方法的第三实施例的变型,热塑性膜17可以通过离心法沉积在有源板上(图20)。于是,热塑性膜17覆盖每个连接衬垫7,当配线元件被插入时或者在热压缩步骤期间该覆盖能够被机械地去除。
所描述的电子芯片和其装配方法能够限制芯片的设计约束条件,使得装配方法不再必须与对应于槽尺寸的预定尺寸的配线元件相关联。连接衬垫与配线元件之间的接触由此被极大地改善。
此外,每个槽可以包括多个衬垫,该多个衬垫的至少一个是导电的。不导电衬垫或不连接到电子部件的衬垫可以提供在每个槽中。这样的衬垫于是能够增强配线元件在槽中的固定。
由于具有小的尺寸,所描述的芯片可以集成到衣服中,以形成智能织物。
作为示例,第一元件8和第二元件8’的厚度可以为约200μm,且芯片的横向尺寸可以小于5mm。
在需要在芯片与配线元件之间制成一个或多个电连接的情况下,一个或多个电连接衬垫可以如专利申请FR0805832和专利申请PCT/FR2008/1476中所描述地被提供。如之前所描述的,除了他们的电气功能之外,这样的衬垫能够使配线元件更好地固定在槽中。然而,如果芯片电子不适合于利用配线元件电连接,则它们的存在是非绝对必要的。即使在槽中没有衬垫,正如以上所描述的,本发明的方法也能通过机械夹紧而有利地确保配线元件良好地固定在槽中。此外,如之前所描述的,可以使得连接元件流动而到达配线元件,从而连接元件参与将配线元件固定在槽中。
Claims (18)
1.一种配线元件与电子芯片的装配方法,包括以下步骤:
将所述配线元件布置在由第一元件(8)和第二元件(8’)限定的所述芯片的槽(4a,4b)中,该第一元件(8)和第二元件(8’)由包括可塑性变形的材料的连接元件(6)连接;以及
压紧所述第一元件(8)和所述第二元件(8’)以使所述连接元件(6)变形直到将所述配线元件固定在所述槽中。
2.根据权利要求1所述的方法,其特征在于:在压紧步骤之后,该方法包括释放压紧的步骤且在所述释放压紧的步骤之后所述连接元件(6)仍处于变形状态。
3.根据权利要求1和2之一所述的方法,其特征在于:通过将所述配线元件(5)机械地夹紧在所述第一元件(8)与所述第二元件(8’)之间来将所述配线元件(5)固定在所述槽中。
4.根据权利要求1和2之一所述的方法,其特征在于:通过使所述连接元件(6)变形直到所述连接元件(6)接触所述配线元件(5)来进行将所述配线元件(5)固定在所述槽中。
5.根据权利要求1所述的方法,其特征在于:所述连接元件(6)由热塑性材料或热固性材料制成,所述压紧为利用5kg/cm2到30kg/cm2的压力在80℃到260℃的温度下进行的热压缩,且在冷却阶段保持该压力以使组件凝固。
6.一种电子芯片,包括:
第一元件(8)和第二元件(8’);
连接元件(6),分隔所述第一元件(8)和所述第二元件(8’);
槽(4a,4b),两端敞开,且由所述第一元件(8)、所述第二元件(8’)和所述连接元件(6)限定;以及
电接触衬垫(7),布置在所述槽中,
所述芯片的特征在于:所述连接元件(6)包括通过在所述第一元件(8)和所述第二元件(8’)的位置处进行压紧而可塑性变形的材料,且当进行压紧时在所述第一元件(8)和所述第二元件(8’)接触之前该材料能够流动而到达所述衬垫(7)。
7.根据权利要求6所述的芯片,其特征在于:该芯片包括当进行压紧时限制所述连接元件(6)变形的停止件(18)。
8.根据权利要求7所述的芯片,其特征在于:限制所述连接元件(6)变形的所述停止件布置在所述第一元件(8)的面对所述第二元件(8’)的表面上。
9.根据权利要求6所述的芯片,其特征在于:所述第一元件(8)包括突起部(10),该突起部(10)与所述连接元件(6)一起形成所述槽(4a)的底部(9c)。
10.根据权利要求9所述的芯片,其特征在于:所述第二元件(8’)包括所述突起部(10)的引导构件(19)。
11.根据权利要求7和10之一所述的芯片,其特征在于:所述停止件由所述突起部(10)或所述引导构件(19)形成。
12.根据权利要求6到10之一所述的芯片,其特征在于:所述连接元件(6)由热塑性聚合物、热固性聚合物材料或易熔材料制成。
13.一种多个芯片的制造方法,其特征在于包括以下步骤:
制备包括多个有源区域的有源板(13),每个所述有源区域包括至少一个电子部件以及连接到相关的所述有源区域的电接触衬垫(7);
形成一组件,该组件由在所述有源板(13)上放置对向板(11)而形成并且在所述有源板(13)与所述对向板(11)之间插设有可变形材料以沿所述有源区域的边缘之一在每个所述有源区域的位置处形成腔;
将所述组件沿所述有源区域的边缘切割以形成多个芯片,该切割路线穿过所述腔以在切割之后获得多个芯片,所述多个芯片的每个至少包括由连接元件(6)分隔的第一元件(8)和第二元件(8’)以及槽(4a,4b),所述连接元件(6)由所述可变形材料形成,且在所述芯片的一个表面的位置处所述槽由所述第一元件(8)、所述第二元件(8’)和所述连接元件(6)限定,所述电接触衬垫(7)布置在所述槽(4a,4b)中且当压紧所述芯片时在所述第一元件(8)和所述第二元件(8’)接触之前所述连接元件(6)的所述可变形材料能够流动到达所述衬垫(7)。
14.根据权利要求13所述的方法,其特征在于:所述方法包括在将所述对向板(11)转移到所述有源板(13)上之前在所述对向板(11)中形成基本平行的多个沟槽(12)的步骤。
15.根据权利要求14所述的方法,其特征在于:在形成所述沟槽(12)之前,形成所述连接元件(6)的材料沉积在所述对向板(11)上。
16.根据权利要求14所述的方法,其特征在于:在已经形成所述沟槽(12)之后,所述对向板(11)被液态的热固性聚合物或热塑性聚合物浸渍,然后在所述对向板(11)被转移到所述有源板(13)上之前干燥所述聚合物。
17.根据权利要求14所述的方法,其特征在于:形成所述连接元件(6)的材料是在所述沟槽(12)已经形成在所述对向板(11)中之后布置在所述对向板(11)与所述有源板(13)之间的热塑性膜。
18.一种组件,包括:
微电子芯片,包括第一元件(8)和第二元件(8’);
导电的配线元件(5),夹置在所述第一元件(8)与所述第二元件(8’)之间;以及
连接元件(6),接触所述第一元件(8)、所述第二元件(8’)和所述配线元件(5),所述连接元件(6)具有将所述配线元件固定到所述第一元件(8)和所述第二元件(8’)至少之一的作用。
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CN110326100A (zh) * | 2017-01-30 | 2019-10-11 | 普利莫1D公司 | 用于将配线插入到半导体芯片的沟槽中的方法以及用于实现该方法的设备 |
CN110326100B (zh) * | 2017-01-30 | 2023-08-15 | 普利莫1D公司 | 用于将配线插入到半导体芯片的沟槽中的方法以及用于实现该方法的设备 |
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Publication number | Publication date |
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JP2011135083A (ja) | 2011-07-07 |
EP2339618A3 (fr) | 2012-10-17 |
FR2954588B1 (fr) | 2014-07-25 |
US20110149540A1 (en) | 2011-06-23 |
EP2339618A2 (fr) | 2011-06-29 |
JP2015213194A (ja) | 2015-11-26 |
CN102110677B (zh) | 2016-03-30 |
JP5885921B2 (ja) | 2016-03-16 |
US8654540B2 (en) | 2014-02-18 |
EP2339618B1 (fr) | 2018-12-19 |
FR2954588A1 (fr) | 2011-06-24 |
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