CN102105979A - 堆叠集成电路的腐蚀控制 - Google Patents
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Abstract
一种防止腐蚀性元素(或至少氧化剂)与堆叠IC装置(10)的两个层之间的界面处的金属连接接触的系统和方法。当层被定位成靠近彼此时,在所述层的平坦表面的边界处形成空穴。此空穴由所述层之间的周边密封件(110/113)界定。在一个实施例中,在所述空穴内产生真空,借此减少所述空穴内的腐蚀性气氛。在另一实施例中,用惰性气体(例如氩气)填充所述空穴。一旦减少所述空穴中的氧化元素,就可囊封所述周边密封件(110/113)以防止污染物渗漏入所述空穴。
Description
技术领域
本发明涉及集成电路(IC),且更特定来说涉及多层IC,且更加特定来说涉及用于控制层之间的腐蚀的系统和方法。
背景技术
IC技术中需要将芯片(裸片)堆叠在一起以形成多层(3-D)IC装置。一种形成3-D装置的方法是将两个(或两个以上)层集中到一起且接着将所述层囊封入单一结构中。相应层的表面上的电导体和/或接触件用于在不同层上的电路之间载运电信号。这些导体/接触件极小,直径约为几微米,且在暴露于腐蚀性气氛时将相对快速地腐蚀。腐蚀接着干扰3D装置的信号处理能力。
腐蚀由两个裸片(当将其靠在一起时)之间产生的小间隙引起。在这些间隙内可捕集例如水和氧等腐蚀性材料。此经捕集的腐蚀性材料接着与金属导体/接触件相互作用,从而产生可靠性问题。
一种解决方法是用填充剂材料填充“间隙”。因为间隙大小并非恒定,所以填充剂的量也非恒定。因此,难以完全填充间隙。另一方面,使用过多填充剂将增加所得3-D装置的大小,借此改变形状因数。
另一解决方法是消除间隙或使其极小。为了实现此目的,相应裸片的表面将必须极其平坦,借此增加装置成本以及处理裸片的成本。
一额外问题是层之间捕集的气体在温度增加或外部压力减少期间膨胀。膨胀的气体对经结合层体施加分离压力。
发明内容
本发明针对用于防止腐蚀性元素(例如,氧化剂)与堆叠IC装置的两个层之间的界面处的金属连接接触的系统和方法。当层被定位成靠近彼此时,在所述层的平坦表面的边界处形成空穴。此空穴由层之间的周边密封件界定。在一个实施例中,在空穴内产生真空,借此消除或减少空穴内的腐蚀性气氛。在另一实施例中,用非氧化气体(例如氩气)填充空穴。一旦空穴不含氧化元素,就可囊封周边密封件以防止污染物渗漏入空穴且防止密封件本身的腐蚀。
前文已颇为广泛地概述本发明的特征和技术优点以便可更好地理解随后的本发明的详述。在下文中将描述形成本发明的权利要求书的标的的额外特征和优点。所属领域的技术人员应了解,所揭示的概念和特定实施例可易于用作修改或设计其它用于实行本发明的相同目的的结构的基础。所属领域的技术人员还应认识到,此类等效构造并未偏离在所附权利要求书中陈述的本发明的精神和范围。当结合附图考虑时,从以下描述将更好地理解据信表现本发明特性的新颖特征(关于其组织和操作方法两者)以及其它目的和优点。然而应明确地了解,仅出于说明和描述的目的而提供各图的每一者,且其并非希望作为对本发明的限制的界定。
附图说明
为了更全面地理解本发明,现结合附图考虑来参考以下描述,附图中:
图1A到1C展示根据本发明的实施例的多层IC装置的实例和制造所述多层IC装置的示范性工艺;
图2展示根据本发明的实施例的一个替代性堆叠IC装置;
图3展示根据本发明的实施例的裸片到晶片堆叠的一个实施例;
图4展示根据本发明的实施例的一个替代性实施例,其中在环境受控腔室中结合多层IC装置;以及
图5展示根据本发明的实施例的用于控制多层IC装置的层之间的腐蚀的方法的一个实施例。
具体实施方式
现转向图1A,展示包含顶部裸片11和底部裸片12的堆叠IC装置10。顶部裸片11具有作用层101和衬底层102。底部裸片12具有作用层103和衬底层104。图1A展示被靠在一起以用于结合目的之前经定位的顶部裸片和底部裸片。在此实施例中,衬底层102将结合到作用层103且因此此为“背面对正面”结合布置。如将论述,“正面对正面”、“背面对背面”、“正面对背面”或“背面对正面”组合的任一布置可使用本文中论述的概念以形成分层半导体组件。
图1A-1C描绘两层堆叠IC装置,然而堆叠IC装置可包含更多层。衬底层102含有连接(元件)112,其用于将层101上的组件111(或端子)连接到层103上的作用组件115(或端子)。当使层102和103的平坦表面靠在一起时,使用连接器路径112产生这些连接,所述连接器路径112接着与层103的平坦表面上的衬垫114配对。在顶部裸片11和底部裸片12的周边周围分别形成有元件110和113,元件110和113将在使所述层配对时合在一起以形成密封件(如将可见)。在所展示的实施例中,密封件110和113为金属,但可包含其它材料。
图1B展示裸片11和12合在一起,且在由周边配对元件110/113所界定的区域内形成一个或一个以上间隙120。元件110/113合在一起以形成周边周围的密封件。应注意,现在从组件111到组件115存在使用连接器元件112和114的电连接。
一旦元件被适当对准,就可在环境受控腔室中选择性地建立新气氛,使得新气氛与在不采取气氛干预措施的情况下通常将会形成的气氛(例如,环境气氛)不同。举例来说,普通气氛可含有水、其它蒸气和/或可引起腐蚀的其它气体,而腐蚀又将会对IC装置的正常操作造成干扰。
如将论述,在此实例中,可(例如)使用泵(未展示)来降低环境受控腔室中的大气压力,和/或用惰性气体或非氧气体实质上置换环境受控腔室内的气氛来建立在环境受控腔室内建立的选择性建立的非腐蚀性环境。所建立的气氛经设计以驱除氧、水和/或其它氧化剂,借此减少腐蚀。一旦建立适当环境,就将裸片压缩在一起且结合,优选地在空气中大于摄氏150度的温度下进行,使得间隙120中存在适当环境。
应注意,可通过使用一个或一个以上泵来建立低压。替代于降低压力或除降低压力以外,这些泵还可用以将所要环境(例如氩气或氮气)注入到环境受控腔室中。所述低压可低到所要水平,甚至达到实质上建立真空的程度。
还应注意,在一些情形中可能需要在层之间建立一个以上间隙,且相对于不同间隙建立不同环境。可通过在需要成为独立间隙的部分周围放置配对元件110/113来建立间隙。因此,可相对于一些间隙建立低压,且在相同堆叠IC装置内的其它间隙中建立不同环境。这些不同环境可在相同层之间和/或在不同层之间。
图1C展示在密封件110/113外部添加保护层140。可(例如)通过等离子增强化学气相沉积(PCVD)添加此保护层,以帮助防止经密封空穴内的环境与普通环境中所见的腐蚀性元素(例如水或氧)接触。层140可为绝缘层,例如亚硝酸硅或氧化硅。(如果需要)薄膜140可完全围绕堆叠IC装置的外部沉积而非仅在密封环110/113上沉积,如图1C所示。此层140的功能为在密封环110/113与其外部环境之间形成障壁。因为金属密封件110/113不太可能足够紧密地围绕全部周边以形成无任何渗漏的完美密封结合,所以建立保护层140。此外,如果密封件110/113由金属形成,那么密封件110/113可能被腐蚀。
图2展示具有裸片21和22的一个替代性堆叠IC装置布置20,其中层中的至少两者的“正面”202、203以“正面对正面”关系结合。这与图1A到1C中展示的“背面对正面”结合相反。在图2中,堆叠IC装置20具有层间电接触件212、213以及通道210(如果需要)以提供到外部组件的连接性。应注意,在此实施例中,层之间的金属周边密封环由部分214和215构成。当然,可使用任何组合和任何数目的层。
可使用裸片对裸片堆叠、裸片对晶片堆叠和(在一些情形中)晶片对晶片堆叠实现本文中论述的概念。图3展示其中裸片30-1与裸片31-1配对的裸片对晶片堆叠,裸片31-1仍为晶片300的一部分。裸片30-1与裸片31-1可具有不同大小。这可使用结合到位于晶片300上的裸片31-1到31-N中的任一者的任何数目的其它裸片(未展示)来循序地或并行地重复。可接着关于一个裸片对或关于所有裸片对进行囊封(图3中未展示)以提供保护性外部密封件。可接着从晶片300分离裸片31-1到31-N以形成个别堆叠IC装置。
图4展示一个替代性实施例,其中在环境受控腔室中结合多层IC装置。如图所示,裸片40与裸片41结合地定位以在腔室401内形成堆叠IC装置400。裸片40和41经适当对准且接着环境控制402使用环42和43在层之间的周边周围形成密封而建立适当环境。此环境(例如)可为低压(包括真空,如果需要)或所述环境可为气体,例如氮气或氩气,或者防止或减少配对层之间的空穴内的腐蚀或其它不当效应的任何其它物质或物质的组合。在需要改进的导热性的情形中,氩气为优选气体。压力优选应低于1atm。
优选将堆叠IC装置400加热到130C到400C的温度,使得当堆叠IC装置400冷却时,层体之间的间隙处在比大气压力低的压力下。在加热的同时,可接着使用压缩热结合来结合裸片40和41。一旦层被结合,就可在整个堆叠IC装置400上沉积保护膜(未图示),或如果需要,仅在层间密封环42/43周围沉积保护膜。应注意,由在结合前加热所述层引起的空穴内的减小的压力起促进将所述层固持在一起的作用。此外,如果温度上升,那么空穴内的压力将不足以将层推离开。
图5展示用于控制多层IC装置的层之间的腐蚀的方法的一个实施例50。块501控制一个或一个以上裸片相对于第二裸片(或晶片)的定位。当块502确定定位完成,使得建立周边密封件(例如,图2中的214/215)时,块503以若干方法中的任一种方法(例如以上所论述的方法)或以其它方式在裸片之间建立受控环境。
块503和504重复直到块504确定已建立适当环境为止,在块504确定已建立适当环境的情况下块505将裸片结合在一起。如果需要,块506如上文所论述在所建立的密封件外部添加保护障壁。
尽管块501和502被展示为在块503和504之前,但预期块503和504可发生于块501和502之前。应了解,尽管密封件被展示为在周边周围,但密封件可仅在某些元件周围,且可在两个层之间形成一个以上密封区域。
虽然已详细地描述本发明及其优点,但应理解,可在不偏离由所附权利要求书所界定的本发明的精神和范围的前提下在本文中进行各种改变、替代和变更。此外,本申请案的范围并非希望限于说明书中所描述的过程、机器、制造、物质组成、手段、方法和步骤的特定实施例。如所属领域的一般技术人员将易于从本发明了解,可根据本发明利用当前现有或日后将开发的执行与本文所描述的相应实施例实质上相同的功能或实现实质上相同结果的过程、机器、制造、物质组成、手段、方法或步骤。因此,所附权利要求书希望在其范围内包括此类过程、机器、制造、物质组成、手段、方法或步骤。
Claims (27)
1.一种分层半导体装置,其包含:
第一和第二层体,其沿所述层体的平坦表面彼此结合,所述层体中的每一者包含至少一个作用元件;以及
环境密封件,其围绕所述平坦表面中的经结合者的周边边缘。
2.根据权利要求1所述的结构,其进一步包含在由所述密封件界定的区域内的所述经结合平坦表面之间的实质上非腐蚀性环境。
3.根据权利要求2所述的结构,其中所述实质上非腐蚀性环境包含惰性气体。
4.根据权利要求2所述的结构,其中所述实质上非腐蚀性环境包含降低的大气压力。
5.根据权利要求2所述的结构,其进一步包含:
形成于所述密封件的外部边缘上的环境保护遮罩。
6.根据权利要求5所述的结构,其中所述保护遮罩使用保形PECVD(等离子增强化学气相沉积)膜来建立。
7.根据权利要求2所述的结构,其中所述层体为裸片。
8.根据权利要求2所述的结构,其中所述第一层体为裸片且所述第二层体为晶片。
9.一种用于建构分层半导体装置的方法,所述方法包含:
将所述半导体装置的相邻层体的平坦表面靠在一起以用于结合;
在所述相邻层体的所述平坦表面之间建立受控环境;以及
在结合所述平坦表面后,维持所述受控环境。
10.根据权利要求9所述的方法,其中所述建立包含:
建立低大气压力。
11.根据权利要求9所述的方法,其中所述维持包含:
在结合所述平坦表面之前,提供由驻留于所述平坦表面中的每一者上的材料所建构的至少一个周边密封件。
12.根据权利要求11所述的方法,其中所述维持进一步包含:
在所述周边密封件的外部边缘上沉积保护膜。
13.根据权利要求9所述的方法,其中所述建立包含:
在所述平坦表面之间添加非氧气体。
14.根据权利要求13所述的方法,其中所述气体选自以下各物的列表:氩气、氮气和合成气体。
15.一种堆叠IC装置,其包含:
上面具有IC元件的第一裸片;所述第一裸片具有至少一个表面,所述元件形成于所述至少一个表面处;
上面具有IC元件的第二裸片,所述第二裸片具有至少一个表面,所述元件形成于所述至少一个表面处;
形成于所述裸片中的每一者的所述表面上的至少一个密封元件;且其中
所述裸片的所述表面结合在一起,使得将所述密封元件靠在一起以密封所述IC元件中的至少一些IC元件周围的环境。
16.根据权利要求15所述的堆叠IC装置,其进一步包含:
在所述密封环境内的选择性建立的气氛。
17.根据权利要求16所述的堆叠IC装置,其中所述所建立的气氛是对环境气氛的修改。
18.根据权利要求16所述的堆叠IC装置,其中所述选择性建立的环境选自以下各物的列表:低大气压力,和非氧气体。
19.根据权利要求16所述的堆叠IC装置,其进一步包含:
囊封材料,其相对于所述密封元件定位以便维持所述密封元件内的所述所建立的环境。
20.根据权利要求17所述的堆叠IC装置,其中所述密封元件包含位于所述密封环境的圆周周围的金属部分。
21.一种建构堆叠IC装置的方法,所述方法包含:
相对于第二裸片定位第一裸片;
在所述第一裸片的平坦表面与所述第二裸片的平坦表面之间建立受控环境;以及
结合所述第一与第二裸片以形成所述堆叠IC装置。
22.根据权利要求21所述的方法,其进一步包含:
对所述经结合的堆叠IC装置添加环境障壁。
23.根据权利要求22所述的方法,其中所述建立包含:
通过建构于所述裸片上的配对元件而在所述相应平坦表面之间建立密封空穴。
24.根据权利要求23所述的方法,其中所述建立进一步包含:
降低所述密封空穴内的大气压力。
25.根据权利要求23所述的方法,其中所述建立进一步包含:
在所述密封空穴内注入非氧气体。
26.根据权利要求23所述的方法,其中所述结合包含:
在将所述第一与第二裸片压缩在一起的同时,升高所述裸片的温度。
27.根据权利要求21所述的方法,其中将所述第二裸片包含于其上具有多个裸片的晶片上。
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2008
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2009
- 2009-08-14 CN CN200980129048XA patent/CN102105979A/zh active Pending
- 2009-08-14 TW TW098127471A patent/TW201021193A/zh unknown
- 2009-08-14 KR KR1020117006044A patent/KR101191229B1/ko active IP Right Grant
- 2009-08-14 JP JP2011523197A patent/JP2012500477A/ja active Pending
- 2009-08-14 EP EP09791539A patent/EP2327092A1/en not_active Withdrawn
- 2009-08-14 CN CN201510640174.9A patent/CN105206603A/zh active Pending
- 2009-08-14 WO PCT/US2009/053895 patent/WO2010019889A1/en active Application Filing
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2013
- 2013-02-25 JP JP2013034604A patent/JP5619934B2/ja active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US11715725B2 (en) | 2017-02-24 | 2023-08-01 | Micron Technology, Inc. | Semiconductor device assemblies with electrically functional heat transfer structures |
CN110663111A (zh) * | 2017-06-13 | 2020-01-07 | 美光科技公司 | 具有包含电路元件的盖子的半导体装置组合件 |
CN110663111B (zh) * | 2017-06-13 | 2023-05-12 | 美光科技公司 | 具有包含电路元件的盖子的半导体装置组合件 |
Also Published As
Publication number | Publication date |
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TW201021193A (en) | 2010-06-01 |
CN105206603A (zh) | 2015-12-30 |
EP2327092A1 (en) | 2011-06-01 |
WO2010019889A1 (en) | 2010-02-18 |
US20100038801A1 (en) | 2010-02-18 |
KR20110050518A (ko) | 2011-05-13 |
KR101191229B1 (ko) | 2012-10-15 |
JP2012500477A (ja) | 2012-01-05 |
JP5619934B2 (ja) | 2014-11-05 |
JP2013138239A (ja) | 2013-07-11 |
US8618670B2 (en) | 2013-12-31 |
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