CN102067236B - 在快闪存储器装置上存储数据的方法 - Google Patents

在快闪存储器装置上存储数据的方法 Download PDF

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Publication number
CN102067236B
CN102067236B CN200980122329.2A CN200980122329A CN102067236B CN 102067236 B CN102067236 B CN 102067236B CN 200980122329 A CN200980122329 A CN 200980122329A CN 102067236 B CN102067236 B CN 102067236B
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word lines
word line
data
top edge
memory cells
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CN102067236A (zh
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韩真晚
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Micron Technology Inc
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Micron Technology Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CN200980122329.2A 2008-06-12 2009-05-22 在快闪存储器装置上存储数据的方法 Active CN102067236B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/138,137 US7949821B2 (en) 2008-06-12 2008-06-12 Method of storing data on a flash memory device
US12/138,137 2008-06-12
PCT/US2009/045081 WO2009151933A2 (en) 2008-06-12 2009-05-22 Method of storing data on a flash memory device

Publications (2)

Publication Number Publication Date
CN102067236A CN102067236A (zh) 2011-05-18
CN102067236B true CN102067236B (zh) 2014-01-08

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US (4) US7949821B2 (enExample)
EP (1) EP2308052B1 (enExample)
JP (1) JP5453660B2 (enExample)
KR (1) KR101396641B1 (enExample)
CN (1) CN102067236B (enExample)
TW (1) TWI530952B (enExample)
WO (1) WO2009151933A2 (enExample)

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US9378831B2 (en) 2010-02-09 2016-06-28 Samsung Electronics Co., Ltd. Nonvolatile memory devices, operating methods thereof and memory systems including the same
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KR20170073944A (ko) * 2015-12-21 2017-06-29 에스케이하이닉스 주식회사 데이터 처리 시스템 및 데이터 처리 시스템의 동작방법
US11086790B2 (en) 2017-08-25 2021-08-10 Micron Technology, Inc. Methods of memory address verification and memory devices employing the same
US10261914B2 (en) * 2017-08-25 2019-04-16 Micron Technology, Inc. Methods of memory address verification and memory devices employing the same
US11232841B2 (en) 2017-09-05 2022-01-25 Samsung Electronics Co., Ltd. Methods of operating memory devices based on sub-block positions and related memory system
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Also Published As

Publication number Publication date
JP5453660B2 (ja) 2014-03-26
US7949821B2 (en) 2011-05-24
CN102067236A (zh) 2011-05-18
EP2308052A2 (en) 2011-04-13
KR20110020296A (ko) 2011-03-02
KR101396641B1 (ko) 2014-05-16
US20110213918A1 (en) 2011-09-01
US20140063954A1 (en) 2014-03-06
JP2011524063A (ja) 2011-08-25
WO2009151933A3 (en) 2010-02-25
US20090313419A1 (en) 2009-12-17
TW201003658A (en) 2010-01-16
TWI530952B (zh) 2016-04-21
US8230165B2 (en) 2012-07-24
WO2009151933A2 (en) 2009-12-17
US8595423B2 (en) 2013-11-26
EP2308052A4 (en) 2011-08-31
US20120275230A1 (en) 2012-11-01
US9230658B2 (en) 2016-01-05
EP2308052B1 (en) 2018-08-22

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