CN101814480B - 一种芯片封装结构及其封装方法 - Google Patents

一种芯片封装结构及其封装方法 Download PDF

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CN101814480B
CN101814480B CN2010101533147A CN201010153314A CN101814480B CN 101814480 B CN101814480 B CN 101814480B CN 2010101533147 A CN2010101533147 A CN 2010101533147A CN 201010153314 A CN201010153314 A CN 201010153314A CN 101814480 B CN101814480 B CN 101814480B
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chip
bonding wire
lead frame
weld pad
contact pad
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CN101814480A (zh
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谭小春
陈伟
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Hangzhou Silergy Semiconductor Technology Ltd
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Hangzhou Silergy Semiconductor Technology Ltd
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Priority to US12/928,986 priority patent/US8294256B2/en
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Priority to US13/588,254 priority patent/US8866283B2/en
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Abstract

本发明涉及一种芯片封装结构及其封装方法，其包括至少一个芯片，其中每一芯片上均具有多个第一接触焊垫和第二接触焊垫；一引线框架，包括具有用于向外部连接的多个引脚，并且所述芯片配置与所述引线框架上；一组第一接合引线，用以将所述第一接触焊垫直接电性连接至所述引线框架；一组第二接合引线，用以将第二接触焊垫电性连接至所述引线框架的多个引脚；本发明可以方便的实现低损耗、易散热的芯片，并且减小了芯片的封装尺寸，利于芯片的功能扩展。

Description

一种芯片封装结构及其封装方法
技术领域
本发明涉及一种芯片封装结构及其封装方法，属于半导体元件及其制造方法。
背景技术
在半导体产业中，集成电路的生产主要可分为三个阶段：集成电路的设计、集成电路的制作以及集成电路的封装。在集成电路的制作中，芯片由晶圆制作、形成集成电路以及切割晶圆等步骤完成。当晶圆内部的集成电路完成之后，再在晶圆上配置有多个焊垫，以使最终由晶圆切割所形成的芯片可经由这些焊垫而向外电连接于一承载器。承载器例如为一引线框架或者一封装基板。芯片可以打线接合或者覆晶接合的方式连接至承载器上，使得芯片的这些焊垫可电连接于承载器的接点，以构成一芯片封装结构。
以引线框架为芯片承载件的半导体封装件，例如四方扁平式半导体封装件或者四方扁平无管脚式半导体封装件等，其制作方式均是在一具有载片台及多个引脚的引线框架上粘置该半导体芯片，并且通过多条接合引线电连接所述芯片表面上的接触焊垫和与其对应的多个引脚，然后以封装胶体包覆所述芯片以及接合引线而形成一半导体封装件。
由于封装件上芯片集成度的提高，为了保证电性品质和减少噪声，在进行封装件的结构设计时，通常必须使芯片具有接地(GND)和电源(IN)功能以及开关信号功能(LX)，使其符合电性要求。
现有技术中，通常是利用多条引线分别将引线框架的接地引脚、电源引脚、开关引脚对应的连接到芯片上的的接地焊垫、电源焊垫和开关信号焊垫。
以单片芯片的封装结构为例，图1A所示为现有一种芯片封装结构的俯视示意图，其包括一芯片101、一引线框架103以及多条引线。芯片101配置于所述引线框架的载片台104上，多条引线106跨越所述载片台104将芯片101上的接触焊垫102电连接至所述引线框架103的相应的外接引脚105上。以图1A所示的芯片封装结构为例，芯片101上的具有相同电位的一组接地焊垫和一组电源焊垫，以及开关信号焊垫均通过接合引线106直接连接至引线框架103上的对应引脚105。显然，采用这种芯片封装结构，增加了接地引线的长度，即增加了引线电阻，使得芯片101的功率损耗增加。对于某些应用场合，由于芯片101上的接触焊垫102以及引线框架103上的引脚105排列，使得接合引线106不可避免的会有相互交叉的情况，进一步增加了引线连接的复杂性，并且各引线相互之间的干扰增加，使得芯片工作可靠性和稳定性下降，并且芯片制程需要的硅片面积也较大。
如图1B所示，如果需要对芯片101的功能进行扩展，则需要在原有芯片的基础上重新进行电路设计以及布局，接触焊垫102和接合引线106的排布会更加复杂，也需要增加较大面积的硅片。
发明内容
本发明的目的在于克服现有技术存在的不足，而提出一种新的芯片封装结构及其封装方法，它根据芯片接触焊垫的类型采用不同的连接方式，以解决芯片损耗大、散热难，接合引线过多以及封装芯片功能扩展的局限问题。
本发明的目的是通过如下技术方案来完成的，一种芯片封装结构，包括：
芯片，所述芯片上具有多个第一接触焊垫和第二接触焊垫；
一引线框架，包括具有用于向外部连接的多个引脚，并且所述芯片配置于所述引线框架上；
一组第一接合引线，用以将所述第一接触焊垫直接电连接至所述引线框架的载片台；
一组第二接合引线，用以将第二接触焊垫电连接至所述引线框架的多个引脚。
所述第一接触焊垫为具有相同电位的接地焊垫，所述一组第一接合引线为接地接合引线，所述第二接触焊垫包括一组电位变化的开关信号焊垫和具有相同电位的电源焊垫，与开关信号焊垫连接的第一部分第二接合引线为开关信号接合引线，与电源焊垫连接的第二部分第二接合引线为电源接合引线。
所述开关信号接合引线和接地接合引线设置在所述引线框架的同一侧，并将电源接合引线设置在所述引线框架的相对的另一侧。
所述信号接合引线和接地接合引线呈交错排列布置。
本发明还包括有一用以包覆所述芯片以及焊垫的封装体，所述引线框架暴露于所述封装体外。
一种芯片封装方法，包括以下步骤：
步骤(1)：提供至少一个需进行封装的芯片，所述芯片上具有第一接触焊垫和第二接触焊垫；
步骤(2)：提供一引线框架，其上具有提供向外部连接的多个引脚；
步骤(3)：将所述芯片相应地安装在所述引线框架上；
步骤(4)：提供一组第一接合引线，以将第一接触焊垫直接电连接至所述引线框架的载片台；
步骤(5)：提供一组第二接合引线，以将第二接触焊垫直接电连接至所述引线框的多个引脚。
所述步骤(4)中，第一接触焊垫为具有相同电位的接地焊垫，所述第一接合引线为接地接合引线；所述步骤(5)中，与所述一组第二接合引线连接的第二接触焊垫，包括一组电位变化的开关信号焊垫和具有相同电位的电源焊垫，与开关信号焊垫连接的部分第二接合引线为信号接合引线，与电源焊垫连接的部分第二接合引线为电源接合引线。
本发明进一步包括：将所述开关信号接合引线和接地接合引线设置在所述引线框架的同一侧，并将电源接合引线设置在所述引线框架的相对的另一侧。
本发明进一步包括，将所述信号接合引线和接地接合引线呈交错排列布置。
本发明进一步包括：设置一封装体，用以包覆所述芯片以及焊垫，并将所述引线框架暴露于所述封装体外。
采用本发明优选实施例的芯片封装结构以及封装方法，可以方便的实现：
(1)对具有相同电位的接地接触焊垫采用直接连接至引线框架的连接方式，减小了接地引线的长度，即减小了引线电阻，从而降低了功率损耗；芯片的接地引线直接连接至引线框架，减小了接地引线和引线框架上的载片台之间的间隙，使得散热效果较好；另外，采用这种方式，热量可以直接经由接地引线直接传递到引线框架上，因此热阻较小，散热好；
对于电源管理类芯片，通常采用外接电容、电阻的方式来设置芯片的工作频率，采用本发明实施例所述的封装结构，则外接电容可以直接连接在电源引脚和引线框架的接地回路，保证了电容回路最小，连线最短，因此由连线引起的走线电感最小，增加了芯片的工作稳定性和可靠性，减小了芯片承受的应力，也使得芯片的尺寸最小。
(2)接地引线和开关信号引线交错并列排列布置使得芯片的制程所使用的硅片面积较小。
(3)不用复杂的引线连接，焊垫的布置即可以在已有芯片基础上实现其功能的扩展，其实现方式更加方便和灵活。
附图说明
图1A所示为采用现有技术的一种单片芯片封装结构的示意图；
图1B所示为采用图1A所示的芯片封装结构功能扩展的示意图；
图2所示为依据本发明实施例的芯片封装结构的示意图；
图3所示为图2所示的一种芯片的电路原理框图；
图4所示为依据本发明实施例的芯片功能扩展的封装结构示意图；
图5所示为依据本发明的第一示例芯片封装方法的流程图；
图6所示为依据本发明的第二示例芯片封装方法的流程图。
具体实施方式
以下结合附图对本发明的优选实施例进行详细描述，但本发明并不仅仅限于这些实施例。本发明涵盖任何在本发明的精髓和范围上做的替代、修改、等效方法以及方案。为了使公众对本发明有彻底的了解，在以下本发明优选实施例中详细说明了具体的细节，而对本领域技术人员来说没有这些细节的描述也可以完全理解本发明。
图2所示的是本发明一实施例的芯片封装结构的示意图，该实施例的芯片封装结构包括芯片201、引线框架203、第一接合引线206-1和第二接合引线206-2。芯片201上具有第一接触焊垫202-1和第二接触焊垫202-2，其中第一接触焊垫202-1和第二接触焊垫202-2配置于芯片201的边缘处，以方便于进行打线制程。
引线框架203包括多个向外部连接的引脚205和载片台204，第一接合引线206-1将第一接触焊垫202-1直接电连接至引线框架203上的载片台204，第二接合引线206-2将第二接触焊垫202-2电连接至所述引线框架203的多个引脚205。
由于封装件上芯片集成度的提高，为了保证电性品质和减少噪声，在进行封装件的结构设计时，通常必须使该芯片201具有接地(GND)和电源(IN)功能以及信号开关功能(LX)，使其符合电性要求。这里，以第一接触焊垫202-1为接地焊垫、第二接触焊垫202-2为电源焊垫和开关信号焊垫为例，将接地焊垫直接连接至引线框架203的第一接合引线206-1为接地引线，将电源焊垫连接至引线框架的电源引脚的第二接合引线206-2为电源引线，将开关信号焊垫连接至引线框架的开关引脚的第二接合引线206-2为开关信号引线。所述接地引线和开关信号引线分布在所述引线框架203的同一侧，并且两者呈并列交错排列布置，所述电源引线分布在所述引线框架203的相对的另一侧。对应的，芯片201上的接地焊垫和开关信号焊垫位于所述芯片的同一侧，并且两者成并列交错排列布置，电源焊垫位于所述芯片的相对的另一侧。
以电源管理类芯片为例，图3所示为该芯片的电路原理图，包括上开关管Q1，下开关管Q2，电源以及地。则对该芯片的封装则要求其具有电源引脚IN、接地引脚GND以及开关引脚LX，因此可以采用图2所示的本发明实施例所述的封装结构。即芯片的电源焊垫通过一组第二接合引线即电源引线跨过所述引线框架直接连接至引线框架的电源引脚，开关信号焊垫通过一组第二结合引线即开关引线扩过所述引线框架直接连接至引线框架的开关引脚，接地焊垫通过一组第一接合引线即接地引线直接连接至所述引线框架。
采用图2所示的芯片封装结构，其需要的接地引线的长度较小，因此由引线产生的引 线电阻较小，使得芯片的功率损耗较小；芯片的接地引线直接连接至引线框架，减小了接地引线和引线框架上的载片台之间的间隙，使得散热效果较好；另外，采用这种方式，热量可以直接经由接地引线直接传递到引线框架上，因此热阻较小，散热好。
并且，开关引线和接地引线位于引线框架的同一侧，电源引线位于引线框架的相对的另一侧，其中所述开关引线和接地引线呈交错并列排列布置。
对电源管理类芯片，通常采用外接电阻、电容的方式来调节电源芯片的工作频率，在该实施例中，外接电容可以连接在引线框架的电源引脚和引线框架上载片台的地电位，因此电容回路最小，引线也最短，也使得整体尺寸较小。
电压应力如公式(1)计算，
V = L · di dt - - - ( 1 )
因此可知，采用实施例所示的封装结构，所述接合引线的走线电感较小，因此，承受的电压应力也较小。
采用现有技术，如果需要对芯片的功能进行扩展，如图1B所示则需要在原有芯片的基础上重新进行电路设计以及布局，接触焊垫和接合引线的排布会更加复杂，也需要增加较大面积的硅片。
图4所示为采用本发明在原有芯片基础上需进行功能扩展的芯片封装结构的示意图。采用本发明实施例的芯片封装结构，如果需要对芯片201的功能进行扩展，则只需要在原芯片结构布局的基础上，沿原布局方向增加一定面积的硅片，以及相应的接合引线、接触焊垫，不影响原有引线以及焊垫的排列布置，其实现更加方便和灵活。如图4所示的芯片封装结构为例，所述芯片201包括接地、电源、开关功能以及相应的控制电路部分207，其中接地、电源、开关信号功能按照本发明实施例所示的芯片封装结构进行封装。如果需要在原有芯片基础上进行新功能的扩展，则仅在原芯片布局沿线上增加较小面积的硅片、以及对应的引脚、焊垫，即可以在不影响原有引线以及焊垫的排列布置的基础上实现芯片功能的扩展。图4中其它的内容与图2所示的相同。
图5所示为采用本发明的芯片封装方法的流程图，其包括以下步骤：
S501：提供一个需进行封装的芯片，所述芯片上具有第一接触焊垫和第二接触焊垫；
S502：提供一引线框架，其上具有提供向外部连接的多个引脚；
S503：提供一组第一接合引线，以将第一接触焊垫直接电性连接至所述引线框架；
S504：提供一组第二接合引线，以将第二接触焊垫直接电性连接至所述引线框的多个 引脚。
图6是以具有接地、电源和开关信号功能的芯片为例，来具体说明采用本发明实施例的芯片封装方法的流程图，其包括以下步骤：
S601：提供一个需进行封装的芯片，所述芯片上具有接地焊垫、电源焊垫和开关信号焊垫；
S602：提供一引线框架，其上具有提供向外部连接的多个引脚；
S603：在芯片一侧提供接地引线，以将接地焊垫直接电性连接至所述引线框架；
S604：在与接地引线侧的相对一侧设置电源引线，以将电源焊垫直接电性连接至所述引线框架的电源引脚；
S605：与接地引线同侧，并呈交错并列设置开关信号引线，以将开关焊垫直接电性连接至所述引线框架的开关引脚。
采用本发明的芯片封装方法，需要的接地引线的长度较小，因此由引线产生的引线电阻较小，使得芯片的功率损耗较小；芯片的接地引线直接连接至引线框架，减小了接地引线和引线框架上的载片台之间的间隙，使得散热效果较好；另外，采用这种方式，热量可以直接经由接地引线直接传递到引线框架上，因此热阻较小，散热好。并且，可以很方便的实现芯片数目的扩展，而不用复杂的引线连接，焊垫的布置，以及需要考虑从各个芯片的位置布置等问题。
以上特定实施例通过图示和文字描述对本发明的芯片封装结构以及芯片封装方法进行了详细描述。这些实施例并不是完全详尽的，也不限制该发明仅为所述的具体实施例。显然，根据上述教导，可以做很多的修改和变化。例如，本发明以具有接地、电源和信号引脚的芯片为例，说明了不同类型的接合引线、以及引线之间的排列组合方式。但是依据本发明的教导可以推知其他的芯片类型，以及其他的引线结合方式等。本说明书选取并具体描述这些实施例，是为了最好地解释本发明的原理和实际应用，从而使所属技术领域技术人员能最好地利用这个发明。修改的实施例同样也适用于预期的特定应用。本发明的范围为权利要求书全部范围以及其等效物。

Claims (10)

1.一种芯片封装结构，其特征在于它包括：
芯片，所述芯片上具有多个第一接触焊垫和第二接触焊垫；
一引线框架，包括具有用于向外部连接的多个引脚，并且所述芯片配置于所述引线框架上；
一组第一接合引线，用以将所述第一接触焊垫直接电连接至所述引线框架的载片台；
一组第二接合引线，用以将第二接触焊垫电连接至所述引线框架的多个引脚。
2.根据权利要求1所述的芯片封装结构，其特征在于，所述第一接触焊垫为具有相同电位的接地焊垫，所述一组第一接合引线为接地接合引线，所述第二接触焊垫包括一组电位变化的开关信号焊垫和具有相同电位的电源焊垫，与开关信号焊垫连接的第一部分第二接合引线为开关信号接合引线，与电源焊垫连接的第二部分第二接合引线为电源接合引线。
3.根据权利要求2所述的芯片封装结构，其特征在于，所述开关信号接合引线和接地接合引线设置在所述引线框架的同一侧，并将电源接合引线设置在所述引线框架的相对的另一侧。
4.根据权利要求3所述的芯片封装结构，其特征在于，所述信号接合引线和接地接合引线呈交错排列布置。
5.根据权利要求1-4所述的任一芯片封装结构，其特征在于，进一步包括一封装体，用以包覆所述芯片以及焊垫，其中所述引线框架暴露于所述封装体外。
6.一种芯片封装方法，包括以下步骤：
步骤(1)：提供一个需进行封装的芯片，所述芯片上具有第一接触焊垫和第二接触焊垫；
步骤(2)：提供一引线框架，其上具有提供向外部连接的多个引脚；
步骤(3)：将所述芯片相应地安装在所述引线框架上；
步骤(4)：提供一组第一接合引线，以将第一接触焊垫直接电连接至所述引线框架的载片台；
步骤(5)：提供一组第二接合引线，以将第二接触焊垫直接电连接至所述引线框的多个引脚。
7.根据权利要求6所述的芯片封装方法，其特征在于所述步骤(4)中，第一接触焊垫为具有相同电位的接地焊垫，所述第一接合引线为接地接合引线，所述步骤(5)中， 与所述一组第二接合引线连接的第二接触焊垫，包括一组电位变化的开关信号焊垫和具有相同电位的电源焊垫，与开关信号焊垫连接的第一部分第二接合引线为信号接合引线，与电源焊垫连接的第二部分第二接合引线为电源接合引线。
8.根据权利要求7所述的芯片封装方法，其特征在于，进一步包括：将所述开关信号接合引线和接地接合引线设置在所述引线框架的同一侧，并将电源接合引线设置在所述引线框架的相对的另一侧。
9.根据权利要求7所述的芯片封装方法，其特征在于，进一步包括，将所述信号接合引线和接地接合引线呈交错排列布置。
10.根据权利要求6-9所述的任一芯片封装方法，其特征在于，进一步包括：设置一封装体，用以包覆所述芯片以及焊垫，并将所述引线框架暴露于所述封装体外。 
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