CN101645410B - 用于半导体晶片制造工艺的晶片承载装置及加热器 - Google Patents

用于半导体晶片制造工艺的晶片承载装置及加热器 Download PDF

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CN101645410B
CN101645410B CN2009101603236A CN200910160323A CN101645410B CN 101645410 B CN101645410 B CN 101645410B CN 2009101603236 A CN2009101603236 A CN 2009101603236A CN 200910160323 A CN200910160323 A CN 200910160323A CN 101645410 B CN101645410 B CN 101645410B
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CN101645410A (zh
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余振华
黄见翎
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
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Abstract

本发明实施例提供一种用于半导体晶片制造工艺的晶片承载装置及加热器，该晶片承载装置包括导热层，设置于支撑基座上，导热层耦接至加热电路；多个孔洞，穿过导热层及支撑基座；以及多个导热支撑杆，耦接至加热电路且延伸穿过孔洞并超出导热层，每一导热支撑杆具有顶端，用以与晶片直接接触。本发明能够使晶片在制造过程中保持基底温度均匀一致，不会造成弓起或弯曲现象产生，提高产品良率及降低制造成本。

Description

用于半导体晶片制造工艺的晶片承载装置及加热器
技术领域
本发明涉及在半导体工艺期间用以承载半导体晶片的装置，且特别涉及可于高热应力工艺中维持均匀晶片温度的晶片承载装置(wafer holdingapparatus)及方法。
背景技术
半导体集成电路(IC)的制造一般包括许多需升高晶片温度以进行所需步骤的工艺技术，例如化学气相沉积(CVD)、物理气相沉积(PVD)、干蚀刻(dryetching)、或其他工艺技术。对于公知晶片承载装置而言，通常会利用包括加热装置(heating element)的静电吸座(electrostatic chunk)以将半导体晶片支撑于固定位置，并于各种工艺期间将产生自加热装置的热能转移至晶片。
图1显示公知用作晶片承载与加热装置的偶极型静电吸座(dipole-typeelectrostatic chunk)10。静电吸座10包括埋置于晶片支撑台座(wafer supportingstage)中的一对或多对的电极12，晶片支撑台座一般包括由热传导介电材料(例如导热陶瓷)所制成的底座表面(mounting surface)15。当于电极12之间施加交流电压时，通常会于晶片基底18中诱发反极性电荷(reverse polaritycharge)。因此，可使用产生于晶片基底与电极之间的力量将晶片基底18静电吸引(electrostatically attracted)至支撑台座。也使用加热电路以提供电力至支撑台座而加热静电吸座10的底座表面15。底座表面15与承载于其上的晶片基底18之间接着发生热能转移，以使晶片基底18到达适于进行下一段工艺的所需温度范围。
然而，公知的静电吸座具有下述问题。第一，在晶片制造工艺期间，例如CVD或掺杂(impurity doping)工艺，半导体晶片可能被升温至800℃或更高的温度等级。在如此高温范围中进行工艺的晶片可能遭受重大的热应力，其通常造成晶片弓起(bowing)或弯曲(warping)，如图1所示。此问题造成晶片基底18于弓起或弯曲发生之处失去与底座表面15的直接紧靠接触(directabutting contact)。由底座表面15所产生的热能中，有相当多部分会转移至晶片与底座表面15接触的位置，但不会转移至晶片基底18的弓起或弯曲部分，造成晶片基底18中的温度更为不均匀。
此外，就对电极12施加交流电压的系统而言，当晶片被吸住时，电荷会累积于晶片基底18的背表面中，而所累积的电荷会使自吸座分离基底变得困难。再者，虽然通过交流电压运行的静电吸座对承载于其上的晶片基底施加一吸附力，但吸附力一般对晶片基底中由不均匀热分布所产生的机械应力(mechanical stress)不适应。结果，当累积于晶片基底中的机械应力超出临界点(critical point)时，晶片基底可能产生裂缝或毁坏。
再者，在半导体工艺领域中，增加晶片直径的趋势仍持续，以致力于增加半导体制造的产能，并抵消先进工艺技术中所需负担的昂贵工艺设备成本。如上所述的不均匀热分布可能于尺寸较大的晶片基底中产生更大的机械应力，其造成弓起或弯曲现象更趋严重。
发明内容
为了解决现有技术中存在的上述问题，本发明实施例提供一种用于半导体晶片制造工艺的晶片承载装置，包括导热层，设置于支撑基座上，导热层耦接至加热电路；多个孔洞，穿过导热层及支撑基座；以及多个导热支撑杆，耦接至加热电路且延伸穿过孔洞并超出导热层，每一导热支撑杆具有顶端，用以与晶片直接接触。
本发明另一实施例提供一种用于半导体晶片制造工艺的晶片承载装置，包括导热层，设置于支撑基座上，导热层耦接至加热电路；固定夹承载环，固定于支撑基座的边缘上；多个晶片基底固定夹，连接至固定夹承载环；以及控制电路，耦接至晶片基底固定夹，使晶片基底固定夹夹紧或松开。
本发明又一实施例提供一种用于半导体晶片制造工艺的加热器，包括导热层，设置于支撑基座上，导热层耦接至加热电路；多个第一孔洞，穿过导热层，多个第一孔洞分布于导热层中靠近中心的内区，以及分布于导热层中靠近边缘的外区；第一真空源，连接至内区中的孔洞；以及第二真空源，连接至外区中的孔洞。
本发明能够使晶片在制造过程中保持基底温度均匀一致，不会造成弓起或弯曲现象产生，提高产品良率及降低制造成本。
附图说明
图1显示公知的偶极型静电吸座。
图2A、图2B、图3、图4A及图4B显示本发明实施例的剖面图。
图5显示本发明实施例的平面图。
图6A-图6B分别显示本发明实施例的剖面图及平面图。
图7A-图7B分别显示本发明实施例的剖面图及平面图。
上述附图中的附图标记说明如下：
10～静电吸座；
12～电极；
15～底座表面；
18、50～晶片基底；
20、120、150～晶片承载装置；
22～导热层(或称“晶片承载表面”)；
30～支撑基座；
28～支撑杆；
32、132～孔洞；
23、24、75～弹性弹簧；
21～加热电路；
40～升降平台；
42、62～圆柱；
25～吸附电极；
26～直流或交流吸附电压源；
43、143～较内区；
45、145～较外区；
65～固定夹；
78～固定夹承载环；
65a～紧固物；
81～控制电路。
具体实施方式
以下将详细说明本发明实施例的制作与使用方式。然应注意的是，本发明提供许多可供应用的发明概念，其可以多种特定形式实施。文中所举例讨论的特定实施例仅为制造与使用本发明的特定方式，非用以限制本发明的范围。
本发明将以晶片承载装置及方法为例作叙述，其可于包含提高晶片温度的工艺中维持均匀的晶片基底温度分布，工艺例如是化学气相沉积、杂质掺杂、快速热工艺(rapid thermal process，RTP)、退火(ammeal)、和/或金属沉积。在较佳实施例中，可对各种不同尺寸的晶片基底加热，使晶片基底达到一致的温度分布以进行所需工艺。较佳实施例也可提供适应于产生于晶片基底中的机械应力的承载机制，使得在升高的温度工艺期间所产生于晶片基底中的热致(heat-induced)机械应力可于温度减低的工艺中释放。应注意的是，虽然本发明以特定实施例作描述，然应可了解本发明不受限于这些实施例，许多修饰或变化可在不脱离实施例所界定的本发明的范围与精神的情形下进行。例如，可于其他半导体工艺中使用本发明的实施例，其中为了工艺的进行，需使半导体工作物件(working piece)具有均匀的热分布。
请参照图2A，其显示晶片承载装置20，包括导热层(heat-conductivelayer)22。导热层22设置于支撑基座30上，导热层22的上表面形成了一晶片承载表面。因此，在以下的叙述中，导热层22有时也称作晶片承载表面22。导热层22可包括广大范围的材料。在一实施例中，导热层22包括介电材料，例如氮化铝和/或热分解氮化硼(pyrolytic boron nitride)。在其他实施例中，导热层22包括导电材料，例如热分解石墨(pyrolytic graphite)。
多个支撑杆(lift pins)28延伸穿过形成于导热层22与支撑基座30中的孔洞32。支撑杆28由类似于用以形成导热层22的导热材料制成，例如是氮化铝、热分解氮化硼、和/或热分解石墨。每一支撑杆28由连接至支撑基座30上的弹性弹簧23所支撑。加热电路21用以提供电力至晶片承载表面22(或导热层22)及支撑杆28以加热放置于晶片承载表面22上的晶片基底(未显示)，使得晶片基底到达适合进行工艺所需的温度范围。在一实施例中，晶片基底经历CVD工艺，在此工艺期间温度提升至高于800℃。在如此高的工艺温度下，一般会于晶片基底中形成显著的热应力，其可能造成晶片基底弓起或弯曲。
图2B显示另一较佳实施例，其中每一支撑杆28皆由连接至升降平台(lifttable)40的弹性弹簧24所支撑。升降平台40悬挂自一旋转马达(rotation motor)及圆柱42的顶端，其中圆柱42通过一升降马达模块(lift motor assembly)而轴向调动(axially translated)。支撑杆28的其余部分通过将升降平台40放置于适当位置而可轴向调整。在其他实施例中，升降平台40可固定于(fastenedto)支撑基座30。在一较佳实施例中，每一支撑杆28由密封的空气圆筒所支撑，其中压缩的空气用以取代弹性弹簧。在较佳实施例中，支撑杆28可轴向地自由上下移动。优选地，当晶片承载装置20闲置时，支撑杆28的顶端(tips)突出于晶片承载表面22至一特定延伸量，使得当将进行工艺的晶片基底静置于晶片承载表面22上时，晶片基底的重量将支撑杆28下压，而使晶片基底与晶片承载表面22之间直接紧靠接触。
图3显示具有晶片基底50静置于其上的晶片承载装置20。晶片基底50的背面端与晶片承载表面22及支撑杆28直接紧靠接触。选择性地，当晶片承载装置20于等离子体反应室(plasma reactor chamber)中使用时(例如是等离子体辅助化学气相沉积工具，PEVCD)，导热层22中也可装入一薄平面吸附电极(thin planar chucking electrode)25或导电网格(conductive grid)，其耦接至一直流或交流吸附电压源(DC or alternating chuck voltage source)26，形成直流形式(DC-type)或偶极形式(dipole-type)的静电吸附结构。对吸附电极25施加大直流电压将产生大静电力，其将晶片保持在晶片承载表面22上。当交流电压施加于吸附电极25之间时，一般会于晶片基底50的背侧诱发反极性电荷(reverse polarity charge)。因此，晶片基底50通过产生于晶片基底50与吸附电极25之间的静电力而被吸引至晶片承载表面22。
应注意的是，虽然上述较佳实施例与CVD工艺设备有关，此领域普通技术人员当可明白，较佳实施例也可应用于其他有提升晶片温度需求的晶片制造工艺及设备中，例如使用热夹盘(hot chuck)的快速热工艺(RTP)、热退火工艺(例如硅化工艺，silicidation)、金属沉积工艺、杂质掺杂(impurity doping)工艺、及其他相似工艺，在不脱离本发明的特定较佳实施例所界定的本发明范围及精神下，皆可据以实施。
图4A-图4B共同用以说明当热应力发生时，晶片基底50可能发生的弓起及弯曲。附图中弓起及弯曲效应被夸大以便于说明本发明实施例所能达到的优点。如图4A-图4B所示，当因为晶片的弓起或弯曲而使空气间隔或间隙(air gap)形成于晶片基底50与晶片承载表面22之间时，连接至压缩弹簧的支撑杆28将向上延伸于晶片承载表面22之上，使得支撑杆28的顶端仍与晶片基底50的背面端直接接触。因为支撑杆28借着耦接至用以加热晶片承载表面22的供应电路(supply electricity)而也被加热，所以晶片基底50可借着支撑杆28而连续地受热，即使在与晶片承载表面22的直接紧靠接触因晶片弓起或弯曲而失去之后。因此，导致晶片基底50的均匀温度分布。
图5显示一较佳实施例的晶片承载装置20的平面图，其包括多个支撑杆28，以同心圆的样式分布于一较内区43及一较外区45。应注意的是，显示于图5中的支撑杆28的图案仅用以说明举例，不可用以限制其图案。在实际应用中，可将晶片承载装置20形成为包括多种支撑杆28图案，取决于将进行工艺的晶片基底50的尺寸、所需工艺温度、及不明显影响良率下所需的工艺温度均匀度。
然应注意的是，支撑杆28的尺寸及支撑杆28的密度可冲击晶片基底50与晶片承载表面22之间直接紧靠接触的紧靠程度，因而于晶片基底50上提供一致的温度分布。在较佳实施例中，支撑杆28的尺寸(例如，直径)较佳介于晶片尺寸的约1/100至约1/10之间。支撑杆28的密度，以杆与杆之间的间距(pin-to-pin pitch)界定，可将之最佳化而于具有数种材料及尺寸的晶片基底上提供一致的温度分布，密度(指杆与杆之间的间距)较佳介于晶片尺寸(例如，直径)的约1/50至约1/10之间。在较佳实施例中，形成于晶片承载装置上的支撑杆的数目介于仅很少数至超出一百个之间，例如可介于九个至一百个之间，取决于将进行工艺的晶片基底的尺寸、所需工艺温度、及不明显影响良率下所需的工艺温度均匀度。以图5为例，具有八个支撑杆于较内区43及八个支撑杆于较外区45的晶片承载装置可用于直径四英寸的三-五族半导体晶片(III-V semiconductor wafer)的工艺中。在其他实施例中，具有一百个支撑杆的晶片承载装置可用来进行十二英寸硅晶片(twelve-inch silicon wafer)工艺。
也应注意的是，施加于吸附电极25的直流或交流吸附电压可经由控制电路而有所变化，因而形成在晶片基底50与吸附电极25之间的静电力可连续变化或间歇地开启及关闭，适于具有不同热应力程度的工艺。例如，在有一致温度分布高度需求的高温工艺期间，可于晶片基底50与吸附电极25之间形成大静电力，使晶片基底50与晶片承载表面22之间依需求而直接紧靠接触。然而，可通过调整施加于吸附电极25的直流或交流吸附电压而减少形成于晶片基底50与吸附电极25之间的静电力，因而可快速地缓和或释放产生于晶片基底50中的高机械应力。
图6A-图6B显示另一较佳实施例的晶片承载装置120的剖面示意图及平面示意图。晶片承载装置120包括导热层22，设置于支撑基座30上。导热层22的顶表面形成一晶片承载表面。晶片承载装置120还包括多个晶片基底固定夹65，固定于固定夹承载环(clamper supporting ring)78，固定夹承载环78固定在支撑基座30的边缘。固定夹65可于一锁紧与一开启位置(locked and unlocked position)之间水平旋转以将晶片基底50固定于导热层22(或称晶片承载表面22)上。或者，固定夹65可于一锁紧与一开启位置之间下降或上升。加热电路用以提供电力至晶片承载表面22以加热承载于其上的晶片基底50，使晶片基底50到达适合进行工艺的温度范围。选择性地，支撑基座30可固定于升降平台40上，升降平台40悬挂自一旋转马达(rotationmotor)或圆柱62的顶端，其中圆柱62通过一升降马达模块而轴向调动。
每一固定夹65可借着紧固物(fastener)65a而于一端连接至固定夹承载环78上。固定夹65用以在有一致温度分布高度需求的高温工艺期间，确保晶片基底50与晶片承载表面22之间的直接紧靠接触。然而，弹性弹簧75可通过控制电路81而撤开或松开，使晶片基底50的边缘上的夹置力(clampingforce)可立即解除或缓和。换言之，在一些实施例中，弹性弹簧75可具有一机电构件(electromechanical component)，例如是电磁铁(electromagnent)或可包括于电场或电流存在时会变形的材料。因此，在高温工艺期间产生于晶片基底50中的高机械应力可借着移除晶片基底50上的夹置力而快速地缓和或释放。在较佳实施例中，固定夹65中的弹性弹簧75间歇性地压缩与释放(activated and deactivated)，适于具有不同热应力程度的工艺。例如，在有一致温度分布高度需求的高温工艺期间，将固定夹65启动以确保晶片基底50与晶片承载表面22之间的直接紧靠接触。此后，因而形成于晶片基底50中的高机械应力可通过松开固定夹65而快速地舒缓或释放，因而移除晶片基底50上的夹置力。在一些实施例中，固定夹65可与支撑杆28(例如，显示于图4A及图4B)结合使用，可更灵活地控制对晶片基底50的热传。
图7A-图7B显示另一较佳实施例的晶片承载装置150的剖面及平面示意图。晶片承载装置150包括导热层22。导热层22设置于支撑基座30上，其中导热层22的顶表面形成一晶片承载表面，因此标号22也指晶片承载表面。此领域普通技术人员当可明白，也可采用升降平台40(例如图4A所示)于图7A所示的实施例中。较佳使用加热电路(未显示)以提供电力至晶片承载表面22(即导热层22)，并对放置于其上的晶片基底50加热，使晶片基底50在适于进行工艺的所需温度范围内到达一致的温度分布。导热层22及支撑基座30中形成有多个贯穿的孔洞132。孔洞132较佳以同心圆的样式分布于一较内区143及一较外区145。在承载基座30背面端的较内区143及较外区145可连接至相同或分离的真空源(vacuum sources)。当一个或多个真空源开启时，吸力(attractive force)形成于晶片承载表面22上，可固定其上的晶片基底50以进行所需工艺。在此实施例中，在较内区143及较外区145的真空吸力可借着真空源控制电路而间歇地开启或关闭。例如，在有一致温度分布高度需求的高温工艺期间，可开启所有的真空源以确保晶片基底50与晶片承载表面22之间的直接紧靠接触。此后，可借着关闭一个或更多个真空源而使吸力快速地缓和，允许产生于晶片基底50中的高机械应力得以快速地缓和或释放。
形成于晶片承载表面22上的孔洞132的尺寸(例如，直径)及孔洞132的密度可冲击晶片基底50与晶片承载表面22之间直接紧靠接触的紧靠程度，因而于晶片基底50上提供一致的温度分布。在较佳实施例中，孔洞132的尺寸(例如，直径)较佳介于晶片尺寸的约1/100至约1/10之间。孔洞132的密度，以洞与洞之间的间距(hole-to-hole pitch)界定，可将之最佳化以对具有数种材料及尺寸的晶片基底进行工艺，其较佳介于晶片尺寸(例如，直径)的约1/50至约1/10之间。在较佳实施例中，形成于晶片承载装置上的孔洞的数目介于仅很少数至超出一百个之间，取决于将进行工艺的晶片基底的尺寸、所需工艺温度、及不明显影响良率下所需的工艺温度均匀度。例如，具有八个孔洞于晶片承载表面22上的晶片承载装置可用于直径四英寸的三-五族半导体晶片(III-V semiconductor wafer)的工艺中。在其他实施例中，具有一百个孔洞于晶片承载表面22上的晶片承载装置可用来进行十二英寸硅晶片制造工艺。图7B所示实施例中，孔洞132组成四个同心圆，此领域普通技术人员由此当可明白，通过重复性的试验可获得许多孔洞在尺寸、图案、及放置方式上的变化。
虽然本发明较佳实施例及其优点已详细介绍，然应可了解的是，各种变化、取代、及修改皆可在不脱离所附权利要求所界定的发明精神与范围下进行。例如，此领域普通技术人员当可明白，根据上述的本发明较佳实施例，可在本发明的范围之内，变化、取代、及修改实施例中的元件、材料、及结构以形成更多型态的晶片承载装置。
虽然本发明已以数个较佳实施例揭示如上，然其并非用以限定本发明，任何所属技术领域中普通技术人员，在不脱离本发明的精神和范围内，当可作任意的更动与润饰，因此本发明的保护范围当视所附的权利要求所界定的范围为准。

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1.一种用于半导体晶片制造工艺的晶片承载装置，包括：
一导热层，设置于一支撑基座上，该导热层耦接至一加热电路；
一固定夹承载环，固定于该支撑基座的一边缘上；
一晶片基底固定装置，用以将一待承载晶片基底固定于该支撑基座上，其中该晶片基底固定装置包括多个晶片基底固定夹，连接至该固定夹承载环；以及
一控制电路，耦接至所述晶片基底固定夹，使所述多个晶片基底固定夹夹紧或松开。
2.如权利要求1所述的用于半导体晶片制造工艺的晶片承载装置，其中每一所述晶片基底固定夹包括一弹性弹簧。
3.如权利要求1所述的用于半导体晶片制造工艺的晶片承载装置，还包括：
多个孔洞，穿过该导热层；以及
多个导热支撑杆，耦接至该加热电路，且延伸穿过所述孔洞并超出该导热层，每一所述导热支撑杆具有一顶端，用以与一晶片直接接触。
4.一种用于半导体晶片制造工艺的加热器，包括：
一导热层，设置于一支撑基座上，该导热层耦接至一加热电路；
多个第一孔洞，穿过该导热层，所述多个第一孔洞分布于该导热层中靠近中心的一内区，以及分布于该导热层中靠近边缘的一外区；以及
一晶片基底固定装置，用以将一待承载晶片基底固定于该支撑基座上，其中该晶片基底固定装置包括：
一第一真空源，连接至该内区中的所述孔洞；以及
一第二真空源，连接至该外区中的所述孔洞，其中该第一真空源及该第二真空源用以通过所述孔洞提供吸力。
5.如权利要求4所述的用于半导体晶片制造工艺的加热器，还包括一控制电路，用以分别开启该第一真空源及该第二真空源。
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US20140097175A1 (en) 2014-04-10
CN102593035A (zh) 2012-07-18
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