CN101572239A - 半导体模组 - Google Patents

半导体模组 Download PDF

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Publication number
CN101572239A
CN101572239A CNA2009101354572A CN200910135457A CN101572239A CN 101572239 A CN101572239 A CN 101572239A CN A2009101354572 A CNA2009101354572 A CN A2009101354572A CN 200910135457 A CN200910135457 A CN 200910135457A CN 101572239 A CN101572239 A CN 101572239A
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China
Prior art keywords
module
conductive material
material layer
semiconductor chips
contact pad
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CNA2009101354572A
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CN101572239B (zh
Inventor
W·克罗宁杰
J·施韦杰
L·施奈德
O·盖特纳
M·布伦鲍尔
T·迈耶
R·奥特雷姆巴
J·霍格劳尔
H·斯特莱克
X·施洛格尔
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

半导体模组。一个实施例提供至少两个放置于载体上的半导体芯片。所述至少两个半导体芯片然后覆盖上模塑材料以形成模塑体。减薄模塑体直到至少两个半导体芯片暴露出来。然后，将载体从半导体芯片上移除。使所述至少两个半导体芯片单个化。

Description

半导体模组
技术领域
本发明涉及半导体模组(semiconductor module)和制造其的方法。
背景技术
半导体芯片可以被封装。半导体装置可以通过从晶圆分离出单个裸片(die)，在载体上重新布置，并用塑料封装而制得。在本领域非常期望具有成本效益的封装件及封装方法。
发明内容
根据本发明一方面，提供一种方法，包括：放置至少两个半导体芯片于载体上；用模塑材料覆盖所述至少两个半导体芯片以形成模塑体；减薄所述模塑体直到所述至少两个半导体芯片暴露出来；从所述至少两个半导体芯片移除所述载体，以及使所述至少两个半导体芯片单个化。
根据本发明另一方面，还提供一种方法，包括：放置至少两个半导体芯片于载体上；用模塑材料覆盖所述至少两个半导体芯片以形成模塑体；减薄所述模塑体直到所述至少两个半导体芯片暴露出来；在减薄所述模塑体后，施加第一导电材料层于所述至少两个半导体芯片之上，其中所述第一导电材料层与所述至少两个半导体芯片上的接触焊盘电连接；从所述至少两个半导体芯片移除所述载体，以及使所述至少两个半导体芯片单个化。
根据本发明又一方面，还提供一种模组，包括：半导体芯片，其具有第一主芯片表面、第二主芯片表面和所述第一主芯片表面上的接触焊盘；模塑模组体，其由模塑材料制得，用于收容所述半导体芯片，所述模塑模组体具有第一模塑表面、第二模塑表面及沟槽，所述沟槽开于所述第一模塑表面和所述第二模塑表面；第一导电材料层，其施加于所述第一主芯片表面和所述第一模塑表面之上，所述第一导电材料层与所述接触焊盘电连接，以及，导电元件，其与所述第一导电材料层电连接，且延伸通过所述沟槽。
根据本发明又一方面，还提供一种模组，包括：半导体芯片，其具有第一主芯片表面、第二主芯片表面和所述第一主芯片表面上的第一接触焊盘和所述第二主芯片表面上的第二接触焊盘；模塑模组体，其由模塑材料制得，用于收容所述半导体芯片，所述模塑模组体具有第一模塑表面和第二模塑表面；第一导电材料层，其施加于所述第一主芯片表面和所述第一模塑表面之上，所述导电材料层与所述第一接触焊盘电连接，以及第二导电材料层，其施加于所述第二主芯片表面和所述第二模塑表面之上，所述第二导电材料层与所述第二接触焊盘电连接。
根据本发明又一方面，还提供一种模组，包括：半导体芯片，其具有第一主芯片表面、第二主芯片表面和所述第一主芯片表面上的接触焊盘；模塑模组体，其由模塑材料制得，用于收容所述半导体芯片，所述模塑模组体具有第一模塑表面、第二模塑表面及沟槽，所述沟槽开于所述第一模塑表面和所述第二模塑表面；第一导电材料层，其施加于所述第一主芯片表面和所述第一模塑表面之上，所述第一导电材料层与所述接触焊盘电连接，以及导电元件，其与所述第一导电材料层电连接，并且延伸通过所述沟槽。
附图说明
附图被包括用以提供对本发明的进一步的理解并且被并入和构成该说明书的一部分。这些图示出一些实施例并且与说明一起用来解释实施例的原理。将容易领会其它实施例和实施例的多个预期的优点，参考以下详细描述它们将变得很好理解。这些图的元件不一定相对于彼此按比例绘制。相似的参考数字表示相应的相似部分。
图1A至1E示意性示出模组的制造方法的一个实施例。
图2示出了图1E中所示的结构的顶视图。
图3A至3G示意性示出了模组的制造方法的一个实施例。
图4示意性示出了根据一个实施例的第一模组的截面图。
图5示意性示出了根据一个实施例的第二模组的截面图。
图6示意性示出了根据一个实施例的第三模组的截面图。
图7A至7D示意性示出了模组的制造方法的一个实施例。
图8示意性示出了根据一个实施例的第四模组的截面图。
图9示意性示出了根据一个实施例的第五模组的截面图。
图10示意性示出了根据一个实施例的第六模组的截面图。
图11示意性示出了根据一个实施例的装置的截面图。
图12示出了半桥的基本电路图。
具体实施方式
在下面的具体实施方式部分中，参考附图，这些附图构成其中的一部分，在这些图中借助图示表示出可以实施本发明的特定实施例。在这方面，方向性的术语，例如：“顶部”、“底部”、“正”、“背”、“超前”、“拖尾”等等，是参考所描述的图的方向来使用的。由于实施例的部件可被定位在许多不同的取向，所以方向性的术语仅用于说明的目的，并且决不是用于限制。应当理解也可以利用其它实施例，并且可以在不脱离本发明的范围的情况下做出结构或逻辑改变。因此，下面的详细描述不是在限制的意义上进行的，并且本发明的范围将由所附权利要求来限定。
应当理解，除非作出特别的明示，在这里描述的各个示例性的实施例的特征可以彼此组合。
以下将描述包括半导体芯片的模组。半导体芯片可以是极其不同的类型，并且可以包括例如集成电路或光电电路。例如，半导体芯片可被配置成例如功率晶体管、功率二极管、IGBT(绝缘栅双极晶体管)、逻辑电路、控制电路、微处理器或微机电部件等的功率半导体器件。
在一个实施例中，涉及了具有纵向结构的半导体芯片，即，该半导体芯片可以利用电流能以垂直于半导体芯片的主表面的方向流动的这种方法来制作。在一个实施例中，具有纵向结构的半导体芯片的两个主表面，即，在该半导体芯片的顶面和底面，上可以具有接触元件。在一个实施例中，功率晶体管和功率二极管可以具有纵向结构。进一步地，RF(射频)芯片的两个主表面上皆可配置接触元件。
举例来说，功率晶体管，如MOSFET(金属半导体场效应晶体管)的源极端子和栅极端子，以及功率二极管，如肖特基二极管的的阳极端子可位于一个主表面上，而功率晶体管的漏极端子与功率二极管的阴极端子可设置在另一个主表面上。此外，下面描述的模组可以包括集成电路，其用于控制其它半导体芯片，例如功率晶体管或功率二极管的集成电路。半导体芯片不需要由特殊的材料制得，并且可以进一步包括例如绝缘体，塑料或金属的非半导体的无机和/或有机材料。
半导体芯片具有接触元件(也称为接触焊盘(contact pad))，其允许与半导体芯片进行电接触。接触焊盘可由任何预想的导电材料构成，例如，像铜、铝或金的金属、金属合金或导电有机材料。在功率晶体管的实例中，接触焊盘包括漏极、源极和栅极端子。
模组还包括由电绝缘模塑材料制作的模塑模组体，该绝缘模塑材料为例如像环氧基材料、光阻剂等等的树脂。“电绝缘”术语指的是电绝缘材料的性能。相对于模组的导电部件而言，该电绝缘材料的性能至多仅仅处于导电性边缘。模塑材料可以是任何合适的热塑或热固性材料。例如模压模塑或注塑模塑的各种技术可以用来以模塑材料覆盖半导体芯片。固化后，由模塑材料制得的模塑体提供用以收容多个(例如，通常大于50个)半导体芯片的刚性结构。该模塑体可以具有圆盘状或板状，该圆盘状或板状具有大于0.2或甚至0.3m的横向尺寸。这样收容有多个间隔开的再分布的半导体芯片的模塑体通常被称为“模塑重组晶圆”。
一个或多个导电层可以被施加至嵌入式半导体芯片。导电层可以用于从模组外部与半导体芯片进行电接触，以及使半导体芯片之间制作电连接。导电层可以采用任何预想的几何形状和任何预想的材料组成制作。例如，虽然导电层可以由线形导电迹线构成，但是该导电层也可以是以覆盖某一区域的层的形式。任何预想的导电材料，例如，像铝、金或铜的金属、金属合金或有机导体，均可以用作该材料。导电层不需要是同质的，或者仅由一种材料制作，即，导电层中包括的各种成分和浓度的材料都是可行的。
下面描述的模组可以包括外部接触焊盘。从模组外部易于接近外部接触焊盘，且该外部接触焊盘可允许从模组外部与半导体芯片进行电接触。此外，外部接触焊盘可以导热，并且可以作为用于散发半导体芯片产生的热量的散热器(heat sink)。外部接触焊盘可以由任何预想的导电材料构成。例如，像铜，铝或金的金属、金属合金的金属的或者有机导电材料。外部接触焊盘的表面可以形成组装平面。组装平面可以用做安装模组到另外一个部件上，例如电路板。
图1A至4E示范了嵌入了半导体芯片的模塑体的制作步骤。这样的模塑体在本领域也可被认为是重组晶圆。在第一步工序(图1A)中：提供载体1。载体1可以是刚性的，也可以到某种程度的柔性的。并且，该载体1可以由诸如金属、金属合金或者塑料材料制作。载体1可以是导电的或绝缘的。胶带2可以层压于载体1上。胶带2可以是双面都有粘性的胶带。在一个实施例中，胶水或者其它有粘性材料或者机械固定装置(例如夹具或者真空产生器)都可以与载体1相联。
图1B中，半导体芯片3放置在载体1上，并且通过使用胶带2或者其它合适的装置将半导体芯片3固定在载体1上。相邻的半导体芯片3之间的距离S可以在0.25毫米至10毫米的范围内。但应注意到，图1A到1E仅示出了模塑体的一部分，即，在实践中，通常远多于三个半导体芯片3放置在载体1上。
半导体芯片3在面对载体1的第二主芯片表面6上可以具有接触焊盘4，5。如果半导体芯片3是功率晶体管，接触焊盘4可以为源极端子，且接触焊盘5为栅极端子。在其它例子中，例如，如果半导体芯片3是功率二极管，仅有一个接触焊盘(例如，阳极端子)可以被提供在第二主芯片表面6上。如果半导体芯片3是逻辑集成电路，通常有几个接触焊盘3，4设置在第二主芯片表面6上。但应注意到，第二主芯片表面6通常形成半导体芯片3的有源表面。
如图1C，电绝缘模塑材料7可以施加于半导体芯片3和载体1。模塑材料7可以用于封装除半导体芯片3底部包括接触焊盘4，5的第二主芯片表面6以外的半导体芯片3。模塑材料7可以是环氧树脂或者是目前半导体封装技术应用的其它合适材料。它也可以是环氧基的光阻剂，如SU8。模塑材料7可以由任何合适的热固性或热塑性材料构成。模塑材料7固化后，其提供半导体芯片3阵列的稳定性。各种技术都可以用来以模塑材料7覆盖半导体芯片3，例如模压模塑或注塑模塑。
举例来说，在模压模塑方法中，将液态模塑材料7配送到开口的下半模，该下半模的底部由载体1形成。然后，配送液态模塑材料7后，上半模向下移动，并铺展液态模塑材料7直到形成下半模的底部的载体1和上半模之间的空腔被完全填满为止。该方法可以伴随加热和加压。固化后，模塑材料7变为刚性从而形成模塑体。模塑体70(“模塑重组晶圆”)的横向尺寸越大，嵌入式芯片3的数量越多，该方法通常取得更多的成本效益。
从图1C可以看出，半导体芯片3可以是完全过模，也就是全部被模塑材料7所覆盖。在接下来的步骤，减薄该模塑体(图1D)。可以使用与前道技术中对半导体晶圆进行磨削或研磨机器相似或相同的磨削或研磨机器。当磨削工具使用砂轮时，研磨工具使用充有作用在两个表面之间的“滚压”的研磨粒子的流体。在一个实施例中，可以使用蚀刻来减小模塑材料7的厚度。对模塑材料7进行减薄一直持续到半导体芯片3的至少上主表面8暴露出来。如后面将结合图3A至G详细解释，为了进一步降低半导体芯片3的厚度，减薄还会持续。
举例来说，图1C中的模塑体70的厚度d1可以大概为几百个微米，例如，大于200微米，500微米或者甚至大于1000微米。厚度d1大于半导体芯片3的厚度。因为半导体晶圆通常制造为厚度大约为500微米或1000微米，而且在前道工序中会研磨至大约200微米那么少或者更少，半导体芯片3在减薄之前，其厚度可以为，例如大约200微米至1000微米范围之间。作为一个具体的例子，半导体芯片3的厚度大约为450微米，d1大约为650微米。减薄之后，模塑体70的厚度降低至半导体芯片3的厚度。因此，半导体芯片通过减薄而暴露出来，而且没有模塑材料7残留在半导体芯片3的上表面上。换句话说，减薄之后，模塑体70新产生的的上表面由模塑材料7和半导体材料构成，因此与模塑体70上的面对载体1的下表面类似。
在图1E中，将模塑体70从载体1上脱离。为了这个目的，胶带2可以具有热脱离性质，其可以允许胶带2在热处理过程可脱落。将胶带2从包括有半导体芯片3的模塑体70脱落是在一个合适的温度下进行，该温度取决于胶带2的热脱落性质，其通常高于150摄氏度，在一个实施例中，接近200摄氏度。图2示出了模塑体70的顶视图。模塑体70在本领域也可被称为人工或重组晶圆。模塑体70也可以为，例如，诸如直径D为200毫米或300毫米的圆盘形状，或者可以有诸如多边形且具有相同或其它横向尺寸的任何其它形状。
减薄非常有利于在后续工序中对模塑体70进一步的加工，因为减薄可以消除模塑体70的翘曲或弯曲部分。如果没有减薄，靠近模塑体的上表面的上层全部由模塑材料7制成，而靠近模塑体70的下表面的下层由半导体材料和模塑材料7交替制得。因为半导体材料的热膨胀系数(CTE)通常不同于模塑材料7的CTE，在没有减薄的情况下，模塑体70的上表面或其附近的总的横向膨胀不同于模塑体70的下表面或其附近的总的横向膨胀。例如，半导体芯片的CTE可能为大约2.8·10-6/K(硅)，模塑材料7的CTE可以在范围20至200·10-6/K之间。这通常会导致具有表面水平偏差多于1或几个毫米的模塑体70(即人工或重组晶圆)翘曲或弯曲。然而，减薄可导致上表面和下表面具有同样的成分，从而导致相同的总的横向膨胀系数。因此，减薄可以消除翘曲或弯曲。减薄之后，会导致模塑体70基本上平整，而且非常有利于进一步的加工。在一个实施例中，接下来所有的工序将会在没有任何载体固持或夹持模塑体70的情况下进行。在进一步加工的过程中，传统上需要这些载体来促使弯曲的模塑体70成为平整构型。
接下来的工序包括施加电互连，例如一层或多层金属再分布层，和切割。这些工序将结合进一步的实施例在下面详细描述。
图3A至3G举例说明了半导体模组的制造阶段。此外，在第一个工序中(图3A)，提供载体1。这道工序连同载体1及胶带2已经在先前结合图1描述过。
图3B中，半导体芯片3放置在载体1上，并且通过使用胶带2或者其它合适的装置固定。但应注意到，图3A到3G仅示出设置的一部分，即，在实践中，通常远多于三个半导体芯片3放置在载体1上。
半导体芯片3在面对载体1的第二主芯片表面6上具有接触焊盘4，5。可以使用前面提到过的同样类型的半导体芯片。
电绝缘模塑材料7可以施加到半导体芯片3和载体1，见图1C。模塑材料7可以用于封装除半导体芯片3底部包括接触焊盘4，5的第二主芯片表面6以外的半导体芯片3。模塑材料可以是结合先前图1C中描述过的同样的材料和同样的施加方式。
从图3C可以看到，半导体芯片3可以是全部过模，即全部被模塑材料7覆盖。在接下来的步骤，将模塑体减薄(图3D)。之前提到过的同样的技术和工具都可以应用。对模塑材料7进行减薄，一直持续到半导体芯片3的至少上主表面8暴露在外。通常，为了进一步降低半导体芯片3的厚度，减薄还会继续。
举例来说，图3C中的模塑材料70的厚度d1可以大概为几百个微米，例如，大于200微米，500微米或者甚至大于1000微米。厚度d1大于半导体芯片3的厚度。因为半导体晶圆通常制造为厚度大约为500微米或1000微米，而且在前道工序中会研磨至大约200微米或者更少，半导体芯片3在减薄之前，其厚度可以为200微米至1000微米之间。减薄之后，模塑体70的厚度降低到如50微米至200微米范围内，这样，半导体芯片3的厚度也降低到同样的尺寸。但应注意的是，第二主芯片表面6构成半导体芯片3的有源表面，因此，磨削工序不会对半导体芯片3的功能造成负面影响。
磨削之后，模塑体70新产生的表面由模塑材料7和半导体材料构成。使用合适的清洁方法例如氢氟酸腐蚀来清洁所述表面。然后，在第一主芯片表面10产生接触焊盘9。第一主芯片表面10可以是最初的上芯片表面8(如果磨削或研磨仅仅用于使最初的上芯片表面8暴露)或者是在磨削或研磨工序中新产生的主芯片表面。
本领域内已知许多用于在第一主芯片表面10上产生接触焊盘9的工艺。举例来说，厚度大约为100纳米的Ti或Al层可以沉积在被清洁的第一主芯片表面10上。这层金属层也可以被另外的金属层覆盖，如Ag或Ni的金属层，其厚度也大约为100纳米。
在图3D中，提供延伸通过模塑体70的模塑材料7的多个沟槽11。这些沟槽11可以是任意形状，例如可以为狭缝型或者柱状。沟槽11是通孔，即开于模塑体70的两个表面。沟槽11可以具有在10微米至500微米范围内的横向尺寸或者直径，更具体的是在50微米至100微米之间。此外，如果要导通高电流，可给每个半导体芯片3提供多个沟槽11。沟槽11可以位于与半导体芯片3间隔开，以使得半导体芯片3的侧面12仍然被模塑材料7覆盖。
可以通过钻孔例如机械钻孔或者激光钻孔产生沟槽11。另外一种可行的方法是使用光化学工艺(光刻，蚀刻)来产生沟槽11。进一步地，也有可能在制造工序的较早阶段引入沟槽11，例如在模塑工序中。在这种情况，上半模可以安装杆或刀片(blade)或其它具有沟槽的正形状(positive shape)的元件。图3D示出了磨削后，形成有接触焊盘9和产生沟槽11的模塑体70。
模塑材料7结构化后，将导体层13施加到模塑体70上。导体层13由种子层(图未示)和通过电镀沉积到种子层上的另一层构成。无电镀沉积方法可以用来形成种子层。种子层的厚度高达到1微米，其可以由，例如锌制得。种子层的导电性可以用来在种子层上形成电镀沉积导电层，例如铜层。铜层事实上可以为任何预想的厚度，其取决于应用和电流要求。举例来说，铜层的厚度可以是50微米至200微米范围内。作为上面所描述的电镀工艺的替代工艺，可以使用无电镀工艺，例如无电镀镍。无电镀工艺在本领域也称为化学镀。进一步地，其它沉积方法，例如物理气相沉积(PVD)、化学气相沉积(CVD)、溅镀、旋转涂布方法、喷涂沉积或喷墨印刷都可以用于形成导电层13。
导电层13与第一主芯片表面10上的接触焊盘9电接触，并且填充沟槽11。结果，导电层13在沟槽11内的底面形成接触端子14，其暴露在模塑体70的下表面上。因此，导电层13提供用于连接“背面”芯片接触焊盘9至接触端子14的布线或者互连结构，接触端子14与半导体芯片3的“正面”接触焊盘4，5大致处于同一平面。
在一个实施例中，使用其它技术来产生布线或互连结构来替代沉积方法。举例来说，沟槽11可以用导电材料(例如焊料)填充，以提供用于延伸通过沟槽的导电元件，并且可以使金属片(如铜)与第一主芯片表面10上的接触焊盘9接合并且与延伸通过沟槽11的导电元件接合。这个工艺将结合图7A至7D在后续详细解释。
制造过程中，导电层13(由沉积产生或施加为金属片)可以被结构化。结构化可导致规则图案，例如导电线路。如果是为了制造包括以特殊方式互连的多个半导体芯片3的模组，导电层13的结构化尤其有用。
图3F中，模塑体70如上所述从载体1脱离。由于减薄步骤，模塑体70没有翘曲或弯曲，即大致平整。
应注意到，模塑体70从载体1的脱离也可以在制造工序的早期阶段完成，例如，在施加导电层13(图3E)之前或者甚至在沟槽11(图3D)产生之前。由于模塑体70没有翘曲或弯曲，可利于模塑体70脱离后所有方法的工序，且可以不需要特殊载体来调整模塑体为平整形状。
载体1和胶带2脱离后，延伸通过沟槽11的导电元件的底面、模塑材料7的底面以及包括接触焊盘4，5的第二主芯片表面6形成共同的平面。正如在图3G所示，底导电层15可以选择性地施加于该共同的平面。与导电层13类似，底部导电层12可以包括种子层(图未示)，和可以通过电镀沉积到种子层上的另一层。种子层可以为无电镀锌层，并且厚度可以高达到1微米。电镀沉积层可以是铜层，其厚度为，如高达到200微米，而且在一个实施例中，厚度在50微米到100微米范围内。沉积底部导电层15的替代方法也可以使用如上述讨论的关于导电层13的制造方法。
底部导电层15可以被结构化以形成与接触焊盘4(例如源极端子)、接触焊盘5(例如栅极端子)及延伸通过沟槽11的导电元件的底面(例如漏极端子)连接的隔离的部分16。底部导电层15的分离的部分16可以形成外部接触元件，其能够使得从外部接触半导体芯片3的漏极、源极及栅极端子(或者，更广泛的讲，位于半导体芯片的相对的面上的各种端子)。换句话说，底部导电层15的隔离的部分16可以形成组装平面，其允许将由模塑体70得到的模组(例如见图4至图6和图8至图11)安装到基底，例如电路板上。
进一步地，底部导电层15可在模组的组装侧形成再分布层(RDL)。可产生包括多个这样的再分布层的再分布结构，而不是使用一个底部导电层15。在这个再分布结构中，可提供若干结构化的导电层，其可以通过聚合物层分隔或通过通孔互连。这个再分布结构可以通过公知的薄膜技术工艺制造，且这个再分布结构可提供灵活的信号路径选择(signal routing)和迎合顾客需要的外部端子设计。
然后，模塑体70被分离得到单个模组(图3G)。每一个模组可以包括一个或多个半导体芯片3。举例来说，分离可以沿着分离线A，B，C进行。例如，分离也可以由锯切完成。
图4，5，6示出了分别沿着分离线A，B，C分离模塑体70得到的模组100，200，300。根据分离线A，得到由模塑材料7制成的模组100的一侧面7a。根据分离线B，得到由模塑材料7制成的模组200的一侧面7a，和由导电层13的导电材料制成的模组200的一侧面7b。根据分离线C，由导电层13的导电材料制成模组300的两个侧面7b。结果，在热量消除及其接合到散热器的能力方面，模组100，200，300具有不同的性质。进一步地，底部导电层15的结构设计可以取决于分离线A，B，C的选择。举例来说，模组300可以具有圆周或框架形状的外部漏极端子16.1.
图7A到7D示出了分别在图6，7，8显示的模组400，500，600的另一制造工艺的不同阶段。第一制造工序与图3A到3D示出的制造工序一样，为避免重复参考相应的描述。然后，如图7A所示，沟槽11中填充例如金属或焊料(solder)的导电材料。该导电材料形成延伸通过沟槽11的导电元件18。
导电材料可以通过印刷技术施加。举例来说，可以通过丝网印刷工艺将焊料膏挤到沟槽11中。其它技术也是可行的。
用导电元件18填充沟槽11后，见图7B，施加导电层13。为此，可以使用结合第一个实施例(图3A至3G)中描述的沉积方法。在一个实施例中，也可以将金属片19(例如，由铜制成)贴合到模塑体70的上侧。金属片19可以是任意厚度，例如，在50微米至200微米范围内。导电粘结剂，例如，焊料堆(solder deposit)(图未示)可施加到每一个接触焊盘9上，且金属片19可放置于接触到模塑体70的上侧。然后，通过加热，焊料回焊(solderreflow)可以用于将接触焊盘9和接触元件18接合到金属片19(图7B)上。结果，可得到与图3中所示的排布相似的结构。
在图7C和7D中的第二个实施例的后续制造工艺分别对应于结合图3F和3G所描述的第一个实施例的制造工艺。进一步地，图8，9和10分别所示的模组400，500，600类似于参照图4，5和6解释的模组100，200，300。如果导电元件18是焊料制成，可以省略或移除导电元件18下面的底部导电层15，且导电元件18的焊料可以用来直接将导电元件18接合到基底上。
模组100，200，300，400，500，600并不包括载体，例如导电架(leadframe)。相反的是，导电层13和15被镀制在半导体芯片3的两个主表面6，10上。导电层13提供用于“背面”互连，而底部导电层15提供用于“正面”互连以及用于安装模组100，200，300，400，500，600到基底上的组装结构。当导电层13和底部导电层15通过延伸通过沟槽11的接触元件18互连，其使得可以在模组100，200，300，400，500，600的底面上排布所有的外部接触焊盘16。此外，外部接触焊盘16与半导体芯片3的漏极及源极端子连接的表面可以比其与半导体芯片3的栅极端子连接的表面大。当较高电流流过纵向功率器件时，用于漏极和源极端子的增大的表面可以是有用的。模组100，200，300，400，500，600的稳定性由模塑材料7提供。
图11中示意性举例说明两个半导体芯片3.1，3.2如何通过使用导电层13(例如，该导电层13可以通过沉积金属层或金属片19实现)和底部导电层15而互连。举例来说，在模组700中，两个半导体芯片3.1，3.2为功率晶体管。第一半导体芯片3.1的接触焊盘9(漏极端子)通过导电层13和结构化的底部导电层15与第二半导体芯片3.2的接触焊盘4(源极端子)连接。具有如图11所示的连接，模组700能用作半桥。图12显示了两个结点N1和N2之间设置的半桥800的基本电路。半桥800包括两个串联连接的开关S1和S2。半导体芯片3.2和3.1可分别作为两个开关S1和S2实现。当与图11中所示的模组700进行比较时，结点N1是半导体芯片3.2的漏极端子(接触焊盘9)，设置在两个开关S1和S2之间的结点N3是第一半导体芯片3.1的漏极端子(接触焊盘9)，以及结点N2是第一半导体芯片3.1的源极端子(接触焊盘4)。
例如，半桥800可以在用于转换DC电压的电路，DC-DC转换器中实现。DC-DC转换器可以用来将电池或可充电电池提供的直流输入电压转换为与电路连接下游的需求所匹配的直流输出电压。DC-DC转换器可以具体实施为降压转换器，其中，输出电压小于输入电压，或者作为升压转换器，其中，输出电压大于输入电压。
回到图11，形成模组700的外部接触焊盘的底部导电层15暴露的表面16可以用于将模组700与其它部件电耦合。这在图11中示范性示出。在此，模组700安装到基底300上，例如电路板，如PCB(印刷电路板)。焊料堆31可以用于将外部接触焊盘焊接到电路板30的接触区域(图未示)。但应注意到，为了将两个半导体芯片3.1，3.2的漏极端子(接触焊盘9)电分离，导电层13已经被结构化。
在所有的模组100，200，300，400，500，600，700的顶部上，可贴合散热器或冷却元件(图未示)。散热器可以热耦合于涂覆结构化导电层13的绝缘材料(图未示)。如果电绝缘材料的导热性足够高和/或如果导电层13上的电绝缘材料的材料厚度不是太大，电绝缘材料可允许半导体芯片3.1和3.2产生的热量传递到散热器，以散去产生的热量。关于这一点，应注意到金属片19可以具体配置成形成用于散热器的安装平台。举例来说，可以装配金属片19，其中在金属层上层压顶部绝缘介电层。进一步地，金属片19可以是陶瓷基底，例如，DCB(直接铜接合)基底，的一部分。另外一种可行的是使用多层金属-介电-金属夹层结构用于金属片19以施加于模塑体(“模塑重组晶圆”)70。在这种情况下，散热器可以直接接合于多层金属片19的绝缘金属表面。
尽管在这里已经描述了具体的实施例，但本领域技术人员将意识到多种改变和/或等同实施方式可以替代示出和描述的具体实施例而不脱离本发明的范围。本申请旨在覆盖在这里讨论的具体实施例的任何修改或变型。因此，本发明旨在仅由权利要求及其等同物来限定。

Claims (26)

1.一种制造半导体器件的方法，包括：
放置至少两个半导体芯片于载体上；
用模塑材料覆盖所述至少两个半导体芯片以形成模塑体；
减薄所述模塑体直到所述至少两个半导体芯片暴露出来；
从所述至少两个半导体芯片移除所述载体，以及
使所述至少两个半导体芯片单个化。
2.如权利要求1所述的方法，进一步包括：
在减薄所述模塑体期间，减薄所述至少两个半导体芯片。
3.如权利要求2所述的方法，包括：减薄所述至少两个半导体芯片至厚度小于200微米。
4.如权利要求1所述的方法，包括：其中采用磨削或研磨进行减薄。
5.如权利要求1所述的方法，包括：其中在减薄前，嵌入了所述至少两个半导体芯片的所述模塑体的主表面具有表面水平高度方面的至少1毫米差别的弯曲，且其中所述弯曲通过所述减薄基本上被消除。
6.如权利要求1所述的方法，进一步包括：
从所述载体选择性地移除所述模塑材料的一部分以选择性地暴露所述载体的一部分。
7.如权利要求6所述的方法，其中选择性地移除所述模塑材料的一部分通过机械钻法、激光钻法和蚀刻中的至少一种来进行。
8.如权利要求6所述的方法，进一步包括：
用导电元件覆盖所述载体的选择性暴露的部分。
9.一种方法，包括：
放置至少两个半导体芯片于载体上；
用模塑材料覆盖所述至少两个半导体芯片以形成模塑体；
减薄所述模塑体直到所述至少两个半导体芯片暴露出来；
在减薄所述模塑体后，施加第一导电材料层于所述至少两个半导体芯片之上，其中所述第一导电材料层与所述至少两个半导体芯片上的接触焊盘电连接；
从所述至少两个半导体芯片移除所述载体，以及
使所述至少两个半导体芯片单个化。
10.如权利要求9所述的方法，包括：通过沉积工艺施加所述第一层的导电材料。
11.如权利要求9所述的方法，包括：通过贴附金属片于所述接触焊盘施加所述第一层的导电材料。
12.如权利要求9所述的方法，进一步包括：
沉积第二导电材料层于已经从所述载体脱离的所述至少两个半导体芯片的主表面之上。
13.如权利要求12所述的方法，进一步包括：
结构化所述第二导电材料层以形成所述模组的外部端子。
14.一种模组，包括：
半导体芯片，其具有第一主芯片表面、第二主芯片表面和所述第一主芯片表面上的接触焊盘；
模塑模组体，其由模塑材料制得，用于收容所述半导体芯片，所述模塑模组体具有第一模塑表面、第二模塑表面及沟槽，所述沟槽开于所述第一模塑表面和所述第二模塑表面；
第一导电材料层，其施加于所述第一主芯片表面和所述第一模塑表面之上，所述第一导电材料层与所述接触焊盘电连接，以及，
导电元件，其与所述第一导电材料层电连接，且延伸通过所述沟槽。
15.如权利要求14所述的模组，包括：其中所述模塑模组体由环氧材料制得。
16.如权利要求14所述的模组，进一步包括：
至少另一个接触焊盘，其位于所述第二主芯片表面上。
17.如权利要求14所述的模组，包括：其中所述半导体芯片为功率半导体芯片。
18.如权利要求14所述的模组，包括：其中所述第一导电材料层的厚度大于10微米，尤其50微米。
19.如权利要求14所述的模组，包括：其中所述第一导电材料层为沉积的金属层。
20.如权利要求19所述的模组，包括：其中所述导电元件是由沉积的金属制得的所述第一层的组成部分。
21.如权利要求14所述的模组，其中所述第一导电材料层为金属片。
22.如权利要求14所述的模组，包括：其中所述导电元件由焊料材料制得。
23.如权利要求14所述的模组，进一步包括：
第二导电材料层，其施加至所述第二主芯片表面之上。
24.一种模组，包括：
半导体芯片，其具有第一主芯片表面、第二主芯片表面和所述第一主芯片表面上的第一接触焊盘和所述第二主芯片表面上的第二接触焊盘；
模塑模组体，其由模塑材料制得，用于收容所述半导体芯片，所述模塑模组体具有第一模塑表面和第二模塑表面；
第一导电材料层，其施加于所述第一主芯片表面和所述第一模塑表面之上，所述导电材料层与所述第一接触焊盘电连接，以及
第二导电材料层，其施加于所述第二主芯片表面和所述第二模塑表面之上，所述第二导电材料层与所述第二接触焊盘电连接。
25.如权利要求24所述的模组，包括：其中所述第二导电材料层结构化以形成所述模组的外部端子。
26.一种模组，包括：
半导体芯片，其具有第一主芯片表面、第二主芯片表面和所述第一主芯片表面上的接触焊盘；
模塑模组体，其由模塑材料制得，用于收容所述半导体芯片，所述模塑模组体具有第一模塑表面、第二模塑表面及沟槽，所述沟槽开于所述第一模塑表面和所述第二模塑表面；
第一导电材料层，其施加于所述第一主芯片表面和所述第一模塑表面之上，所述第一导电材料层与所述接触焊盘电连接，以及
导电元件，其与所述第一导电材料层电连接，并且延伸通过所述沟槽。
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