CN103199069B - 包含两个功率半导体芯片的器件及其制造 - Google Patents

包含两个功率半导体芯片的器件及其制造 Download PDF

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Publication number
CN103199069B
CN103199069B CN201210599161.8A CN201210599161A CN103199069B CN 103199069 B CN103199069 B CN 103199069B CN 201210599161 A CN201210599161 A CN 201210599161A CN 103199069 B CN103199069 B CN 103199069B
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semiconductor chip
power semiconductor
contact pad
mosfet
metal level
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CN103199069A (zh
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J·赫格劳尔
J·洛德迈耶
J·马勒
R·奥特伦巴
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

包含两个功率半导体芯片的器件及其制造。一种器件，包含在第一面上具有第一接触焊盘和第二接触焊盘以及在第二面上具有第三接触焊盘的第一功率半导体芯片。该器件进一步包含在第一面上具有第一接触焊盘和第二接触焊盘以及在第二面上具有第三接触焊盘的第二功率半导体芯片。将该第一和第二功率半导体芯片布置成一个在另一个之上，并且该第一功率半导体芯片的第一面面向第二功率半导体芯片的第一面的方向。此外，该第一功率半导体芯片横向上至少部分地位于该第二功率半导体芯片的轮廓外部。

Description

包含两个功率半导体芯片的器件及其制造
技术领域
本发明涉及一种包含两个功率半导体芯片的器件及其制造方法。
背景技术
功率半导体芯片是一种设计为处理大功率级的特定类型的半导体芯片。特别是，功率半导体芯片适合于开关和控制电流和/或电压。可将它们实施为功率MOSFET、IGBT、JFET以及功率双极晶体管。在大多数电源、DC至DC转换器以及电动机控制器中能够发现功率半导体芯片。功率半导体芯片为了例如半桥式电路的特定应用可以堆叠在彼此顶部之上。
发明内容
根据本发明的一个实施例，提供一种器件，包含：
具有第一面和与第一面相对的第二面的第一功率半导体芯片，其中第一接触焊盘和第二接触焊盘布置在第一面上且第三接触焊盘布置在第二面上；以及
具有第一面和与第一面相对的第二面的第二功率半导体芯片，其中第一接触焊盘和第二接触焊盘布置在第一面上并且第三接触焊盘布置在第二面上；
其中布置该第一和第二功率半导体芯片以使得该第一功率半导体芯片的第一面面向第一方向并且该第二功率半导体芯片的第一面面向与第一方向相反的第二方向，以及
其中该第一功率半导体芯片横向上至少部分地位于该第二功率半导体芯片的轮廓外部。
根据本发明的另一个实施例，提供一种器件，包含：
具有第一面和与第一面相对的第二面的第一MOSFET功率半导体芯片，其中源极接触焊盘和栅极接触焊盘布置在第一面上并且漏极接触焊盘布置在第二面上；以及
具有第一面和与第一面相对的第二面的第二MOSFET功率半导体芯片，其中源极接触焊盘和栅极接触焊盘布置在第一面上并且漏极接触焊盘布置在第二面上：
其中该第一和第二MOSFET功率半导体芯片布置为一个位于另一个之上；以及
该第一MOSFET功率半导体芯片的第一面面向该第二MOSFET功率半导体芯片的第一面。
根据本发明的又一个实施例，提供一种方法，包括：
提供具有第一面和与第一面相对的第二面的第一功率半导体芯片，其中第一接触焊盘和第二接触焊盘布置在第一面上并且第三接触焊盘布置在第二面上；
提供具有第一面和与第一面相对的第二面的第二功率半导体芯片，其中第一接触焊盘和第二接触焊盘布置在第一面上并且第三接触焊盘布置在第二面上；以及
布置第一和第二功率半导体芯片以使得该第一功率半导体芯片的第一面面向第一方向并且该第二功率半导体芯片的第一面面向与第一方向相反的第二方向，并且该第一功率半导体芯片横向上至少部分地位于该第二功率半导体芯片的轮廓外部。
附图说明
附图被包括用以提供对实施例的进一步的理解并且被并入和构成该说明书的一部分。这些图示出实施例并且与具体实施方式一起用来解释实施例的原理。将容易领会其它实施例和实施例的多个预期的优点，同时参考以下详细描述它们将变得更好理解。这些图的元件不一定相对于彼此按比例绘制。相似的参考数字表示相应的相似部分。
图1示意性地示出了包括两个被布置为一个位于另一个之上的功率半导体芯片的器件的一个实施例的截面图；
图2A-2O示意性地示出了包括将两个功率半导体芯片以面对面的位置布置在彼此之上以及将两个功率半导体芯片彼此耦合的方法的一个实施例的截面图；
图3示出了半桥式电路的基本电路；以及
图4示意性地示出了包括安装在电路板上的图2O中所示的器件的系统的一个实施例的截面图。
具体实施方式
在下面的详细描述中，参考附图，这些附图构成了详细描述的一部分，在这些图中借助图示示出了可以实施本发明的特定实施例。在这方面，方向性的术语，例如：“顶部”、“底部”、“前”、“后”、“前面”、“后面”等等，是参考所描述的图的方向来使用的。由于实施例的部件可被定位在许多不同的方向上，因此方向性的术语仅用于说明的目的，并且决不是限制性的。应当理解也可以利用其它实施例，并且可以在不脱离本发明的范围的情况下做出结构或逻辑改变。因此，下面的详细描述不是在限制的意义上进行的，并且本发明的范围将由所附权利要求来限定。
除非另外特别说明，应当理解在此所描述的各示例性实施例的特征可以相互组合。
如该说明书中所采用的，术语“耦合”和/或“电耦合”并非意味着意指所述元件必须直接耦合在一起；可在所述“耦合”或“电耦合”元件之间提供介入元件。
下面描述包含半导体芯片、特别是功率半导体芯片的器件。半导体芯片可以是不同类型的、可以由不同工艺制造以及可以包括例如集成电路、光电电路或机电电路或无源电路。例如，集成电路可以设计为逻辑集成电路、模拟集成电路、混合信号集成电路、功率集成电路、存储器电路或集成无源电路。而且，半导体芯片可配置为所谓的MEMS(微机电系统)以及可以包含例如桥、隔膜或舌结构的微机械机构。半导体芯片可配置为传感器或致动器，例如压力传感器、加速度传感器、旋转传感器、磁场传感器、电磁场传感器、扩音器等。半导体芯片不需要由特定半导体材料制造，例如Si、SiC、SiGe、GaAs，而且，可包括诸如例如绝缘体、塑料或金属的非半导体的无机和/或有机材料。而且，半导体芯片可以是封装的或未封装的。
特别地，可以涉及具有垂直结构的半导体芯片，也就是说半导体芯片可用这种方式制造，即电流可以在垂直于半导体芯片的主面的方向上流动。具有垂直结构的半导体芯片在其两个主面、也就是说在其顶面和底面上具有电极。特别地，功率半导体芯片可具有垂直结构并且在两主面上均具有负载电极。垂直功率半导体芯片可以例如配置为功率MOSFET(金属氧化物半导体场效应晶体管)、IGBT(绝缘栅双极晶体管)、JFET(结型场效应晶体管)或功率双极晶体管。作为例子，功率MOSFET的源电极和栅电极可以位于一个面上，而功率MOSFET的漏电极布置在另一个面上。此外，下面描述的器件可以包括控制功率半导体芯片的集成电路的集成电路。
半导体芯片具有允许形成与在半导体芯片中所包含的集成电路电接触的接触焊盘(或接触元件或端子)。接触焊盘可以包括被施加到半导体材料的一个或多个金属层。金属层可以用任何期望的几何形状和任何期望的材料组分来制造。金属层可以例如是覆盖一区域的层的形式。任何期望的金属或金属合金，例如铝、钛、金、银、铜、钯、铂、镍、铬或镍钒，可用作该材料。金属层不必是同质的或仅由一种材料制造，也就是说可以在金属层中包含多种组分和浓度的材料。
可提供具有导线(或导轨)形状的一个或多个金属层并可将其电耦合到半导体芯片。例如，金属层可以用于形成再分配层。导线可用作配线层以从器件外部与半导体芯片形成电接触和/或与该器件内所包含的其它半导体芯片和/或元件形成电接触。导线可以将半导体芯片的接触焊盘耦合到外部接触焊盘。导线可以用任何期望的几何形状和任何期望的材料组分来制造。任何期望的金属，例如铝、镍、钯、银、锡、金或铜，或者金属合金，可用作该材料。导线不必同质或仅由一种材料制造，也就是说可以在导线中包含多种组分和浓度的材料。而且，导线可置于电绝缘层之上或之下或之间。
下面所描述的器件包含外部接触焊盘(或外部接触元件)，其可为任何形状和尺寸。外部接触焊盘可从器件外部接入并且可以由此允许从器件的外部形成与半导体芯片的电接触。而且，外部接触焊盘可为导热的并且可用作热沉，用于将半导体芯片产生的热消散。外部接触焊盘可由任何期望的导电材料构成，例如，诸如铜、铝或金的金属、金属合金或导电有机材料。外部接触焊盘可由金属层的多个部分形成。可将诸如焊料球或焊料凸块的焊料材料沉积在外部接触焊盘上。
可以利用密封材料覆盖半导体芯片或者至少部分的半导体芯片，密封材料可以是电绝缘的并且可以形成密封体。密封材料可以是任何适合的硬质塑料、热塑性塑料或热固性材料或者层压材料(半固化片(prepreg))并且可以包括填料材料。可以采用多种方法来利用密封材料密封半导体芯片，例如压塑法、注塑法、粉料模塑法、液体模塑法或层压法。热和/或压力可以用于施加密封材料。
密封材料可用于制作扇出型封装。在扇出型封装中，外部接触焊盘和/或将半导体芯片连接至外部接触焊盘的导线中的至少一些横向地位于半导体芯片的轮廓外部或者至少与半导体芯片的轮廓相交。因此，在扇出型封装中，半导体芯片的封装的外围外部部分通常(额外地)用于将封装电接合到外部应用，例如应用板等。包围半导体芯片的封装的该外部部分有效地扩大了封装相对于半导体芯片的占位空间的接触面积，由此导致关于以后的处理，例如二级组装，在封装焊盘尺寸和间距方面的放松的限制。
每一器件具有至少一个安装表面。安装表面用于将器件安装到另一部件之上，例如诸如PCB(印刷电路板)的电路板。外部接触元件以及特别是外部接触表面可以布置在安装表面上以允许将器件电耦合至器件被安装于其上的部件。例如焊料球的焊料沉积物或者其他适当的连接元件可用于在器件与器件被安装于其上的部件之间建立电连接以及特别是机械连接。
图1示意性地示出了器件100的截面图。器件100包含具有第一面11和与第一面11相对的第二面12的功率半导体芯片10。第一接触焊盘13和第二接触焊盘14布置在第一面11上，并且第三接触焊盘15布置在第一功率半导体芯片10的第二面12上。此外，器件100包含具有第一面21和与第一面21相对的第二面22的第二功率半导体芯片20。第一接触焊盘23和第二接触焊盘24布置在第一面21上，并且第三接触焊盘25布置在第二功率半导体芯片20的第二面22上。
在器件100中，第一和第二功率半导体器件10、20布置为一个位于另一个之上。第一功率半导体芯片10的第一面11面向第一方向1，并且第二功率半导体芯片20的第一面21面向与第一方向1相反的第二方向2。此外，第一功率半导体10横向上至少部分地位于第二功率半导体芯片20的轮廓27的外部。
图2A-2O、统称为图2，示意性地示出了图2O中所示的器件200的制造方法的实施例。器件200是图1所示器件100的实施方式。下面所描述的器件200的细节由此同样可应用于器件100。器件100和200的类似或相同部件由相同的参考数字标记。
图2A以截面图示意性地示出了第一功率半导体芯片10和第二功率半导体芯片20。第一功率半导体芯片10具有第一面11和第二面12。第一接触焊盘13和第二接触焊盘14布置在第一面11上，并且第三接触焊盘15布置在功率半导体芯片10的第二面12上。第二功率半导体芯片20具有第一面21和第二面22。第一接触焊盘23和第二接触焊盘24布置在第一面21上，并且第三接触焊盘25布置在功率半导体芯片20的第二面22上。两个功率半导体芯片10、20的第一和第三接触焊盘13、15、23、25是负载电极。两个功率半导体芯片10、20的第二接触焊盘14、24是控制电极。
第一功率半导体芯片10和第二功率半导体芯片20中的每一个都配置为功率晶体管，例如功率MOSFET、IGBT、JFET或功率双极晶体管。在功率MOSFET或JFET的情况下，第一接触焊盘13、23是源电极，第二接触焊盘14、24是栅电极，并且第三接触焊盘15、25是漏电极。在IGBT情况下，第一接触焊盘13、23是发射极电极，第二接触焊盘14、24是栅电极，并且第三接触焊盘15、25是集电极电极。在功率双极晶体管情况下，第一接触焊盘13、23是发射极电极，第二接触焊盘14、24是基极电极，并且第三接触焊盘15、25是集电极电极。在工作期间，可将高于5、50、100、500或1000V的电压施加在第一和第三接触焊盘13、15、23、25之间。施加到第二接触焊盘14、24的开关频率可以在从1KHz到100MHz的范围内，但是还可以在此范围之外。
功率半导体器件10、20分别包括半导体衬底16、26，其由合适的半导体材料制成，例如Si、SiC、SiGe或GaAs，并且包含n-和/或p-掺杂区域。接触焊盘13-15，23-25中的每一个包括施加到半导体衬底16、26的一个或多个金属层。所述金属层可由任何期望的几何图形和任何期望的材料组分制造。例如，金属层可以是覆盖一区域的层的形式。任何期望的金属或金属合金，例如，铝、钛、金、银、铜、钯、铂、镍、铬或镍钒，可用作该材料。各个金属层中的每一个可以具有特定功能。金属层之一的功能是形成至半导体衬底16、26的掺杂区域的电接触。金属层中的另一个用作在焊接工艺期间保护半导体衬底16、26的扩散阻挡层。金属层之一的另一功能是能够使另一金属层粘附到半导体衬底16、26的粘附层的功能。
在一个实施例中，第一和第二功率半导体芯片10、20尺寸相同。特别地，第一和第二功率半导体芯片10、20的第一面11、21的表面积相同。此外，功率半导体芯片10、20的高度可以大约为20μm。在一个实施例中，第一和第二功率半导体芯片10、20的尺寸是不同的。例如，稍后用作低边开关的第一功率半导体芯片10比用作高边开关的第二功率半导体芯片20大。
图2B示意性地示出了粘性载体箔30、31。第一和第二功率半导体芯片10、20分别可拆卸地附着在粘性载体箔30、31上，使得它们的第一面11、21面向粘性载体箔30、31。因此，第一和第二接触焊盘13、14、23、24粘附到粘性载体箔30、31。一种拾取及放置机器可用于把功率半导体芯片10、20放置在粘性载体箔30、31上。
图2C示意性地示出了载体32、33。载体32、33可由铜或其他适当的材料制造，例如镍、钢、不锈钢、层压材料或材料叠层。载体32、33的每一个具有至少一个可以放置器件200的部件的平面。载体32、33的形状不限于任何几何形状，例如载体32、33为圆形或者方形。载体32、33分别具有任何适当尺寸和厚度d1、d2。在一个实施例中，载体32、33具有相同的厚度d1、d2。在一个实施例中，厚度d1、d2大约是70μm。
金属层34、35分别置于载体32、33上。在一个实施例中，金属层34、35为铜箔。金属层34、35可通过例如双面胶带的粘性带附着到载体32、33。金属层34、35分别具有厚度d3、d4。在一个实施例中，金属层34、35具有相同厚度d3、d4。在一个实施例中，厚度d3、d4大约是12μm。
粘性载体箔30、31被放置在载体32、33上以使功率半导体芯片10、20附着到金属层34、35，其中功率半导体芯片10、20的第二面12、22面向金属层34、35。
在一个实施例中，通过扩散焊接将功率半导体芯片10、20分别电耦合和机械耦合到金属层34、35。为此，将焊料材料沉积在第三焊接触焊盘15、25上或者可替换地沉积在第三接触焊盘15，25和金属层34、35的接触区上。在一个实施例中，当功率半导体芯片10、20仍然处于晶片接合时，将焊料材料沉积在第三接触焊盘15、25上，这意味着在单体化半导体晶片以提供单个半导体芯片之前将焊料材料沉积在半导体晶片上。在一个实施例中，焊料材料包含AuSn、AgSn、CuSn、Sn、AuIn、AgIn、AuSi或CuIn。
在一个实施例中，功率半导体芯片10、20和载体32、33连同金属层34、35一起被置于炉中并且被加热到适当的温度以将焊料材料熔化。在焊接工艺期间功率半导体芯片10、20可以被按压在金属层34、35上达合适的时间。焊料材料于是在功率半导体芯片10、20和金属层34、35之间产生金属接点，通过利用高熔点材料的第三接触焊盘15、25和金属层34、35，焊料材料形成耐温且高度机械稳定的金属间相的事实，其能够耐得住高温。金属间相具有比用于产生金属间相的焊料材料更高的熔化温度。在该工艺中，低熔点焊料材料完全被转化，即，其完全变成金属间相。在一个实施例中，功率半导体芯片10、20和金属层34、35被暴露于大约250℃的温度达45分钟。
在一个实施例中，通过导电粘合剂分别将功率半导体芯片10、20电耦合和机械耦合到金属层34、35。导电粘合剂可基于环氧树脂并且富含金、银、镍或铜以产生导电性。可在把功率半导体芯片10、20放置在金属层34、35上之前将粘合剂丝网印刷在金属层34、35上。粘合剂可被加热到特定温度以将粘合剂固化。
图2D示意性地示出了在粘性载体箔30、31被去除以后分别牢固地附着到金属层34、35的功率半导体芯片10、20。尽管图2D示出了仅一个第一功率半导体芯片10和一个第二功率半导体芯片20，但是可将更多的第一和第二功率半导体芯片10、20分别附着到金属层34、35。例如，超过50或100或500个的第一和第二功率半导体芯片10、20可被分别附着到金属层34、35。
通过蚀刻工艺使金属层34、35的暴露表面粗糙化，以便改善在下一步骤中将沉积在金属层34、35上的层压材料的附着力。
图2E示意性地示出了分别附着到金属层34、35的层状金属箔40、41。在一个实施例中，功率半导体芯片10、20未被层状金属箔40、41覆盖。层状金属箔40、41分别具有可以相同的厚度d5、d6。在一个实施例中，厚度d5、d6大约是35μm。
层状金属箔40、41由合适的绝缘材料制成，例如聚合物材料。在一个实施例中，聚合物材料是半固化片，其是例如玻璃或碳纤维的纤维层化合物和例如硬质塑料的树脂的组合。半固化片材料通常用于制作PCB。众所周知的用于PCB工业中并且在此可用作聚合物材料的半固化片材料是：FR-2、FR-3、FR-4、FR-5、FR-6、G-10、CEM-1、CEM-2、CEM-3、CEM-4和CEM-5。半固化片是一种双阶段材料，当施加到金属层34、35时其是柔性的并且在热处理期间硬化。在PCB制造中可将相同或相似的工艺步骤用于半固化片的层压。
图2F示意性地示出了载体32被置于载体33之上以使第一功率半导体芯片10的第一面11面向第一方向1，同时第二功率半导体芯片20的第一面21面向第二方向2。在一个实施例中，第一方向1与第一功率半导体芯片10的第一面11垂直，第二方向2与第二功率半导体芯片20的第一面21垂直，并且第一方向1和第二方向2形成180°角。特别地，第一功率半导体芯片10的第一面11面向第二功率半导体芯片20的第一面21的方向。
图2G示意性地示出了随后将载体32按压到载体33上。热和压力被施加以将层状箔40、41层压在一起从而产生层压层42。层压层42将功率半导体芯片10、20密封并且覆盖第一面11、21和功率半导体芯片10、20的侧面。此外，第一功率半导体芯片10横向上至少部分地位于第二功率半导体20的轮廓27的外部。轮廓27可由第二功率半导体20的侧面28限定。因此，在一个实施例中，第一功率半导体芯片10的第一部分位于第二功率半导体20的轮廓27之内，并且第一功率半导体芯片10的第二部分位于第二功率半导体20的轮廓27的外部。在一个实施例中，第一功率半导体芯片10横向上完全地位于第二功率半导体20的轮廓27的外部。两个功率半导体芯片10、20之间的垂直距离可以通过改变层状金属箔40、41的厚度d5、d6来改变。
图2H示意性地示出了移除载体32、33。如果载体32、33是通过粘性带附着到金属层34、35，则粘性带也被移除。
图2I示意性地示出了在结构化步骤之后的金属层34、35以便限定通路的位置。为此目的，可以将于性抗蚀剂膜层压到可光学构造的金属层34、35上(图2I未示出)。通过暴露于具有合适的波长的光，可以在抗蚀剂膜中形成凹进。为此，可采用穿过掩模的激光束或曝光光。随后，抗蚀剂膜被显影并且因此金属层34、35的暴露部分被刻蚀且在金属层34、35中产生了凹进43。然后抗蚀剂膜被剥离，并且仅保留被结构化的金属层34、35，如图2I所示。
图2J示意性地示出了穿过层压层42的通孔44。通过在金属34、35中的凹进43的位置处进行激光钻孔来形成通孔44。通孔44暴露功率半导体芯片10、20的第一和第二接触焊盘13、14、23、24的至少多个部分。至少其中一个通孔44从金属层34中的凹进43穿过整个层压层42到达金属层35并且因此暴露金属层35的一部分。暴露功率半导体芯片10、20的部分第一和第二接触焊盘13、14、23、24的通孔44具有直径d7，其为例如大约70μm。暴露部分金属层35的通孔44具有直径d8，其为例如大约100μm。
图2K示意性地示出了通过采用电流电镀工艺分别沉积在金属层34、35上的金属层50、51。金属层50、51的材料可以是任何合适的金属或金属合金，例如铜或铝。金属层50、51还将层压层42中所产生的通孔44填充。金属层50、51在层压层42中形成通路并且将功率半导体芯片10、20的第一和第二接触焊盘13、14、23、24电耦合至金属层34、35。金属层50、51分别具有厚度d9、d10，其可以大约是38μm。
图2L示意性地示出了在结构化步骤之后的金属层34、35、50、51以便制作下面描述的外部接触焊盘。此外，构造金属层34、50以使第一功率半导体芯片10的第三接触焊盘15电耦合到第二功率半导体芯片20的第一接触焊盘23。此外，通过蚀刻工艺使得金属层50、51的暴露表面粗糙化，以改善在下一步骤中沉积在金属层50、51上的阻焊剂的附着力。
图2M示意性地示出了分别被层压在金属层50、51上的阻焊剂层52、53。构造阻焊剂层52、53以暴露部分金属层50、51。金属层50、51的暴露部分形成外部接触焊盘54-58。外部接触焊盘54-58允许从器件200外部形成与功率半导体芯片10、20的电接触。为此目的，外部接触焊盘54被电耦合到第一功率半导体芯片10的第三接触焊盘15和第二功率半导体芯片20的第一接触焊盘23。外部接触焊盘55被电耦合到第一功率半导体芯片10的第二接触焊盘14。外部接触焊盘56电耦合到第一功率半导体芯片10的第一接触焊盘13。外部接触焊盘57电耦合到第三功率半导体芯片20的第三接触焊盘25。外部接触焊盘58电耦合到第二功率半导体芯片20的第二接触焊盘24。
图2N示意性地示出了通过印刷和回流工艺沉积在外部焊盘54-58上的焊料凸块59。
图2O示意性地示出了通过锯割或切割使器件200彼此分离。图2O中所示的器件200具有两个主表面60、61。两个主表面60、61都可用作安装表面以将器件200安装到另一部件，例如诸如PCB(印刷电路板)的电路板。由于器件200的制造工艺，可按需要选取两个功率半导体芯片10、20的横向位置，由此功率半导体芯片10、20之间的任何横向距离都是可能的。如图2O所示的功率半导体芯片10和20之间的距离改进了从功率半导体芯片10、20的热传递。
图3示出了设置在两个节点N1和N2之间的半桥电路的基本电路300。半桥电路由两个串联连接的开关S1和S2构成。器件200的功率半导体芯片20、10可分别由开关S1和S2实现。可将恒定电势施加到节点N1和N2。例如，可将诸如10、50、100、200、500或1000V或任何其他电势的高电势施加到节点N1，并将例如0V的低电势施加到节点N2。因此，第一功率半导体芯片10是低边开关，而第二功率半导体芯片20是高边开关。开关S1和S2可在自1KHz至100MHz之间的频率范围内被切换，但开关频率还可在此范围之外。这意味着在半桥电路工作期间将变化的电势施加到位于开关S1和S2之间的节点N3。节点N3的电势在低电势和高电势之间的范围内变化。
半桥电路可以例如以用于转换DC电压的电子电路来实施，即所谓的DC-DC转换器。DC-DC转换器可用于把电池或可充电电池提供的DC输入电压转换为匹配连接下游的电子电路的要求的DC输出电压。DC-DC转换器可具体实施为降压转换器，其中输出电压低于输入电压，或者可具体实施为升压转换器，其中输出电压高于输入电压。可以将几MHz或更高的频率应用于DC-DC转换器。而且，高达50A或甚至更高的电流可以流过DC-DC转换器。
图4示意性地示出了包含器件200和电路板70的系统400的截面图。器件200被安装在电路板70上，其中安装表面60面向电路板70。通过焊料凸块59将器件200的外部接触焊盘55-58电耦合及机械耦合到电路板70的接触焊盘71。此外，将金属夹72安装在器件200的表面61上，并且金属夹72将器件200的外部接触焊盘54电耦合至电路板70。可将另外的部件，例如电感器或电容器，安装到电路板70上。系统400也可用作将被集成到其他系统中的子模块。
此外，尽管可能已经仅相对于几个实施方式中的一个公开了本发明的实施例的特定特征或方面，但是这样的特征或方面可与可能期望的其它实施方式的一个或多个其它特征或方面组合，并且对于给定的或特定的应用是有利的。而且，就术语“包含”、“具有”、“含有”或者在详细描述或权利要求中所采用的其其它变型来说，这些术语旨在以类似于术语“包括”的方式是包括性的。而且，应当理解，本发明的实施例可以以分立电路、部分集成电路或全部集成电路或编程装置来实现。而且，术语“示例性的”仅意味着作为实例，而非是最佳或最优的。还应当认识到，在此所描述的特征和/或元件，为了简单和易于理解的目的相对于彼此以特定尺寸示出，并且实际的尺寸可以与在此所示的尺寸显著不同。
尽管在这里已经示出并描述了具体的实施例，但本领域技术人员将意识到多种改变和/或等价实施方式可以替代示出和描述的具体实施例而不脱离本发明的范围。本申请旨在覆盖在这里讨论的具体实施例的任何改编或变型。因此，本发明旨在仅由权利要求及其等价物来限制。

Claims (20)

1.一种包括第一功率半导体芯片和第二功率半导体芯片的器件，
第一功率半导体芯片具有第一面和与第一面相对的第二面，其中第一接触焊盘和第二接触焊盘布置在第一面上且第三接触焊盘布置在第二面上；以及
第二功率半导体芯片具有第一面和与第一面相对的第二面，其中第一接触焊盘和第二接触焊盘布置在第一面上并且第三接触焊盘布置在第二面上；
其中布置该第一和第二功率半导体芯片以使得该第一功率半导体芯片的第一面面向第一方向并且该第二功率半导体芯片的第一面面向与第一方向相反的第二方向，以及
其中该第一功率半导体芯片横向上至少部分地位于该第二功率半导体芯片的轮廓外部；
进一步包含附着到该第一功率半导体芯片的第二面的第一金属层；
其中该第一金属层将该第一功率半导体芯片的第三接触焊盘电耦合至该第二功率半导体芯片的第一接触焊盘。
2.根据权利要求1所述的器件，其中该第一功率半导体芯片横向上完全位于该第二功率半导体芯片的轮廓外部。
3.根据权利要求1所述的器件，进一步包含附着到该第二功率半导体芯片的第二面的第二金属层。
4.根据权利要求3所述的器件，其中该第一金属层和该第二金属层具有相同的厚度。
5.根据权利要求1所述的器件，其中该第一金属层的表面形成第一外部接触焊盘。
6.根据权利要求3所述的器件，其中该第二金属层的表面形成第二外部接触焊盘。
7.根据权利要求1所述的器件，其中该第一和第二功率半导体芯片的第一、第二和第三接触焊盘分别是源电极、栅电极和漏电极。
8.根据权利要求1所述的器件，其中该第一和第二功率半导体芯片均是功率MOSFET、IGBT、JFET或功率双极晶体管。
9.根据权利要求1所述的器件，其中该第一功率半导体芯片和第二功率半导体芯片在半桥电路中相互耦合。
10.根据权利要求1所述的器件，其中该第一功率半导体芯片和第二功率半导体芯片是相同尺寸。
11.一种包括第一MOSFET功率半导体芯片和第二MOSFET功率半导体芯片的器件，
其中第一MOSFET功率半导体芯片具有第一面和与第一面相对的第二面，其中源极接触焊盘和栅极接触焊盘布置在第一面上并且漏极接触焊盘布置在第二面上；以及
第二MOSFET功率半导体芯片具有第一面和与第一面相对的第二面，其中源极接触焊盘和栅极接触焊盘布置在第一面上并且漏极接触焊盘布置在第二面上；
其中该第一和第二MOSFET功率半导体芯片布置为一个位于另一个之上；以及
该第一MOSFET功率半导体芯片的第一面面向该第二MOSFET功率半导体芯片的第一面；
进一步包含附着到该第一MOSFET功率半导体芯片的第二面的第一金属层；
其中该第一金属层将该第一MOSFET功率半导体芯片的漏极接触焊盘电耦合至该第二MOSFET功率半导体芯片的源极接触焊盘。
12.根据权利要求11所述的器件，其中该第一MOSFET功率半导体芯片横向上完全位于该第二MOSFET功率半导体芯片的轮廓外部。
13.一种用于制造包括第一功率半导体芯片和第二功率半导体芯片的器件的方法，包括：
提供具有第一面和与第一面相对的第二面的第一功率半导体芯片，其中第一接触焊盘和第二接触焊盘布置在第一面上并且第三接触焊盘布置在第二面上；
提供具有第一面和与第一面相对的第二面的第二功率半导体芯片，其中第一接触焊盘和第二接触焊盘布置在第一面上并且第三接触焊盘布置在第二面上；以及
布置第一和第二功率半导体芯片以使得该第一功率半导体芯片的第一面面向第一方向并且该第二功率半导体芯片的第一面面向与第一方向相反的第二方向，并且该第一功率半导体芯片横向上至少部分地位于该第二功率半导体芯片的轮廓外部；进一步包括把第一金属层附着到该第一功率半导体芯片的第二面；
通过该第一金属层将该第一功率半导体芯片的第三接触焊盘电耦合至该第二功率半导体芯片的第一接触焊盘。
14.根据权利要求13所述的方法，进一步包括把第二金属层附着到该第二功率半导体芯片的第二面。
15.根据权利要求14所述的方法，进一步包括：
将第一层状金属箔附着到该第一金属层；以及
将第二层状金属箔附着到该第二金属层。
16.根据权利要求15所述的方法，进一步包括将该第一层状金属箔层压到该第二层状金属箔以制作层压层。
17.根据权利要求16所述的方法，进一步包括在该层压层中制作通路。
18.根据权利要求17所述的方法，其中所述通路电耦合至该第一和第二金属层。
19.根据权利要求13所述的方法，其中该第一和第二功率半导体芯片的第一、第二和第三接触焊盘分别是源电极、栅电极和漏电极。
20.根据权利要求13所述的方法，其中该第一和第二功率半导体芯片均是功率MOSFET、IGBT、JFET或功率双极晶体管。
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