CN104425470A - 半导体模块及其通过扩展嵌入技术的制造方法 - Google Patents

半导体模块及其通过扩展嵌入技术的制造方法 Download PDF

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Publication number
CN104425470A
CN104425470A CN201410419670.7A CN201410419670A CN104425470A CN 104425470 A CN104425470 A CN 104425470A CN 201410419670 A CN201410419670 A CN 201410419670A CN 104425470 A CN104425470 A CN 104425470A
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China
Prior art keywords
semiconductor
chip
holder
encapsulated layer
via hole
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CN201410419670.7A
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English (en)
Inventor
J·赫格尔
E·富尔古特
G·贝尔
O·霍尔菲尔德
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of CN104425470A publication Critical patent/CN104425470A/zh
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Abstract

半导体模块包括载件，布置在载件上的多个半导体晶体管芯片，布置在载件上的多个半导体二极管芯片，布置在半导体晶体管芯片和半导体二极管芯片之上的封装层，以及布置在封装层之上的金属化层。金属化层包括在半导体晶体管芯片和半导体二极管芯片的选定一个之间形成电连接的多个金属区域。

Description

半导体模块及其通过扩展嵌入技术的制造方法
技术领域
在此所述的实施例总体涉及半导体模块，并且更具体地涉及诸如在功率转换器电路中采用的半导体功率芯片，以及制造半导体模块的方法。
背景技术
在许多电子系统中，需要采用类似DC/DC转换器、AC/DC转换器或DC/AC转换器的转换器以便于产生类似例如将要由电动机驱动电路所使用的电流、电压和/或频率。如前所述的转换器电路通常包括一个或多个半桥电路，每一个由诸如功率MOSFET器件的两个半导体功率开关提供，以及与晶体管器件并联的诸如二极管的其他部件，以及诸如电感器和电容器的无源部件。功率MOSFET器件的开关切换可以由半导体控制芯片控制。转换器电路的数个部件可以原则上提供为安装在印刷电路板上的单个部件。备选地，部件的配对或者所有部件可以容纳在单个外壳中以形成多芯片模块，其可以具有的优点在于简化了在电路板上整个转换器电路的组装以及可以减小电路板上所需的空间。然而，关于在晶体管、二极管和无源部件之间形成互连仍然是重要的问题。特别地，存在特定需求以提供具有伴随有低寄生电感的短路互连的半导体芯片模块，以及此外提供具有改进的或者满足散热特性的半导体功率模块。
发明内容
根据半导体模块的一个实施例，半导体模块包括载件，布置在载件上的多个半导体芯片，布置在半导体芯片之上的封装层，以及布置在封装层之上的金属化层。金属化层包括多个金属区域，其形成了在半导体芯片的选定芯片之间的电连接。
根据半导体模块的另一实施例，半导体模块包括载件，布置在载件上的多个半导体晶体管芯片，布置在载件上的多个半导体二极管芯片，以及布置在半导体晶体管芯片和半导体二极管芯片之上的封装层。封装层包括连接至半导体晶体管芯片和半导体二极管芯片的过孔连接。半导体模块进一步包括金属化层，其包括与过孔连接相连接的多个金属区域。
根据用于制造半导体模块的方法的一个实施例，方法包括：提供载件；施加至少一个半导体芯片至载件上；在至少一个半导体芯片和载件之上施加封装层；形成进入封装层的过孔连接，过孔连接与至少一个半导体芯片和载件连接；以及在封装层之上施加金属化层，金属化层包括与过孔连接相连接的多个金属区域。
一旦阅读了以下详细说明书并且一旦查看了附图，本领域技术人员将知晓额外的特征和优点。
附图说明
包括附图以提供对于实施例的进一步理解，并且附图包含在该说明书中并且构成了其一部分。附图示出了实施例并且与说明书一起用于解释实施例的原理。通过参考以下详细说明书，其他实施例以及实施例的许多有意优点将易于知晓，如它们变得更加易于理解。附图的元件无需按照相对比例绘制。相同的附图标记表示对应的相同部件。
图1示出了根据示例的包括晶体管和二极管的半导体模块的示意性截面侧视图。
图2A至图2J示出了用于说明通过扩展嵌入技术制造多个半导体芯片模块的方法的示意性侧视图和顶视图。
图3示出了包括六个晶体管和六个二极管的三相半导体转换器电路的示意性电路图。
图4A至图4B在侧视图(A)和顶视图(B)中示出了包括六个晶体管和六个二极管的半导体芯片模块的示例。
图5A至图5B在侧视图(A)和顶视图(B)中示出了用作基本单元并且包括一个晶体管和一个二极管的半导体芯片模块的示例。
具体实施方式
现在参照附图描述特征方面和实施例，其中全文中相同附图标记通常用于涉及相同的元件。在以下说明书中，为了解释说明的目的，列出了数个具体细节以便于提供对于实施例一个或多个特征方面的全面理解。然而，对于本领域技术人员而言可以明显的是，可以采用较少程度的具体细节而实现实施例的一个或多个特征方面。在其他情形下，示意性示出了已知的结构和元件以便于促进对实施例的一个或多个特征方面的描述。应该理解的是，可以采用其他实施例，并且可以不脱离本发明的范围而做出结构上或逻辑上的改变。应该进一步注意的是，附图并未也无需按照比例绘制。
在以下详细说明书中，参考了形成说明书一部分并且借由对其中可以实施本发明的具体特征方面的说明的方式而示出了附图。关于这一点，诸如“顶部”、“底部”、“正面”、“背面”等等的方向性术语可以用于参考所述附图的朝向。因为所述器件的部件可以以大量不同朝向而定位，方向性术语可以用于解释说明的目的并且绝非限定性。应该理解的是，可以采用其他特征方面，并且可以不脱离本发明的范围而做出结构上和逻辑上的改变。因此以下详细说明书并非视作限定性，并且由所附权利要求来限定本发明的范围。
此外，尽管仅参照数个实施方式的一个公开了实施例的特定特征或特征方面，这些特征或特征方面如可以需要并且对于任何给定或特定应用有利的话可以与其他实施方式的一个或多个其他特征或特征方面组合。此外，对于用于详细说明书或者权利要求中的术语“包含”、“含有”、“具有”或其变形的范围，这些术语意在以类似于术语“包括”的方式而是包含性的。可以使用术语“耦合”和“连接”以及派生词。应该理解的是，这些术语可以用于指示两个元件相互共同协作或者相互作用，而不论它们直接物理或电接触，或者它们相互并未直接接触。此外，术语“示例性”仅仅意味着作为示例，而不是最佳或最优的。因此，以下详细说明书并非视作是限定性的，并且由所附权利要求来限定本发明的范围。
半导体模块以及制造半导体模块的方法的实施例可以使用各种类型的晶体管器件。实施例可以使用嵌入在半导体裸片或半导体芯片中的晶体管器件，其中半导体裸片或半导体芯片可以以从半导体晶片制造并且从半导体晶片切割出的一大批半导体材料的形式提供，或者以其中已经执行了其他工艺处理步骤、例如施加封装层至半导体裸片或半导体芯片的其他形式而提供。实施例也可以使用水平或垂直晶体管器件，其中那些结构可以以晶体管器件的所有接触元件均提供在半导体裸片的主面之一上的形式提供(水平晶体管结构)，或者以其中至少一个电接触元件设置在半导体裸片的第一主面上，而至少一个其他电接触元件设置在与半导体裸片的主面相对的第二主面上的形式而提供(垂直晶体管结构)，类似例如MOS晶体管结构或IGBT(绝缘栅双极晶体管)结构。
在任何情形下，半导体裸片或半导体芯片可以包括在它们外表面的一个或多个上的接触元件或接触焊垫，其中接触元件用于电接触半导体裸片。接触元件可以具有任何所需的形式或形状。例如，它们可以具有岛状形状，也即在半导体裸片的外表面上的平整接触层。接触元件或接触焊垫可以由任何导电材料制成，例如由诸如铝、金或铜的金属，例如或者金属合金，或者导电有机材料，或者导电半导体材料。接触元件也可以形成作为上述材料的一个或多个的层堆叠。
电子器件的实施例或者晶体管器件的实施例可以包括具有嵌入在其中的半导体裸片或晶体管器件的封装剂或封装材料。封装材料可以是任何电绝缘材料，类似例如任何种类模塑材料，任何种类树脂材料，或者任何种类环氧树脂材料。封装材料也可以是聚合物材料，聚酰亚胺材料，热塑性材料，硅树脂材料，陶瓷材料，以及玻璃材料。封装材料也可以包括任何上述材料，并且进一步包括嵌入其中的填充物材料，类似例如导热插入件(increment)。这些填充物插入件例如可以由AlO或Al2O3、AlN、BN或SiN制成。此外，填充物插入件可以具有纤维形状，并且可以例如由碳纤维或纳米管制成。
图1示出了根据实施例的半导体模块10的截面侧视图。图1的半导体模块10包括载件1，布置在载件1上的多个半导体晶体管芯片2，以及布置在载件1上的多个半导体二极管芯片3。为了简明原因，在图1中仅示出了一个半导体晶体管芯片2和一个半导体二极管芯片3。半导体模块10进一步包括布置在半导体晶体管芯片2和半导体二极管芯片3之上的封装层4。在封装层4上方，布置了包括多个金属区域或线条5.1的金属化层5，多个金属区域或线条5.1在半导体晶体管芯片2和半导体二极管芯片3的选定一个之间形成电连接。在图1所示的示例中，仅示出了金属化层5的一个金属化线条5.1。金属化层5是再分布层，因为其再分布了芯片2和3的接触焊垫的空间位置。
根据图1的半导体模块10的实施例，载件1包括可以是无机或者有机衬底的衬底。衬底的核心、特别是有机衬底的核心可以包括比1W/mK更好的导热率。特别地，衬底可以是直接铜键合衬底(DCB)、直接铝键合衬底(DAB)和活性金属铜焊衬底(AMB)的一个和多个，其中衬底可以包括陶瓷的层和片，类似例如AlO、AlN、Al2O3，或者介电层，类似例如Si3N4，直接铜键合衬底(DCB)。特别地，DCB衬底可以包括陶瓷的层或者片，其具有键合至陶瓷层两侧的铜箔片。
根据图1的半导体模块10的实施例，载件1具有范围从0.1mm至0.3mm的厚度，特别是从0.15mm至0.25mm的范围。
根据图1的半导体模块10的实施例，载件1包括第一上部主面1A，与第一主面1A相对的第二下部主面1B，以及连接了第一和第二主面1A和1B的侧面1C。封装层4覆盖了载件1的第一主面1A和侧面1C。
根据图1的半导体模块10的实施例，半导体晶体管芯片2和半导体二极管芯片3的一个或多个具有范围从5μm至700μm的厚度，特别是从30μm至100μm，更特别是从50μm至80μm。
根据图1的半导体模块10的实施例，半导体晶体管芯片2每一个包括功率晶体管、垂直晶体管、MOS晶体管、以及绝缘栅双极晶体管(IGBT)的一个或多个。半导体器件可以是基于Si、GaN、SiC或任何半导体材料。
特别地，半导体晶体管芯片2均可以包括第一上部主面以及与第一主面相对的第二下部主面，以及布置在第一主面上的源极接触元件，布置在第一主面上的栅极接触元件，以及布置在第二主面上的漏极接触元件。
根据图1的半导体模块10的实施例，半导体二极管芯片3均包括SiC二极管。
根据图1的半导体模块10的实施例，封装层4在载件1的上表面上方具有范围从0.05mm至1.5mm的厚度。此外，封装层4可以在半导体晶体管芯片2的第一上部主面上方具有范围从200mm至300mm的厚度。
根据图1的半导体模块的实施例，封装层4包括聚合物材料、模塑化合物材料、树脂材料、环氧树脂材料、丙烯酸脂材料、聚酰亚胺材料以及硅树脂基材料的一种或多种。
根据图1的半导体模块10的实施例，封装层4包括连接了金属化层5的金属线条5.1与半导体晶体管芯片2和半导体二极管芯片3的选定一个的过孔连接4.1。过孔连接4.1可以具有范围从0.1mm至1mm的横向直径，特别是从0.3mm至0.7mm。特别地，过孔连接4.1具有范围从0至3的高宽比，优选地在0.3至3的范围内。
根据一个实施例，过孔连接4.1包括穿过封装层4的通孔，通孔采用导电材料完全或者部分填充，导电材料类似例如金属，例如铜。导电材料可以以如此方式填充进入通孔中以使得通孔并未完全由材料填充，而是替代地材料仅以小于通孔直径一半的厚度来覆盖通孔的壁。
根据图1的半导体模块10的实施例，半导体模块10包括一个或多个半桥电路，其中每个半桥电路中两个半导体晶体管芯片串联连接。特别地，半导体模块10可以包括六个半导体芯片，其中两个相应半导体晶体管芯片串联连接以形成三个半桥电路。
根据图1的半导体模块10的一个实施例，半导体晶体管芯片的每一个与半导体二极管芯片的一个并联连接。特别地，半导体模块10可以包括六个半导体晶体管芯片和六个半导体二极管芯片，每一个半导体二极管芯片并联连接至半导体晶体管芯片的一个。
根据图1的半导体模块10的实施例，阻焊层6布置在金属化层5之上。阻焊层6可以包括用于提供至特定一个金属区域的电连接的开口6.1。在阻焊层6的顶部上，可以布置多个套筒7，每一个套筒7密封了与相应电连接相连接的管脚7.1，其中多个管脚7.1用作外部电连接器。其他解决方案可能适用于形成外部连接器，类似例如形成在电穿通连接之上的焊料凸块。为了示意说明目的，图1中仅示出了两个套筒7，每个套筒7密封了相应的管脚7.1，其中两个套筒7的右侧套筒也可以与金属化层5的金属化线条或区域5.1连接，金属化层5自身可以与芯片2或3的一个的接触焊垫连接、或者与另一个芯片的接触焊垫连接。
根据图1的半导体模块10的实施例，半导体晶体管芯片2和半导体二极管芯片3以如此方式连接以形成AC/AC转换器电路、AC/DC转换器电路、DC/AC转换器电路、频率转换器或DC/DC转换器电路。
以下结合附图2A至图2J解释说明制造工艺的示例。
图2A和图2B示出了制造工艺的中间产品，中间产品包括直接键合的铜(DCB)衬底20，半导体晶体管芯片30和半导体二极管芯片40施加在DCB衬底20上。DCB衬底20包括陶瓷层21，第一上部铜层22，以及第二下部铜层23。两个铜层22和23分别施加在陶瓷层21的相对主面上。
图2A示出了在图2B中线条A-A标记平面中的中间产品的剖视侧面图。DBC衬底20的第一上部铜层22可以结构化，也即划分为相互隔离的多个分立区域，使得诸如图3中所示的电路可以由半导体芯片30和半导体二极管芯片40构建。半导体晶体管芯片30可以包括垂直晶体管结构，类似例如IGBT晶体管。通常，半导体晶体管芯片30的每一个可以构造成使得第一下部主面包括第一接触焊垫，特别是漏极接触焊垫，而第二上部主面包括第二接触焊垫、特别是源极接触焊垫，以及第三接触焊垫、特别是栅极接触焊垫。半导体二极管芯片40也可以包括垂直结构，具有在第一下部主面上的第一接触焊垫、以及在第二上部主面上的第二接触焊垫。半导体晶体管芯片30和半导体二极管芯片40可以通过例如使用银膏、焊料或烧结膏而施加至第一上部铜层22的相应区域之上。结果，制造了半导体芯片模块50作为制造工艺的中间产品。
在下文中，将显示诸如图2A和图2B中所示那些的多个半导体芯片模块50如何可以并行加工处理。根据图2C和图2D，提供载件60，其可以由任何类型材料制成并且可以包括任何所需形式或形状。除了如图2D中所示的矩形格式之外，类似方形或圆形格式的其他格式也是可能的。接着，如前所述参照图2A和图2B制造多个半导体芯片模块50，并且半导体芯片模块50相互以一定距离贴装至载件60。为了简明原因，仅示出了两个半导体芯片模块50。半导体芯片模块50可以例如以如图2D所示矩阵设置的形式而设置在载件60上。半导体芯片模块50可以例如通过使用粘附层、粘附薄膜、粘附箔或粘附带、特别是双面粘附薄膜或粘附箔片而粘附至载件60。另一方面，期望将尽可能多的半导体芯片模块50设置在载件60上以便于最大化制造工艺的产率。然而，另一方面，半导体芯片模块50必需放置在相互具有预定距离的载件60上，这限定了将要制造的半导体芯片封装的外形。因此，必需在将要制造的半导体芯片封装的高产率和尺寸需求之间找到足够的权衡。载件60例如可以具有尺寸300×300mm的方形格式。载件60也可以具有矩形格式。载件60的侧边缘的侧边长度例如可以在从100mm至700mm的范围内，例如印刷电路板的衬底。
图2E和图2F示出了在此也称作“人造晶片”的半导体器件面板的制造。制造工艺类似于嵌入晶片级封装。首先，在载件60和施加在载件60上的半导体芯片模块50的上部表面之上施加封装层70。封装层70可以例如通过压缩模塑法而施加，并且其可以由如上所述任何材料制成。特别地，期望的是，封装层70应该在直至300℃下是耐热的，并且此外，封装层70应该具有高的绝缘电阻或者绝缘强度。封装层70的厚度可以以如此方式调整以使得从半导体芯片模块50的上部表面到达封装层70的上部表面的层部分位于从100μm至600μm的范围内，特别是从200μm至300μm。除此之外，封装层70可以以如此方式施加以使其覆盖了所有半导体芯片模块50的顶部主面以及所有四个侧面。除此之外，封装层70可以以如此方式施加以使得封装层70的格式和形状对应于载件60的格式和形状，也即封装层70和载件60相互符合并且它们的外侧边界相互重叠。
在施加了封装层70之后，通过使用合适的措施执行封装层70的固化或硬化步骤。此后，载件60从封装层70脱离，并且载件60可以随后重复用于其他制造工艺。结果，如图2F所示，获得了半导体器件面板80，其由刚性封装层70以及嵌入其中的多个半导体芯片模块50构成。制造工艺因此类似于用于加工单个半导体芯片及其制造半导体封装的嵌入晶片级工艺。可以施加额外的粘附层(未示出)。
过孔71可以例如通过采用合适的激光束而钻孔形成。备选地，可以通过在施加封装层70之前将实心管脚贴附至半导体晶体管芯片30和半导体二极管芯片40的接触焊垫、并且在施加封装层70之后移除管脚而制造过孔71。管脚的长度必需大于封装层70的厚度，特别是封装层70的从半导体芯片模块50的上部主面到达封装层70的上部主面的部分。过孔71可以具有圆形截面。过孔71的宽度或直径可以大于100μm。特别地，过孔71的直径可以大于过孔71的深度。特别地，过孔71的长度和直径之间的比值可以在0.2和5之间的范围内。
随后采用类似例如铜的导电材料填充过孔71。填充工序可以以如此方式执行以使得过孔71并未由导电材料完全填充，而是替代地导电材料仅以小于过孔71的直径一半的厚度而覆盖了每一个过孔71的内侧壁。填充工序可以以如此方式执行以使得通过例如PVD(物理气相沉积)、无电涂覆(e-less)或任何涂覆工艺而将第一种晶层施加至封装层70的上部主面上，使得种晶层覆盖了封装层70的整个上部主面以及过孔71的内壁。此后，可以采用直流电电镀或无电电镀以用于在种晶层上生长铜层、金属合金或金属堆叠。随后，必需结构化电镀的铜层，使得仅留下了在每一个半导体芯片模块50内半导体晶体管芯片30和半导体二极管芯片40之间形成必需的电连接的铜区域或迹线。作为迹线72的加法结构化工艺的备选，可以应用类似于高密度衬底加工的半加法工艺。铜迹线采用附图标记72示出在图2G中。
此外，与将铜层电镀至封装层70的上部主面上的工艺同时，铜层也可以电镀至面板80的背表面上。此后，该背侧电镀铜层随后可以结构化以使得仅留下二次曲线或矩形铜区域，为了简明目的未示出在图2G中。剩余的铜区域可以小于半导体芯片模块50的每一个的封装尺寸。结果，如图2G所示，获得了中间产品。
阻焊层90随后施加至封装层70的主面和金属化区域72上，并且此后在金属化区域72的预定部分中在阻焊层90中形成开口91。阻焊层90可以例如由任何介电质或聚合物材料制成。结果，如图2H所示，示出了中间产品。
在下一个步骤中，采用类似例如焊料材料的导电材料填充阻焊层90中的开口91，中空套管95贴附至开口91上，以及金属管脚96放入套管95的中空空间中并且与焊料材料连接。由套管95密封管脚96，使得套管95向它们相应管脚提供了稳定的支撑和立足处。管脚95可以用作延伸至最终电子装置的外壳壁的外的外部管脚，并且可以采用例如硅树脂填充在阻焊层90与外壳壁之间的真空区。结果，如图2I所示，示出了中间产品。
面板随后分隔为单个电子装置100，如图2J所示。
图3示出了可以由如上所述半导体芯片模块实现的电路的示例。图3中所示电路设计表示了用于产生可以用于例如驱动电动机的三相交变电流的三相逆变器电路。电路包括六个晶体管G1至G6，其中每个并联连接至六个二极管D1至D6中的一个。电路划分为三个半桥电路，每一个半桥电路提供了三相电流的一个相。特别地，通过串联晶体管G1和G2形成了第一半桥电路，从而在晶体管G1和G2之间节点处提供第一电流U，通过串联晶体管G3和G4形成了第二半桥电路，从而在晶体管G3和G4之间节点处提供第二电流V，以及通过串联晶体管G5和G6提供了第三半桥电路，从而在晶体管G5和G6之间节点处提供第三电流W。三个半桥电路的每一个具有三个电压EU、EV和EW中的一个，并且三个电压的每一个输入至相应半桥电路的一个晶体管的源极端子。半桥电路的相应其他晶体管的漏极接触连接至一个共同的电势P。
为了制造如图3所示的形式为包括半导体晶体管芯片和二极管芯片的半导体芯片模块的电子电路，接着描述两个不同概念。第一概念可以标注为“共同DCB方案”而第二概念可以标注为“分段DCB方案”。在共同DCB方案中，在开始时，提供一个DCB衬底，并且如图2A、图2B所示所有六个半导体晶体管芯片和所有半导体二极管芯片贴附至一个DCB衬底上。然而，在分段DCB方案中，提供六个小的DCB衬底以形成六个等同的基本单眼，其中通过将半导体晶体管芯片和半导体二极管芯片贴附至一个小DCB衬底上而制造每一个基本单元。
图4A示出了根据共同DCB方案的半导体芯片模块的侧视图，而图4B示出了仅用于说明晶体管芯片30、二极管芯片40和套管95的相对位置的顶视图。图4A的侧视图示出了三个半桥电路的一个，包括两个IGBT晶体管芯片30和两个二极管芯片40。图4A的侧视图通过图4B中箭头所示而获取，并且示出了七个套管95。在图4B的顶视图中，可以看见的是，这些七个套管95横向设置非常接近相应半导体晶体管芯片30或半导体二极管芯片40。由此变得明显的是，可以大大减小电连接线的长度以及因此也大大减小寄生电感。
图5A示出了根据分段DCB方案的半导体芯片模块的侧视图，而图5B示出了其顶视图。为了简明原因，在图5A和图5B中对于与图4A和图4B中相同功能元件而使用相同附图标记。在图5A的侧视图中可见的是，半导体芯片模块包括一个IGBT芯片30和一个二极管芯片40。图5A的侧视图也示出了三个套管95，其也设置非常接近半导体晶体管芯片30或半导体二极管芯片40。图5B的顶视图示出了半导体芯片模块包括一个另外的套管95以及一个所谓的跳接器套管96，其用于形成与另一个分段DCB衬底的电连接。六个“已知良好”测试的分段DCB衬底可以通过安装至载件或冷却元件上而设置为“六个一组”以形成如图3所示电子电路。
尽管已经参照一个或多个实施方式示出并描述了本发明，可以不脱离所附权利要求的精神和范围而对所示示例做出备选例和/或修改例。特别地，关于由如上所述部件或结构(组件、装置、电路、系统等等)执行的各种功能，除非明确给出相反指示，用于描述这些部件的术语(包括涉及“手段”)意在对应于执行了所述部件的具体功能(例如功能性等价)的任何部件或结构，即便其结构上不等价于执行了在此所述本发明示例性实施方式中功能的所述结构。

Claims (20)

1.一种半导体模块，包括：
载件；
多个半导体芯片，布置在所述载件上；
封装层，布置在所述半导体芯片之上；以及
金属化层，布置在所述封装层之上，所述金属化层包括形成在所述半导体芯片的选定芯片之间的电连接的多个金属区域。
2.根据权利要求1所述的半导体模块，包括布置在所述载件上的至少一个半导体晶体管芯片和至少一个半导体二极管芯片。
3.根据权利要求1所述的半导体模块，其中，所述载件包括无机衬底。
4.根据权利要求1所述的半导体模块，其中，
所述载件包括直接铜键合的衬底、直接铝键合的衬底、以及活性金属铜焊衬底中的一个或多个，以及其中所述衬底包括陶瓷层或介电质层。
5.根据权利要求1所述的半导体模块，其中，所述载件包括有机组分衬底。
6.根据权利要求5所述的半导体模块，其中，所述有机衬底的核心具有大于1W/mK的热导率。
7.根据权利要求1所述的半导体模块，其中，所述载件具有在从0.1mm至0.7mm的范围中的厚度。
8.根据权利要求1所述的半导体模块，其中，所述封装层覆盖所述载件的上表面和侧表面。
9.根据权利要求1所述的半导体模块，其中，所述封装层具有在从0.05mm至1mm的范围中的厚度。
10.根据权利要求1所述的半导体模块，其中，所述封装层包括聚合物材料、模塑材料、树脂材料、环氧树脂材料、丙烯酸脂材料、聚酰亚胺材料和硅树脂基材料中的一种或多种。
11.根据权利要求2所述的半导体模块，其中，所述封装层包括过孔连接，所述过孔连接将所述金属区域与所述半导体晶体管芯片和半导体二极管芯片的选定芯片相连接。
12.根据权利要求7所述的半导体模块，其中，所述封装层包括具有横向直径大于50μm的过孔。
13.根据权利要求2所述的半导体模块，其中，所述半导体晶体管芯片中的每一个与所述半导体二极管芯片中的一个并联连接。
14.根据权利要求1所述的半导体模块，其中，所述载件包括第一上部主面，与所述第一主面相对的第二下部主面，以及连接所述第一主面和所述第二主面的侧面，其中，所述至少一个半导体芯片布置在所述第一主面上，并且所述封装层覆盖所述载件的所述第一主面和所述侧面。
15.一种半导体模块，包括：
载件；
多个半导体晶体管芯片，布置在所述载件上；
多个半导体二极管芯片，布置在所述载件上；
封装层，布置在所述半导体晶体管芯片和所述半导体二极管芯片之上，所述封装层包括连接至所述半导体晶体管芯片和所述半导体二极管芯片的过孔连接；以及
金属化层，包括与所述过孔连接相连接的多个金属区域。
16.根据权利要求15所述的半导体模块，其中，所述载件包括陶瓷层。
17.根据权利要求15所述的半导体模块，其中，所述半导体晶体管芯片和所述半导体二极管芯片连接以形成AC/AC转换器电路、AC/DC转换器电路、DC/AC转换器电路、频率转换器或者DC/DC转换器电路。
18.一种用于制造半导体模块的方法，所述方法包括：
提供载件；
将至少一个半导体芯片施加至所述载件上；
将封装层施加在所述至少一个半导体芯片和所述载件之上；
在所述封装层中形成过孔连接，所述过孔连接与所述至少一个半导体芯片和所述载件连接；以及
将金属化层施加在所述封装层之上，所述金属化层包括与所述过孔连接相连接的多个金属区域。
19.根据权利要求18所述的方法，其中，所述封装施加在所述载件的上部主面和侧面上。
20.根据权利要求18所述的方法，其中，形成所述过孔连接包括通过激光钻孔并且将金属材料填充进过孔中而形成所述过孔。
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