CN101416305B - 具有集成通孔散热器引脚的模制半导体封装 - Google Patents
具有集成通孔散热器引脚的模制半导体封装 Download PDFInfo
- Publication number
- CN101416305B CN101416305B CN200780011755XA CN200780011755A CN101416305B CN 101416305 B CN101416305 B CN 101416305B CN 200780011755X A CN200780011755X A CN 200780011755XA CN 200780011755 A CN200780011755 A CN 200780011755A CN 101416305 B CN101416305 B CN 101416305B
- Authority
- CN
- China
- Prior art keywords
- heat sink
- pad
- pin
- exposed
- pins
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01076—Osmium [Os]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/398,944 US7772036B2 (en) | 2006-04-06 | 2006-04-06 | Lead frame based, over-molded semiconductor package with integrated through hole technology (THT) heat spreader pin(s) and associated method of manufacturing |
| US11/398,944 | 2006-04-06 | ||
| PCT/US2007/063777 WO2007117819A2 (en) | 2006-04-06 | 2007-03-12 | Molded semiconductor package with integrated through hole heat spreader pin(s) |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101416305A CN101416305A (zh) | 2009-04-22 |
| CN101416305B true CN101416305B (zh) | 2010-09-29 |
Family
ID=38575814
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200780011755XA Active CN101416305B (zh) | 2006-04-06 | 2007-03-12 | 具有集成通孔散热器引脚的模制半导体封装 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US7772036B2 (enExample) |
| EP (1) | EP2005470B1 (enExample) |
| JP (2) | JP2009532912A (enExample) |
| KR (1) | KR101388328B1 (enExample) |
| CN (1) | CN101416305B (enExample) |
| WO (1) | WO2007117819A2 (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011040507A (ja) * | 2009-08-07 | 2011-02-24 | Sumitomo Wiring Syst Ltd | 回路装置 |
| US9029991B2 (en) * | 2010-11-16 | 2015-05-12 | Conexant Systems, Inc. | Semiconductor packages with reduced solder voiding |
| US8737073B2 (en) * | 2011-02-09 | 2014-05-27 | Tsmc Solid State Lighting Ltd. | Systems and methods providing thermal spreading for an LED module |
| US8966747B2 (en) | 2011-05-11 | 2015-03-03 | Vlt, Inc. | Method of forming an electrical contact |
| CN104900623B (zh) | 2014-03-06 | 2018-11-30 | 恩智浦美国有限公司 | 露出管芯的功率半导体装置 |
| CN103824821B (zh) * | 2014-03-11 | 2016-04-06 | 湖南进芯电子科技有限公司 | 一种塑料密闭封装的开关电源模块及其制备方法 |
| US9967984B1 (en) | 2015-01-14 | 2018-05-08 | Vlt, Inc. | Power adapter packaging |
| DE102015200868A1 (de) * | 2015-01-20 | 2016-07-21 | Zf Friedrichshafen Ag | Steuerelektronik |
| US10264664B1 (en) | 2015-06-04 | 2019-04-16 | Vlt, Inc. | Method of electrically interconnecting circuit assemblies |
| US10785871B1 (en) | 2018-12-12 | 2020-09-22 | Vlt, Inc. | Panel molded electronic assemblies with integral terminals |
| US11336167B1 (en) | 2016-04-05 | 2022-05-17 | Vicor Corporation | Delivering power to semiconductor loads |
| US9892999B2 (en) | 2016-06-07 | 2018-02-13 | Globalfoundries Inc. | Producing wafer level packaging using leadframe strip and related device |
| US9953904B1 (en) * | 2016-10-25 | 2018-04-24 | Nxp Usa, Inc. | Electronic component package with heatsink and multiple electronic components |
| JP6771581B2 (ja) * | 2016-11-15 | 2020-10-21 | 三菱電機株式会社 | 半導体モジュール及び半導体装置 |
| CN107889425A (zh) * | 2017-10-30 | 2018-04-06 | 惠州市德赛西威汽车电子股份有限公司 | 一种连接器散热结构 |
| CN110120292B (zh) * | 2018-02-05 | 2022-04-01 | 台达电子企业管理(上海)有限公司 | 磁性元件的散热结构及具有该散热结构的磁性元件 |
| US11398417B2 (en) | 2018-10-30 | 2022-07-26 | Stmicroelectronics, Inc. | Semiconductor package having die pad with cooling fins |
| US11515244B2 (en) * | 2019-02-21 | 2022-11-29 | Infineon Technologies Ag | Clip frame assembly, semiconductor package having a lead frame and a clip frame, and method of manufacture |
| KR102227212B1 (ko) * | 2019-06-24 | 2021-03-12 | 안상정 | 반도체 발광소자용 지지 기판을 제조하는 방법 |
| DE102019211109A1 (de) * | 2019-07-25 | 2021-01-28 | Siemens Aktiengesellschaft | Verfahren und Entwärmungskörper-Anordnung zur Entwärmung von Halbleiterchips mit integrierten elektronischen Schaltungen für leistungselektronische Anwendungen |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905299A (en) * | 1996-01-05 | 1999-05-18 | Texas Instruments, Inc. | Thermally enhanced thin quad flatpack package |
| CN1737418A (zh) * | 2005-08-11 | 2006-02-22 | 周应东 | 提高散热效果的led灯 |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1239634A (enExample) * | 1968-10-02 | 1971-07-21 | ||
| DE3110806C2 (de) * | 1981-03-19 | 1983-07-21 | Siemens AG, 1000 Berlin und 8000 München | Wärmeableitungsvorrichtung |
| JPH0333068Y2 (enExample) * | 1985-09-26 | 1991-07-12 | ||
| JPH03214763A (ja) * | 1990-01-19 | 1991-09-19 | Nec Corp | 半導体集積回路装置のリードフレーム及びこれを用いた半導体集積回路装置 |
| US5583377A (en) * | 1992-07-15 | 1996-12-10 | Motorola, Inc. | Pad array semiconductor device having a heat sink with die receiving cavity |
| JPH06252285A (ja) * | 1993-02-24 | 1994-09-09 | Fuji Xerox Co Ltd | 回路基板 |
| WO1994029900A1 (en) * | 1993-06-09 | 1994-12-22 | Lykat Corporation | Heat dissipative means for integrated circuit chip package |
| DE4335525A1 (de) * | 1993-10-19 | 1995-04-20 | Bosch Gmbh Robert | Kühlanordnung |
| US5410451A (en) | 1993-12-20 | 1995-04-25 | Lsi Logic Corporation | Location and standoff pins for chip on tape |
| US5656550A (en) * | 1994-08-24 | 1997-08-12 | Fujitsu Limited | Method of producing a semicondutor device having a lead portion with outer connecting terminal |
| JPH08115989A (ja) * | 1994-08-24 | 1996-05-07 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JPH08316372A (ja) * | 1995-05-16 | 1996-11-29 | Toshiba Corp | 樹脂封止型半導体装置 |
| JP2817712B2 (ja) * | 1996-05-24 | 1998-10-30 | 日本電気株式会社 | 半導体装置及びその実装方法 |
| US6011304A (en) | 1997-05-05 | 2000-01-04 | Lsi Logic Corporation | Stiffener ring attachment with holes and removable snap-in heat sink or heat spreader/lid |
| KR100259080B1 (ko) * | 1998-02-11 | 2000-06-15 | 김영환 | 히트 스프레드를 갖는 리드 프레임 및 이를 이용한반도체 패키지 |
| US5973923A (en) | 1998-05-28 | 1999-10-26 | Jitaru; Ionel | Packaging power converters |
| JP3706533B2 (ja) * | 2000-09-20 | 2005-10-12 | 三洋電機株式会社 | 半導体装置および半導体モジュール |
| JP3923703B2 (ja) * | 2000-03-29 | 2007-06-06 | ローム株式会社 | 放熱手段を有するプリント配線板 |
| JP2002033433A (ja) * | 2000-07-13 | 2002-01-31 | Hitachi Ltd | 半導体装置およびその製法 |
| US6867493B2 (en) * | 2000-11-15 | 2005-03-15 | Skyworks Solutions, Inc. | Structure and method for fabrication of a leadless multi-die carrier |
| US20030006055A1 (en) * | 2001-07-05 | 2003-01-09 | Walsin Advanced Electronics Ltd | Semiconductor package for fixed surface mounting |
| JP3868777B2 (ja) * | 2001-09-11 | 2007-01-17 | 株式会社東芝 | 半導体装置 |
| JP2003188324A (ja) * | 2001-12-20 | 2003-07-04 | Mitsubishi Electric Corp | 放熱基材、放熱基材の製造方法、及び放熱基材を含む半導体装置 |
| US6861750B2 (en) * | 2002-02-01 | 2005-03-01 | Broadcom Corporation | Ball grid array package with multiple interposers |
| JP2003258170A (ja) * | 2002-02-26 | 2003-09-12 | Akane:Kk | ヒートシンク |
| DE10230712B4 (de) * | 2002-07-08 | 2006-03-23 | Siemens Ag | Elektronikeinheit mit einem niedrigschmelzenden metallischen Träger |
| JP2004103734A (ja) * | 2002-09-06 | 2004-04-02 | Furukawa Electric Co Ltd:The | ヒートシンクおよびその製造方法 |
| TWI235469B (en) | 2003-02-07 | 2005-07-01 | Siliconware Precision Industries Co Ltd | Thermally enhanced semiconductor package with EMI shielding |
| US7265983B2 (en) * | 2003-10-13 | 2007-09-04 | Tyco Electronics Raychem Gmbh | Power unit comprising a heat sink, and assembly method |
| US20050110137A1 (en) | 2003-11-25 | 2005-05-26 | Texas Instruments Incorporated | Plastic dual-in-line packaging (PDIP) having enhanced heat dissipation |
| DE102004018476B4 (de) * | 2004-04-16 | 2009-06-18 | Infineon Technologies Ag | Leistungshalbleiteranordnung mit kontaktierender Folie und Anpressvorrichtung |
| TW200636946A (en) * | 2005-04-12 | 2006-10-16 | Advanced Semiconductor Eng | Chip package and packaging process thereof |
-
2006
- 2006-04-06 US US11/398,944 patent/US7772036B2/en active Active
-
2007
- 2007-03-12 JP JP2009504367A patent/JP2009532912A/ja active Pending
- 2007-03-12 KR KR1020087024213A patent/KR101388328B1/ko active Active
- 2007-03-12 EP EP07758336.7A patent/EP2005470B1/en active Active
- 2007-03-12 CN CN200780011755XA patent/CN101416305B/zh active Active
- 2007-03-12 WO PCT/US2007/063777 patent/WO2007117819A2/en not_active Ceased
-
2010
- 2010-06-11 US US12/813,903 patent/US8659146B2/en active Active
-
2013
- 2013-08-08 JP JP2013164657A patent/JP2014013908A/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5905299A (en) * | 1996-01-05 | 1999-05-18 | Texas Instruments, Inc. | Thermally enhanced thin quad flatpack package |
| CN1737418A (zh) * | 2005-08-11 | 2006-02-22 | 周应东 | 提高散热效果的led灯 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20070238205A1 (en) | 2007-10-11 |
| KR20090004908A (ko) | 2009-01-12 |
| EP2005470B1 (en) | 2019-12-18 |
| KR101388328B1 (ko) | 2014-04-22 |
| JP2014013908A (ja) | 2014-01-23 |
| JP2009532912A (ja) | 2009-09-10 |
| EP2005470A4 (en) | 2010-12-22 |
| EP2005470A2 (en) | 2008-12-24 |
| CN101416305A (zh) | 2009-04-22 |
| WO2007117819A3 (en) | 2008-01-17 |
| US20100237479A1 (en) | 2010-09-23 |
| US8659146B2 (en) | 2014-02-25 |
| US7772036B2 (en) | 2010-08-10 |
| WO2007117819A2 (en) | 2007-10-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101416305B (zh) | 具有集成通孔散热器引脚的模制半导体封装 | |
| CN100490140C (zh) | 双规引线框 | |
| CN100435324C (zh) | 具有增强散热性的半导体封装结构 | |
| CN100380636C (zh) | 用于整体成型组件的热增强封装及其制造方法 | |
| JP2844316B2 (ja) | 半導体装置およびその実装構造 | |
| US6479888B1 (en) | Semiconductor device and a method of manufacturing the same | |
| US8618641B2 (en) | Leadframe-based semiconductor package | |
| CN102683221B (zh) | 半导体装置及其组装方法 | |
| US6965159B1 (en) | Reinforced lead-frame assembly for interconnecting circuits within a circuit module | |
| CN101556946B (zh) | 形成半导体封装件的方法及其结构 | |
| US20120306064A1 (en) | Chip package | |
| CN101263596A (zh) | 可逆多占地面积封装和制造方法 | |
| JPH04293259A (ja) | 半導体装置およびその製造方法 | |
| CN107039368B (zh) | 树脂密封型半导体装置 | |
| TW200811973A (en) | Semiconductor device and its manufacturing method | |
| JP2593702B2 (ja) | 半導体装置の製造方法 | |
| CN108140630B (zh) | 具有垂直连接器的集成电路芯片 | |
| US9252114B2 (en) | Semiconductor device grid array package | |
| JPH09312372A (ja) | 半導体装置の製造方法 | |
| JPH08340069A (ja) | リードフレーム及びこれを用いた半導体装置 | |
| JP2660732B2 (ja) | 半導体装置 | |
| JP5289921B2 (ja) | 半導体装置、及び、半導体装置の製造方法 | |
| JPH11340400A (ja) | 半導体装置およびその製造方法並びにそれに使用されるリードフレーム | |
| JP2001352008A (ja) | 半導体装置およびその製造方法 | |
| JP3599566B2 (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Texas in the United States Patentee after: NXP America Co Ltd Address before: Texas in the United States Patentee before: Fisical Semiconductor Inc. |
|
| CP01 | Change in the name or title of a patent holder |