CN101383334A - 引线框架、半导体器件和制造半导体器件的方法 - Google Patents
引线框架、半导体器件和制造半导体器件的方法 Download PDFInfo
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- CN101383334A CN101383334A CNA2008102158546A CN200810215854A CN101383334A CN 101383334 A CN101383334 A CN 101383334A CN A2008102158546 A CNA2008102158546 A CN A2008102158546A CN 200810215854 A CN200810215854 A CN 200810215854A CN 101383334 A CN101383334 A CN 101383334A
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- lead frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49537—Plurality of lead frames mounted in one device
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
Claims (12)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007-229726 | 2007-09-05 | ||
JP2007229726 | 2007-09-05 | ||
JP2007229726A JP2009064854A (ja) | 2007-09-05 | 2007-09-05 | リードフレーム、半導体装置、及び半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101383334A true CN101383334A (zh) | 2009-03-11 |
CN101383334B CN101383334B (zh) | 2012-05-23 |
Family
ID=40406115
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008102158546A Expired - Fee Related CN101383334B (zh) | 2007-09-05 | 2008-09-05 | 引线框架、半导体器件和制造半导体器件的方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7858447B2 (zh) |
JP (1) | JP2009064854A (zh) |
CN (1) | CN101383334B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102024799A (zh) * | 2009-09-09 | 2011-04-20 | 株式会社日立制作所 | 半导体装置 |
CN103730444A (zh) * | 2014-01-20 | 2014-04-16 | 矽力杰半导体技术(杭州)有限公司 | 封装组件及其制造方法 |
CN104979335A (zh) * | 2014-04-10 | 2015-10-14 | 南茂科技股份有限公司 | 芯片封装结构及电子装置 |
CN105655317A (zh) * | 2015-12-24 | 2016-06-08 | 合肥祖安投资合伙企业(有限合伙) | 一种双框架封装结构及制造方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201044547A (en) * | 2009-04-02 | 2010-12-16 | Koninkl Philips Electronics Nv | An integrated circuit system with a thermally isolating frame construction and method for producing such integrated circuit system |
US20110147910A1 (en) * | 2009-12-21 | 2011-06-23 | Micron Technology, Inc. | Method for stacking die in thin, small-outline package |
KR101047778B1 (ko) * | 2010-04-01 | 2011-07-07 | 엘지이노텍 주식회사 | 발광 소자 패키지 및 이를 구비한 라이트 유닛 |
JP6761697B2 (ja) * | 2016-08-18 | 2020-09-30 | トレックス・セミコンダクター株式会社 | 半導体装置 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0249958A3 (en) * | 1986-06-20 | 1988-11-09 | Michael W. Briese | Insect trap |
JPS6392034A (ja) * | 1986-10-06 | 1988-04-22 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JPH02105450A (ja) * | 1988-10-13 | 1990-04-18 | Nec Corp | 半導体装置 |
JPH02146454A (ja) * | 1988-11-28 | 1990-06-05 | Mitsubishi Electric Corp | 空気調和機 |
JPH0329354A (ja) * | 1989-06-26 | 1991-02-07 | Mitsubishi Electric Corp | 半導体装置 |
US5296737A (en) * | 1990-09-06 | 1994-03-22 | Hitachi, Ltd. | Semiconductor device with a plurality of face to face chips |
JP2918073B2 (ja) * | 1991-04-20 | 1999-07-12 | 凸版印刷株式会社 | リードフレームの製造方法 |
KR940003560B1 (ko) * | 1991-05-11 | 1994-04-23 | 금성일렉트론 주식회사 | 적층형 반도체 패키지 및 그 제조방법. |
JP2917575B2 (ja) * | 1991-05-23 | 1999-07-12 | 株式会社日立製作所 | 樹脂封止型半導体装置 |
JPH06188280A (ja) | 1992-12-21 | 1994-07-08 | Mitsubishi Electric Corp | 半導体装置 |
KR100204753B1 (ko) * | 1996-03-08 | 1999-06-15 | 윤종용 | 엘오씨 유형의 적층 칩 패키지 |
US5677567A (en) * | 1996-06-17 | 1997-10-14 | Micron Technology, Inc. | Leads between chips assembly |
JP3937265B2 (ja) * | 1997-09-29 | 2007-06-27 | エルピーダメモリ株式会社 | 半導体装置 |
KR100285664B1 (ko) * | 1998-05-15 | 2001-06-01 | 박종섭 | 스택패키지및그제조방법 |
JPH11330347A (ja) * | 1998-05-20 | 1999-11-30 | Rohm Co Ltd | 半導体ic |
US6303981B1 (en) * | 1999-09-01 | 2001-10-16 | Micron Technology, Inc. | Semiconductor package having stacked dice and leadframes and method of fabrication |
TW565925B (en) * | 2000-12-14 | 2003-12-11 | Vanguard Int Semiconduct Corp | Multi-chip semiconductor package structure process |
US6541856B2 (en) * | 2001-06-06 | 2003-04-01 | Micron Technology, Inc. | Thermally enhanced high density semiconductor package |
JP4237542B2 (ja) | 2003-05-16 | 2009-03-11 | 株式会社東芝 | 半導体装置 |
JP3797992B2 (ja) * | 2003-09-05 | 2006-07-19 | 沖電気工業株式会社 | 半導体装置 |
-
2007
- 2007-09-05 JP JP2007229726A patent/JP2009064854A/ja active Pending
-
2008
- 2008-09-03 US US12/203,374 patent/US7858447B2/en not_active Expired - Fee Related
- 2008-09-05 CN CN2008102158546A patent/CN101383334B/zh not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102024799A (zh) * | 2009-09-09 | 2011-04-20 | 株式会社日立制作所 | 半导体装置 |
CN103730444A (zh) * | 2014-01-20 | 2014-04-16 | 矽力杰半导体技术(杭州)有限公司 | 封装组件及其制造方法 |
CN103730444B (zh) * | 2014-01-20 | 2017-06-27 | 矽力杰半导体技术(杭州)有限公司 | 封装组件及其制造方法 |
US10128221B2 (en) | 2014-01-20 | 2018-11-13 | Silergy Semiconductor Technology (Hangzhou) Ltd. | Package assembly having interconnect for stacked electronic devices and method for manufacturing the same |
CN104979335A (zh) * | 2014-04-10 | 2015-10-14 | 南茂科技股份有限公司 | 芯片封装结构及电子装置 |
CN105655317A (zh) * | 2015-12-24 | 2016-06-08 | 合肥祖安投资合伙企业(有限合伙) | 一种双框架封装结构及制造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2009064854A (ja) | 2009-03-26 |
US20090057857A1 (en) | 2009-03-05 |
CN101383334B (zh) | 2012-05-23 |
US7858447B2 (en) | 2010-12-28 |
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