CN101160664B - 压缩SiGe<110>生长的MOSFET器件及其制造方法 - Google Patents
压缩SiGe<110>生长的MOSFET器件及其制造方法 Download PDFInfo
- Publication number
- CN101160664B CN101160664B CN2005800153966A CN200580015396A CN101160664B CN 101160664 B CN101160664 B CN 101160664B CN 2005800153966 A CN2005800153966 A CN 2005800153966A CN 200580015396 A CN200580015396 A CN 200580015396A CN 101160664 B CN101160664 B CN 101160664B
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- sige
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- gate dielectric
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/875,727 US7187059B2 (en) | 2004-06-24 | 2004-06-24 | Compressive SiGe <110> growth and structure of MOSFET devices |
| US10/875,727 | 2004-06-24 | ||
| PCT/US2005/022643 WO2006002410A2 (en) | 2004-06-24 | 2005-06-21 | Compressive sige <110> growth mosfet devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101160664A CN101160664A (zh) | 2008-04-09 |
| CN101160664B true CN101160664B (zh) | 2010-09-08 |
Family
ID=35504690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005800153966A Expired - Fee Related CN101160664B (zh) | 2004-06-24 | 2005-06-21 | 压缩SiGe<110>生长的MOSFET器件及其制造方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7187059B2 (enExample) |
| EP (1) | EP1794786A4 (enExample) |
| JP (1) | JP5314891B2 (enExample) |
| CN (1) | CN101160664B (enExample) |
| TW (1) | TW200601419A (enExample) |
| WO (1) | WO2006002410A2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3979412B2 (ja) * | 2004-09-29 | 2007-09-19 | 株式会社Sumco | シリコンエピタキシャルウェーハの製造方法 |
| US7473593B2 (en) * | 2006-01-11 | 2009-01-06 | International Business Machines Corporation | Semiconductor transistors with expanded top portions of gates |
| FR2896620B1 (fr) * | 2006-01-23 | 2008-05-30 | Commissariat Energie Atomique | Circuit integre tridimensionnel de type c-mos et procede de fabrication |
| TW200735344A (en) * | 2006-03-03 | 2007-09-16 | Univ Nat Chiao Tung | N type metal oxide semiconductor transistor structure having compression strain silicon-germanium channel formed on silicon (110) substrate |
| US7361574B1 (en) * | 2006-11-17 | 2008-04-22 | Sharp Laboratories Of America, Inc | Single-crystal silicon-on-glass from film transfer |
| US20080169535A1 (en) * | 2007-01-12 | 2008-07-17 | International Business Machines Corporation | Sub-lithographic faceting for mosfet performance enhancement |
| US20090085169A1 (en) * | 2007-09-28 | 2009-04-02 | Willy Rachmady | Method of achieving atomically smooth sidewalls in deep trenches, and high aspect ratio silicon structure containing atomically smooth sidewalls |
| US20090242989A1 (en) * | 2008-03-25 | 2009-10-01 | Chan Kevin K | Complementary metal-oxide-semiconductor device with embedded stressor |
| US7972922B2 (en) * | 2008-11-21 | 2011-07-05 | Freescale Semiconductor, Inc. | Method of forming a semiconductor layer |
| US8440547B2 (en) * | 2009-02-09 | 2013-05-14 | International Business Machines Corporation | Method and structure for PMOS devices with high K metal gate integration and SiGe channel engineering |
| JP4875115B2 (ja) | 2009-03-05 | 2012-02-15 | 株式会社東芝 | 半導体素子及び半導体装置 |
| US8329568B1 (en) * | 2010-05-03 | 2012-12-11 | Xilinx, Inc. | Semiconductor device and method for making the same |
| US8796759B2 (en) | 2010-07-15 | 2014-08-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin-like field effect transistor (FinFET) device and method of manufacturing same |
| US9466672B1 (en) | 2015-11-25 | 2016-10-11 | International Business Machines Corporation | Reduced defect densities in graded buffer layers by tensile strained interlayers |
| US11492696B2 (en) * | 2016-07-15 | 2022-11-08 | National University Corporation Tokyo University Of Agriculutre And Technology | Manufacturing method for semiconductor laminated film, and semiconductor laminated film |
| JP7215683B2 (ja) * | 2019-09-09 | 2023-01-31 | 株式会社Sumco | 半導体デバイス |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05109630A (ja) * | 1991-10-16 | 1993-04-30 | Oki Electric Ind Co Ltd | 半導体薄膜の形成方法 |
| US5461250A (en) * | 1992-08-10 | 1995-10-24 | International Business Machines Corporation | SiGe thin film or SOI MOSFET and method for making the same |
| US5486706A (en) * | 1993-05-26 | 1996-01-23 | Matsushita Electric Industrial Co., Ltd. | Quantization functional device utilizing a resonance tunneling effect and method for producing the same |
| US5281552A (en) * | 1993-02-23 | 1994-01-25 | At&T Bell Laboratories | MOS fabrication process, including deposition of a boron-doped diffusion source layer |
| US5528719A (en) * | 1993-10-26 | 1996-06-18 | Sumitomo Metal Mining Company Limited | Optical fiber guide structure and method of fabricating same |
| US5833749A (en) * | 1995-01-19 | 1998-11-10 | Nippon Steel Corporation | Compound semiconductor substrate and process of producing same |
| JP3311940B2 (ja) * | 1996-09-17 | 2002-08-05 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP3292101B2 (ja) * | 1997-07-18 | 2002-06-17 | 信越半導体株式会社 | 珪素単結晶基板表面の平滑化方法 |
| US6607948B1 (en) * | 1998-12-24 | 2003-08-19 | Kabushiki Kaisha Toshiba | Method of manufacturing a substrate using an SiGe layer |
| JP3618319B2 (ja) * | 2000-12-26 | 2005-02-09 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
| US6581387B1 (en) * | 2001-02-12 | 2003-06-24 | The United States Of America As Represented By The United States Department Of Energy | Solid-state microrefrigerator |
| JP3593049B2 (ja) * | 2001-03-19 | 2004-11-24 | 日本電信電話株式会社 | 薄膜形成方法 |
| US20020167048A1 (en) * | 2001-05-14 | 2002-11-14 | Tweet Douglas J. | Enhanced mobility NMOS and PMOS transistors using strained Si/SiGe layers on silicon-on-insulator substrates |
| US6593625B2 (en) * | 2001-06-12 | 2003-07-15 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
| US20030012925A1 (en) * | 2001-07-16 | 2003-01-16 | Motorola, Inc. | Process for fabricating semiconductor structures and devices utilizing the formation of a compliant substrate for materials used to form the same and including an etch stop layer used for back side processing |
| JP4004809B2 (ja) * | 2001-10-24 | 2007-11-07 | 株式会社東芝 | 半導体装置及びその動作方法 |
| US7061014B2 (en) * | 2001-11-05 | 2006-06-13 | Japan Science And Technology Agency | Natural-superlattice homologous single crystal thin film, method for preparation thereof, and device using said single crystal thin film |
| US6703271B2 (en) * | 2001-11-30 | 2004-03-09 | Taiwan Semiconductor Manufacturing Company | Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer |
| JP2003327497A (ja) * | 2002-05-13 | 2003-11-19 | Sumitomo Electric Ind Ltd | GaN単結晶基板、窒化物系半導体エピタキシャル基板、窒化物系半導体素子及びその製造方法 |
| JP2004014856A (ja) * | 2002-06-07 | 2004-01-15 | Sharp Corp | 半導体基板の製造方法及び半導体装置の製造方法 |
| AU2003238963A1 (en) * | 2002-06-07 | 2003-12-22 | Amberwave Systems Corporation | Semiconductor devices having strained dual channel layers |
| US20040038082A1 (en) * | 2002-08-26 | 2004-02-26 | Toshihiro Tsumori | Substrate for perpendicular magnetic recording hard disk medium and method for producing the same |
| JP4014473B2 (ja) * | 2002-08-30 | 2007-11-28 | 独立行政法人科学技術振興機構 | 超平坦p型酸化物半導体NiO単結晶薄膜の製造方法 |
| US7238595B2 (en) * | 2003-03-13 | 2007-07-03 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
| JP2005019851A (ja) * | 2003-06-27 | 2005-01-20 | Sharp Corp | 半導体装置及びその製造方法 |
| US7705345B2 (en) * | 2004-01-07 | 2010-04-27 | International Business Machines Corporation | High performance strained silicon FinFETs device and method for forming same |
-
2004
- 2004-06-24 US US10/875,727 patent/US7187059B2/en not_active Expired - Lifetime
-
2005
- 2005-06-03 TW TW094118430A patent/TW200601419A/zh unknown
- 2005-06-21 WO PCT/US2005/022643 patent/WO2006002410A2/en not_active Ceased
- 2005-06-21 CN CN2005800153966A patent/CN101160664B/zh not_active Expired - Fee Related
- 2005-06-21 EP EP05785191A patent/EP1794786A4/en not_active Withdrawn
- 2005-06-21 JP JP2007518341A patent/JP5314891B2/ja not_active Expired - Fee Related
Non-Patent Citations (2)
| Title |
|---|
| M.Shima et al.<100>channel strained-SiGe p-MOSFET with enhancedholemobility and lower parasitic resistance.symposium on VISI technology digest of technical papers.2002,94-95. * |
| N.sugiyama et al.Formation of strained Si/SiGe on insulator structure with a(110) surface.2003 IEEE international SOI conference.2003,2003130-131. * |
Also Published As
| Publication number | Publication date |
|---|---|
| JP5314891B2 (ja) | 2013-10-16 |
| CN101160664A (zh) | 2008-04-09 |
| EP1794786A4 (en) | 2008-12-24 |
| TW200601419A (en) | 2006-01-01 |
| US20050285159A1 (en) | 2005-12-29 |
| WO2006002410A2 (en) | 2006-01-05 |
| US7187059B2 (en) | 2007-03-06 |
| JP2008504695A (ja) | 2008-02-14 |
| WO2006002410A3 (en) | 2007-12-06 |
| EP1794786A2 (en) | 2007-06-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100908 Termination date: 20120621 |