CN101097989B - 具有存储材料绝缘的存储单元及其制造方法 - Google Patents
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- H10N70/801—Constructional details of multistable switching devices
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- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
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- H10N70/011—Manufacture or treatment of multistable switching devices
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- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
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Abstract
本发明公开了一种存储单元,该存储单元包括第一和第二电极以及存储材料元件,其电耦接至该第一和第二电极。该存储材料元件包含例如为GST的第一存储材料,该第一存储材料具有可通过施加能量而改变的电特性。热绝缘层环绕该存储材料元件,且该热绝缘层包含第二存储材料。介质层分离该热绝缘层与该存储材料元件。本发明还公开了制造该热绝缘存储单元器件的方法。
Description
联合研究合约的当事人
纽约国际商业机械公司、台湾旺宏国际股份有限公司及德国英飞凌技术公司(Infineon TechnologiesA.G.)为联合研究合约的当事人。
技术领域
本发明涉及以基于存储器材料的高密度存储器器件,所述材料包括基于硫属化物(chalcogenide)的材料以及其他材料,以及制造该器件的方法。
背景技术
基于相变的存储器材料广泛用于读写光碟片中。这些材料至少有两个固态相,包含例如通常非晶固态相以及通常结晶固态相。激光脉冲用于读写光碟片中,以在不同相之间进行切换,以读取在相变后该材料的光学特性。
基于相变的存储器材料,例如基于硫属化物的材料以及相似的材料,也可以通过施加幅度适合于集成电路中的电流来导致相变。该非晶态的特征是具有比结晶态高的电阻率,其可以被检测以指示数据。这些特性已经在使用可编程电阻性材料形成非易失性存储器电路中令人感兴趣,所述非易失性存储器电路可以以随机存取的方式进行读取和写入。
从非晶至结晶态的变化通常是一种较低电流的操作。从结晶至非晶态的改变,在此表示为重置(reset),通常是一种较高电流的操作,其包含短的高电流密度脉冲以融化或分解该结晶结构,之后该相变材料快速冷却,抑制了该相变的过程,允许至少一部份的相变结构稳定在该非晶态。理想状态下,使得用于使得相变材料从结晶态变换到非晶态的重置电流的幅度越小越好。用于重置的重置电流的大小,可以通过减少在存储单元中该相变材料元件(element)的大小和减少介于电极和该相变材料之间的接点面积来减小用于重置的重置电流的幅度,从而可以通过经由该相变材料元件的较小的绝对电流值来实现较高的电流密度。
一个发展方向已经朝向在一个集成电路结构中形成许多小孔,并使用少量的可编程电阻性材料来填充这些小孔。描述针对许多小孔发展的专利包含:Ovshinsky的于1997年11月11日授权的美国专利No.5,687,112、发明名称为“Multibit Single Cell Memory ElementHaving Tapered Contact”的专利,Zahorik等人的于1998年8月4日授权美国专利No.5,789,277、发明名称为“Method ofMakingChalogenide[sic]Memory Device”的专利,Doan等人的于2000年11月21日获准美国专利No.6,150,253,发明名称为“Controlable OvionicPhase-Change Semiconductor Memory Device and Method ofFabricating the Same”的专利。
在以非常小的尺度制造这些装置并且在工艺中的变换要满足生产大规模存储器件所需要的严格的规格时,则会遭遇到问题。希望提供一种存储单元(memory cell)结构,其包括具有小尺寸以及低重置电流,并且用于制造该结构的方法可以满足生产大规模存储器件时的严格的工艺变化规格。更佳的是,提供一种制造程序与结构,其与在同一集成电路上制造周边电路相兼容。
发明内容
本发明公开了一种存储单元,该存储单元为存储器件的一部分,包括第一和第二电极,以及存储材料元件,其电耦接至该第一和第二电极。该存储材料元件包含例如为GST的第一存储材料,该第一存储材料具有可通过施加能量而改变的电特性。热绝缘层环绕该存储材料元件,且该热绝缘层包含第二存储材料。介质层分离该热绝缘层与该存储材料元件。本发明还公开了制造该热绝缘存储单元器件的方法。
在某些实施例中,第二存储材料与第一和第二电极中的至少一个电性分离。该第二存储材料具有比介质层优越至少10%的热绝缘性。此外,该第二存储材料具有与该第一存储材料的该热膨胀系数相近的热膨胀系数,最好是在5%之内。
本发明的第二个目的是提供一种制造热绝缘存储单元器件的方法。存储单元存取层包含上表面,其具有电导体元件。第一电极层沉积于该存储单元存取层的上表面,并与该电导体元件接触。存储材料层形成于该第一电极层上方,该存储材料层包含第一存储材料。第二电极层形成于该存储材料层之上。第一掩膜形成于该第二电极层的一部分的上方。然后,对该第二电极层的未被该第一掩膜覆盖的部份与该存储材料层进行蚀刻,以产生第二电极元件与存储材料元件。介质材料层沉积于第二电极元件、该存储材料元件与该第一电极层之上。热绝缘的第二存储材料沉积于该介质材料层之上。该第二电极元件被裸露。电导体材料沉积于该裸露的第二电极元件之上。第二掩膜形成于该第二电极元件之上。未被该第二掩膜所覆盖的部分被蚀刻至该存储单元存取层。热绝缘存储材料层从环绕该存储材料元件的第二存储材料中形成。第一电极从该第一电极层中形成。第二电极从该第二电极层和该第二掩膜下的该电导体材料中形成,该存储材料元件位于该第一及第二电极之间。介质材料沉积于存储单元存取层之上,并包围该热绝缘存储材料层。该第二电极被裸露,且电导体材料沉积于该裸露的第二电极之上并与其接触。
在某些实施例中,当沉积至少一部份的该第一电极层与该存储材料层时,维持在真空环境中,以在该第一电极与该存储材料元件之间形成清洁界面。
本发明所描述用于形成相变栅极的方法是用于相变随机访问存储器(PCRAM)中的存储单元,并可用于制造其他器件的非常微小的栅极、桥或其他相似结构。
以下详细说明本发明的结构与方法。本发明的内容说明章节目的并非在于定义本发明。本发明是由权利要求所定义。本发明的各种实施例、特征、目的及优点等将可通过下列说明及其附图而获得充分了解。
附图说明
图1示出了本发明实施例的存储单元的基本结构剖面图。
图2到图16示出了制造如图1所示的存储单元的方法;
图2示出了制造存储单元存取层的最后阶段;
图3示出了将第一电极层沉积在图2的存储单元存取层的上方;
图4示出了在图3中的第一电极层的上方沉积多个层的结果;
图5示出了形成在图4中的结构上的光刻掩膜;
图6示出了将图5中的光刻掩膜修剪后的结果;
图7示出了将图6中的结构蚀刻并除去修剪后的光刻掩膜后的结果;
图8示出了将沉积介质层在图7中结构上;
图9示出了将低导热性相变材料沉积在图8中结构上;
图10示出了将图9中的结构平坦化以露出第二电极元件之后的结果;
图11示出了将导电材料沉积在图10中的平坦化表面上的结果;
图12示出了在图11中的结构上形成光刻掩膜;
图13示出了将图12中的结构蚀刻直到介质薄膜层为止,以形成补充第一及第二电极后的结果;
图14示出了将介质层沉积在图13中结构上;
图15示出了将图14中的结构平坦化以露出第二电极之后的结果;以及
图16示出了将导电材料沉积于图15中平坦化表面上的结果。
【主要器件符号说明】
10 存储单元
12 第一电极
14 第二电极
16 相变材料元件
18 热绝缘材料
20 存储单元存取层
22 衬底
24 第一栅极
26 第二栅极
28 第一栓塞
30 第二栓塞
32 共同源极线
34 介质薄膜层
36 上表面
38、40 孔洞
42 上表面
44 初始第一电极层
46 平坦表面
48 补充第一电极层
50 存储材料层
52 第二电极层
54 第一电极层
56 光刻掩膜
58 横向宽度
60 修剪后光刻掩膜
62 横向宽度
64 第二电极元件
66 介质层
68 相变材料
70 平坦表面
72 补充第二电极层
74 光刻掩膜
75 补充第二电极元件
76 介质材料
78 平坦表面
80 电导体材料
82 存储单元元件
84 存储单元层
86 存储单元存取层
具体实施方式
本发明结合特定结构及方法的实施例示例进行描述。必须了解的是,这些实施例并不是用来限制本发明,而只是一些范例。在不同实施例中的类似元件,则使用相似的参考标号来描述。
图1示出了本发明的一个实施例的存储单元10的基本结构剖面图。存储单元10包括第一电极12和第二电极14。包含诸如相变材料的存储材料的存储材料元件16,与第一电极12和第二电极14有着电接触。热绝缘材料18包围此存储材料元件16,并通过降低所需的重置电流来改善此存储单元10的操作效率。该热绝缘材料18由具有良好绝缘特性的物质所构成,包括其具有较佳的热稳定性以及比氧化物(例如二氧化硅)低的导热性。此外,此热绝缘材料必须具有与相变材料相近的热膨胀系数,最好是在5%之内,以减少在形成存储单元后的工艺所引发的热应力。
存储单元10及其制造方法会在其后的图2至图16中加以描述。参阅图2,在衬底22上形成存储单元存取层20,如图中所示。存取层20通常包含存取晶体管;其他型态的存取器件也可以使用。存取层20包含作为第一和第二字线的第一和第二栅极24、26,第一和第二栓塞28、30,以及共同源极线32,这些均形成于介质薄膜34内。存储单元存取层20如图中所示,具有大致平坦的上表面36,此上表面被在第一和第二栓塞28、30和共同源极线32内形成的孔洞38、40所截断。孔洞38、40以及其他的表面缺陷是在沉积过程中自然形成的。在将例如相变材料直接沉积在栓塞28、30的上表面42上时,会产生分布问题,由此会因为孔洞38的存在而影响到器件操作特性的变化。
图3示出了采用氮化钛(TiN)沉积产生初始第一电极层44,并且对该初始电极层44进行化学机械研磨以形成平坦表面46的结果。初始第一电极层44会填入孔洞38、40内,以有效消除由孔洞以及其他的表面缺陷所造成的分布问题。图4则示出了补充第一电极层48、存储材料层50与第二电极层52沉积后的结果。在此实施例中,补充第一电极层48是氮化钛(TiN)。初始第一电极层44和补充第一电极层48共同构成第一电极层54。存储材料层50与补充第一电极层48同步形成,以避免破坏真空,且可以提供存储材料层50与补充第一电极层48之间的清洁界面,以及之后存储材料层50与第一电极层54之间的清洁界面。第一电极层54的厚度最好是介于40到120纳米之间,通常是80纳米。存储材料层50由存储材料构成,通常是例如GST的相变材料,会在之后对其详加描述。存储材料层50的厚度最好是介于20到120纳米之间,通常是80纳米。第二电极层52在此实施例中是氮化钛(TiN),其厚度最好为40到100纳米之间,通常是70纳米。
图5则示出了此工艺的下一步骤,其中,光刻掩膜56在栓塞28、30上方形成来。此光刻掩膜56的横向宽度58等于所使用的光刻工艺的最小特征尺寸F。为了降低此光刻掩膜56的横向宽度58,要执行掩膜修剪步骤,以形成如图6中所示的被修剪的光刻掩膜60。该被修剪的光刻掩膜60的横向宽度62小于所使用的光刻工艺的最小特征尺寸。在一个实施例中,横向宽度58的厚度最好是介于40到100纳米之间,通常是60纳米,而横向宽度62的厚度最好是介于10到80纳米之间,通常是40纳米。
图7示出了此工艺的下一步骤,其中,对第二电极层52和存储材料层50进行蚀刻,随后将被修剪的光刻掩膜60除去以留下存储材料元件16和第二电极元件64。在此实施例中,对于该第二电极层52(通常是氮化钛(TiN))的蚀刻会利用其下GST的相变材料或是氮化钛(TiN)本生的信号来检测蚀刻终点。由此可以防止因为氮化钛(TiN)蚀刻速率低于存储材料元件16,或是在蚀刻中改变蚀刻化学成分配方时,所造成的侧削,使得存储材料元件16在进行氮化钛(TiN)蚀刻时受到伤害。此存储材料元件16的尺寸是越小越好,通常通过降低存储材料层50的厚度以及修剪的光刻掩膜60,来降低该存储单元中的相变材料所需的重置电流。图8则示出了此工艺的下一步骤,是将介质层66沉积在第一电极层54、存储材料元件16和第二电极元件64上之后的结果。介质层66在随后对第一电极层54的氮化钛(TiN)进行蚀刻时提供对存储材料元件16的保护,参考图12和13,并且可以提供电绝缘。在图9中,将低导热性的相变材料68沉积在介质层66上,并填入各个存储材料元件16和第二电极元件64之间的区域。相变材料68通常是但不必一定是与存储材料元件16相同的物质。相变材料68是一种存储材料具有良好绝缘特性,具有高的热稳定性以及比氧化物(例如二氧化硅)低的导热性。
随后,对图9中的结构进行平坦化过程,最好是使用化学机械研磨(CMP)工艺,以实现如图10所示的衬底结构。此平坦化过程移除一部分的相变材料68和介质层66,以露出第二电极元件64并形成平坦的表面70。将补充第二电极层72沉积在平坦的表面70之上。层72通常是使用导电材料物质如氮化钛,但是其他的导电材料物质也可以使用。随后,在层72的表面上形成单元隔离光刻掩膜74,如图12所示。采用蚀刻步骤,如图13所示,移除未被光刻掩膜74覆盖的物质直到介质薄膜层34为止。由此形成补充第二电极元件75、其与第二电极元件64共同构成第二电极14。图13中的蚀刻步骤也从材料68中产生热绝缘结构18。随后,将介质材料76沉积在图13中的结构之上,如图14所示。
热绝缘材料18是一种存储材料,其使用一种顺形(conformal)沉积工艺得到,例如化学气相沉积(CVD)工艺。热绝缘材料18具有比介质材料76更好的热绝缘性,最好是优于10%以上。当介质材料76为二氧化硅时,该热绝缘材料所具有的导热性应该低于二氧化硅,或者低于约0.014J/cm*degK*Sec。在其他优选实施例中,热绝缘材料18的导热性低于相转换材料16在非晶态时的导热性,或者对于包括GST的相转换材料而言,则是低于约0.003J/cm*degK*Sec。单层或复合层均可提供隔热效果。
进行另一种平坦化过程,最好是使用化学机械研磨(CMP)工艺,以实现如图15所示的衬底结构,以产生平坦的表面78以及露出第二电极14。随后,如图16所示,在该平坦的表面78上形成电导体材料80,并对其进行图案化以产生存储单元器件的位线。此存储单元器件82包括存储单元10、存储单元层84以及存储单元存取层86。电导体材料80通常是使用铝或铜或者其合金,当然也可以是其他导电材料物质,如钨、氮化钛,或者其他导电材料物质的组合。
此蚀刻步骤可以利用单一蚀刻步骤或是多重蚀刻步骤,在相同或不同的气体、流量、温度等工艺条件下进行。
通过小尺寸的存储材料元件16和使用热绝缘材料18,可以减少当使用例如GST的相变材料的存储材料元件16产生电性状态变化,如从低电阻率的通常结晶态改变至高电阻率的通常非晶态,所需的电流。
在此实施例中的电极12和14最好是氮化钛。其他的物质,氮化钽或氮化铝钽、钨或氮化钨也可以作为电极12和14,氮化钛为最佳的选择是因为其和作为存储材料元件16的GST(以下会详述)具有较佳的附着性,且是半导体工艺中经常用到的材料,同时其也可以用作GST在相变转变时大约是600到700℃之间的势垒材料。栓塞28和30以及共用源极线32通常是使用钨。
存储材料元件16的实施例包括基于相转的存储材料,相转材料可包括基于硫属化物的材料以及其他材料。硫属元素包含构成周期表的VI族的一部分的四种元素的氧(O)、硫(S)、硒(Se)、以及碲(Te)中的任意一种。硫属化物包括硫属元素与更为正电性的元素或自由基的化合物。硫属化物合金包含硫属化物与其他材料如过渡金属的结合。硫属化物合金通常包含一个或多个选自元素周期表第六栏的元素,例如锗(Ge)以及锡(Sn)。通常,硫属化物合金包含锑(Sb)、镓(Ga)、铟(In)、以及银(Ag)中的一个或多个构成的组合。许多基于相变的存储材料已经在技术文件中进行了描述,包括下列合金:镓/锑、铟/锑、铟/硒、锑/碲、锗/碲、锗/锑/碲、铟/锑/碲、镓/硒/碲、锡/锑/碲、铟/锑/锗、银/铟/锑/碲、锗/锡/锑/碲、锗/锑/硒/碲、以及碲/锗/锑/硫。在锗/锑/碲合金家族中,大范围的合金组成是可行的。该组成可以表示为TeaGebSb100-(a+b)。
一位研究员描述了最有用的合金为,在沉积材料中所包含的平均Te浓度远低于70%,典型地低于60%,并且Te含量通常在从最低23%至最高58%的范围内,且最佳地是介于48%至58%的碲含量。Ge的浓度高于约5%,且其在材料中的平均范围从最低8%至最高30%,一般为低于50%。最佳地,Ge的浓度范围介于8%至40%。在此成分中所剩下的主要成分则为Te。上述百分比为原子百分比,其为所有组成元素相加总和为100%。(Ovshinky‘112专利,栏10~11)由另一研究者所评估的特殊合金包括Ge2Sb2Te5、GeSb2Te4、以及GeSb4Te7。(Noboru Yamada,“Potential of Ge-Sb-Te Phase-change Optical Disks forHigh-Data-Rate Recording”,SPIE v.3109,pp.28-37(1997))更一般地,过渡金属例如铬(Cr)、铁(Fe)、镍(Ni)、铌(Nb)、钯(Pd)、铂(Pt)、以及上述的混合物或合金,可以与锗/锑/碲结合以形成相变合金,其具有可编程的电阻特性。可使用的存储器材料的特殊示例如Ovshinsky‘112专利中栏11-13所述,在此引入该示例作为参考。
在此存储器单元的活性沟道区域中,相变材料可在第一结构态与第二结构态之间按照其局部次序进行切换,其中,第一结构态一般为非晶固相,而第二结构态一般为结晶固相。这些合金至少是双稳态(bistable)。术语“非晶”用于指示相对较无次序的结构,其与单晶相比更加无次序性,而具有可检测的特征,例如与结晶态相比具有更高的电阻值。术语“结晶态”用于指示相对较有次序的结构,其与非晶态相比更有次序,因此包括可检测的特征,例如比非晶态更低的电阻值。典型地,相变材料可以在完全结晶态与完全非晶态之间的所有可检测的不同状态之间进行电切换。其它受到非晶态与结晶态之间的改变的影响的材料特征包括:原子次序、自由电子密度、以及活化能。此材料可切换成为不同的固态,或者可切换成为由两种以上固态所形成的混合物,提供从非晶态至结晶态之间的灰度级部分。此材料中的电特性也可能随之改变。
相变合金可通过施加电脉冲而从一种相态切换至另一种相态。先前观察指出,较短、较大幅度的脉冲倾向于将相变材料的相态改变成大体为非晶态。较长、较低幅度的脉冲倾向于将相变材料的相态改变成大体为结晶态。在较短、较大幅度脉冲中的能量足够大,因此足以破坏结晶结构的结合键,同时其足够短,因此可以防止原子再次排列成结晶态。在没有不适当实验的情形下,可以确定特别适用于特定相变合金的适当的脉冲量变曲线。在本文的后续部分,此相变材料称为GST,同时应该理解的是,也可以使用其它类型的相变材料。在本文中所描述的一种适用于PCRAM中的材料为Ge2Sb2Te5。
可以用于本发明其他实施例中的其他可编程存储材料包括:掺杂N2的GST、GexSby、或者其它以不同结晶态之间的转换来决定电阻的物质;PrxCayMnO3、PrSrMnO3、ZrOx、TiOx、NiOx、WOx、经掺杂的SrTiO3或其他利用电脉冲来改变电阻状态的材料;或其他使用电脉冲来改变电阻状态的物质;TCNQ(7,7,8,8-tetracyanoquinodimethane)、PCBM(methanofullerene6,6-phenyl C61-butyric acid methyl ester)、TCNQ-PCBM、Cu-TCNQ、Ag-TCNQ、C60-TCNQ、以其他物质掺杂的TCNQ、或者包括用电脉冲控制的双稳定或多稳定电阻态的任何其它聚合物材料。
接着简单描述四种电阻存储材料。
第一种为硫属化物材料,例如GexSbyTez,其中,x∶y∶z=2∶2∶5,或其他成分为x:0~5;y:0~5;z:0~10。以氮、硅、钛或其他元素掺杂的GeSbTe也可以使用。
一种用于形成硫属化物材料的例示方法,利用PVD溅镀或磁电管(Magnetron)溅镀方式,其反应气体为氩气、氮气、和/或氦气,压力为1mTorr至100mTorr。此沉积步骤一般是在室温下进行。长宽比为1~5的准直器(collimater)可以用于改善填入的效果。为了改善该填入的效果,使用数十至数百伏的直流偏压。另一方面,直流偏压和准直器的组合可以同时搭配使用。
可以选择性地在真空中或氮气环境中进行沉积后退火处理,以改善硫属化物材料的结晶态。此退火处理的温度典型地介于100℃至400℃之间,而退火时间则少于30分钟。
硫属化物材料的厚度根据单元结构的设计而定。一般而言,硫属化物的厚度大于8nm者可以具有相变特性,使得该材料展现至少双稳定的电阻态。
第二种适合用于本发明实施例中的存储材料为超巨磁电阻(CMR)材料,例如PrxCayMnO3,
其中,x∶y=0.5∶0.5,或其他成分为x:0~1;y:0~1。包括有锰氧化物的超巨磁电阻材料也可以使用。
用来形成超巨磁电阻材料的例示方法,是利用PVD溅镀或磁电管溅镀方式,其反应气体为氩气、氮气、和/或氦气,压力为1mTorr至100mTorr。此沉积步骤的温度可介于室温至600℃之间,视后处理条件而定。长宽比为1~5的准直器可以用于改善填入的效果。为了改善该填入的效果,使用数十至数百伏的直流偏压。另一方面,直流偏压和准直器的组合可以同时搭配使用。可以施加数十高斯(Gauss)至1特斯拉(tesla,10,000高斯)之间的磁场,以改善其磁结晶态。
可以选择性地在真空中或氮气环境中进行沉积后退火处理,以改善超巨磁电阻材料的结晶态。此退火处理的温度典型地介于400℃至600℃之间,而退火时间则少于2小时。
超巨磁电阻材料的厚度根据存储单元结构的设计而定。厚度介于10nm至200nm之间的超巨磁电阻材料可以用作为核心材料。YBCO(YBACuO3,一种高温超导体材料)缓冲层通常被用来改善超巨磁电阻材料的结晶态。该YBCO的沉积是在沉积超巨磁电阻材料之前进行。YBCO的厚度介于30nm至200nm之间。
第三种存储材料为双元素化合物,
如NixOy、TixOy、AlxOy、WxOy、ZnxOy、ZrxOy、CuxOy等,其中,x∶y=0.5∶0.5,或其他成分为x:0~1;y:0~1。
用来形成该存储材料的例示方法,是利用PVD溅镀或磁电管溅镀方式,其反应气体为氩气、氮气、和/或氦气,压力为1mTorr至100mTorr,其标靶金属氧化物为例如NixOy、TixOy、AlxOy、WxOy、ZnxOy、ZrxOy、CuxOy等。此沉积步骤一般系于室温下进行。长宽比为1~5的准直器可以用于改善填入的效果。为了改善该填入的效果,使用数十至数百伏的直流偏压。根据需要,直流偏压和准直器的组合可以同时搭配使用。
可以选择性地在真空中或氮气环境或氧气/氮气混合环境中进行沉积后退火处理,以改善金属氧化物内的氧原子分布。此退火处理的温度典型地介于400℃至600℃之间,而退火时间则少于2小时。
一种替代性的形成方法是利用PVD溅镀或磁电管溅镀方式,其反应气体为氩气/氧气、氩气/氮气/氧气、纯氧、氦气/氧气、氦气/氮气/氧气等,压力为1mTorr至100mTorr,其标靶金属氧化物为例如Ni、Ti、Al、W、Zn、Zr、Cu等。该沉积步骤一般在室温下进行。长宽比为1~5的准直器可以用于改善填入的效果。为了改善该填入的效果,使用数十至数百伏的直流偏压。根据需要,直流偏压和准直器的组合可以同时搭配使用。
可以选择性地在真空中或氮气环境或氧气/氮气混合环境中进行沉积后退火处理,以改善金属氧化物内的氧原子分布。该退火处理的温度典型地介于400℃至600℃之间,而退火时间则少于2小时。
另一种形成方法,是使用高温氧化系统(例如火炉或是快速热脉冲(RTP))进行氧化。此温度介于200℃至700℃之间,以纯氧或氮气/氧气混合气体,在压力为数个mTorr至一个大气压下进行。进行时间可从数分钟至数小时。另一种氧化方法为等离子氧化。RF或者DC源等离子与纯氧或氩气/氧气的混合气体、或氩气/氮气/氧气的混合气体,在压力为1mTorr至100mTorr下进行金属表面的氧化,例如Ni、Ti、Al、W、Zn、Zr、Cu等。该氧化时间从数秒钟至数分钟。氧化温度从室温至约300℃之间,视等离子氧化的程度而定。
第四种存储材料为聚合物材料,例如掺杂有Cu、C60、Ag等等的TCNQ,或PCBM-TCNQ混合聚合物。
一种形成方法是利用热蒸发、电子束蒸发、或分子束外延系统(MBE)进行蒸发。固态TCNQ以及掺杂物颗粒在单独的反应室中被共同蒸发。该固态TCNQ以及掺杂物颗粒被放置于W-船或Ta-船或陶磁船中。施加高电流或电子束,以熔化该反应物,从而使得该物质被混合和沉积在晶圆上。在此没有使用反应性的化学物或气体。该沉积是在10-4至10-10Torr的压力下完成的。晶圆的温度是在室温至摄氏200度之间。
可以选择性地在真空中或氮气环境中进行沉积后退火处理,以改善聚合物材料的成分分布。该退火处理的温度典型地介于400℃至600℃之间,而退火时间则少于2小时。
另一种用于形成基于聚合物的存储器材料的层的技术,是使用有TCNQ掺杂溶液的旋转涂镀装置,进行小于1000rpm的旋转。在旋转涂镀之后,该晶圆保持(通常是在室温或是在温度小于200℃)足够时间以使其固态形成。该保持时间从数分钟到数天,由温度和成型的情况来决定。
其他与实施相变随机存取存储器件的制造及材料有关的内容,在本申请人于2005年6月17日(律师档案编号MXIC1621-1)申请的、题目为“THIN FILM FUSE PHASE CHANGE RAM ANDMANUFACTURING METHOD”的另一美国专利申请No.11/155,067中进行了公开,在此引入该申请作为本申请的参考。
上述的叙述可能使用如上(above)、下(below)、顶(top)、底(bottom)、覆盖(over)等词汇。这些词汇仅用于协助了解本发明,而非用于限制本发明。
虽然已经参考优选实施例对本发明进行了描述,但是应该理解的是,本发明并非限制于所述内容。先前描述中已经建议了可替换方案及修改方式,并且其它可替换方案及修改方式是本领域技术人员能够想到的。特别是,根据本发明的结构与方法,所有具有实质上相同于本发明的元件组合从而实现与本发明实质上相同的结果的技术都不脱离本发明的精神范畴。因此,所有这些可替换方案及修改方式都会落在本发明的附带的权利要求以及等价物所界定的范围中。
在前文中所提及的专利申请以及公开出版物都是作为本发明的参考。
Claims (14)
1.一种存储单元,所述存储单元为存储器件的一部分,包括:
第一和第二电极;
存储材料元件,电耦接至所述第一和第二电极;
所述存储材料元件包含第一存储材料,所述第一存储材料具有可通过施加能量而改变的电特性;
热绝缘层,环绕于所述存储材料元件;
所述热绝缘层包含第二存储材料;以及
介质层,分离所述热绝缘层与所述存储材料元件,并且其中,所述介质层电隔离所述第二存储材料与所述第一和第二电极中的至少一个。
2.如权利要求1所述的存储单元,其中,所述第一和第二电极包含与所述存储材料元件接触的部分,且所述部分包括氮化钛。
3.如权利要求1所述的存储单元,其中,所述第一和第二存储材料为相同的存储材料。
4.如权利要求1所述的存储单元,其中,所述第一和第二存储材料包含相变材料。
5.如权利要求4所述的存储单元,其中,所述相变材料包含GST。
6.如权利要求1所述的存储单元,其中:
所述第一存储材料包含相变材料,所述相变材料具有热导率和热膨胀系数;
所述第二存储材料具有与所述相变材料的热导率相等或比其更小的热导率;以及
所述第二存储材料具有与所述相变材料的热膨胀系数相等或者与其相差5%之内的热膨胀系数。
7.如权利要求1所述的存储单元,其中:
所述第二存储材料具有比所述介质层至少优越10%的热绝缘性;以及
所述第二存储材料具有与所述第一存储材料的热膨胀系数相近的热膨胀系数,两者差异在5%之内。
8.一种制造热绝缘存储单元器件的方法,包括:
形成存储单元存取层,其包含上表面,在所述上表面具有电导体元件;
在所述存储单元存取层的上表面上沉积第一电极层,并与所述电导体元件接触;
在所述第一电极层上形成存储材料层,所述存储材料层包含第一存储材料;
在所述存储材料层上形成第二电极层;
在一部份所述第二电极层上形成第一掩膜,
蚀刻所述第二电极层与所述存储材料层的未被所述第一掩膜覆盖的部份,以产生第二电极元件与存储材料元件;
在第二电极元件、所述存储材料元件与所述第一电极层上沉积介质材料层;
在所述介质材料层上沉积热绝缘的第二存储材料;
裸露所述第二电极元件;
在所述裸露的第二电极元件上沉积电导体材料;
在所述第二电极元件上形成第二掩膜,
蚀刻未被所述第二掩膜所覆盖的部份,直到所述存储单元存取层,由此实现:
由环绕所述存储材料元件的所述第二存储材料形成热绝缘存储材料层;
从所述第一电极层中形成第一电极;
从所述第二电极层以及所述第二掩膜下的所述电导体材料中形成第二电极,所述存储材料元件位于所述第一及第二电极之间;
在所述存储单元存取层上沉积介质材料,并包围所述热绝缘存储材料层;
裸露所述第二电极;以及
在所述裸露的第二电极上沉积第二电导体材料并与其接触。
9.如权利要求8所述的方法,其中,所述第二电极元件裸露的步骤包括平坦化所述第二存储材料。
10.如权利要求8所述的方法,其中,所述第二电极元件裸露的步骤包括平坦化步骤。
11.如权利要求8所述的方法,还包括确保所述第二存储材料具有比所述介质材料层沉积步骤所得到的所述介质材料更好的热绝缘性。
12.如权利要求8所述的方法,还包括确保:
所述第二存储材料具有比所述介质材料层沉积步骤所得到的所述介质层至少优越10%的热绝缘性;以及
所述第二存储材料具有与所述第一存储材料的热膨胀系数相差5%之内的热膨胀系数。
13.如权利要求8所述的方法,其中:
执行所述存储材料元件形成步骤,形成所述存储材料元件,其包含相变材料,所述相变材料具有热导率和热膨胀系数;并且还包含:
确保所述第二存储材料具有比所述相变材料更好的热绝缘性。
14.如权利要求8所述的方法,还包括,当沉积至少一部份的所述第一电极层与所述存储材料层时,维持在真空环境中,以在所述第一电极与所述存储材料元件之间形成清洁界面。
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