CN101097988B - 包括n+界面层的可变电阻随机存取存储器 - Google Patents

包括n+界面层的可变电阻随机存取存储器 Download PDF

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CN101097988B
CN101097988B CN2006101603995A CN200610160399A CN101097988B CN 101097988 B CN101097988 B CN 101097988B CN 2006101603995 A CN2006101603995 A CN 2006101603995A CN 200610160399 A CN200610160399 A CN 200610160399A CN 101097988 B CN101097988 B CN 101097988B
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CN101097988A (zh
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赵重来
李殷洪
斯蒂法诺维奇·金瑞克
埃尔·M·鲍里姆
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Samsung Electronics Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8833Binary metal oxides, e.g. TaOx
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/90Bulk effect device making

Abstract

本发明提供一种具有n+界面层的可变电阻随机存取存储器。该可变电阻随机存取存储器包括下电极、形成在所述下电极上的n+界面层、形成在所述n+界面层上的缓冲层、形成在所述缓冲层上并具有可变电阻特性的氧化物层、及形成在所述氧化物层上的上电极。

Description

包括n+界面层的可变电阻随机存取存储器
技术领域
本发明涉及非易失性存储器,更特别地,涉及通过在由普通金属形成的下电极与缓冲层之间包括n+界面层而以低操作电压操作的可变电阻随机存取存储器。
背景技术
具有高集成密度、高速操作特性、和低操作电压的半导体存储器是更优越的。
常规存储器包括连接到存储单元的多个电路。在作为半导体存储器的代表的动态随机存取存储器(DRAM)的情况下,单位存储单元通常包括一个开关和一个电容器。DRAM具有高集成密度和高操作速度。然而,所存储的数据在关闭电源后被擦除。
非易失性存储器在电源被关闭后能保持所存储的数据,这样的非易失性存储器的例子是闪存(flash memory)。闪存是非易失性存储器,其与易失性存储器的区别在于非易失性存储器比DRAM具有较低的集成密度和较慢的操作速度。
正在对非易失性存储器进行很多研究,包括磁随机存取存储器(MRAM)、铁电随机存取存储器(FRAM)、相变随机存取存储器(PRAM)、及电阻随机存取存储器(RRAM)。
上述非易失性存储器中,RRAM主要利用取决于过渡氧化物的电压的可变电阻特性。
图1A是横截面图,示出使用可变电阻材料的具有常规结构的RRAM的结构。使用过渡金属氧化物作为可变电阻材料的RRAM器件具有开关特性以用作存储器。
参照图1A,RRAM具有其中下电极12、氧化物层14、和上电极16顺序形成在衬底10上的结构。下电极12和上电极16由普通导电金属形成,氧化物层14由具有可变电阻特性的过渡金属氧化物形成。该过渡金属氧化物包括ZnO、TiO2、Nb2O5、ZrO2、NiO等。
图1B是曲线图,示出图1A所示的非易失性可变电阻存储器的操作特性。更具体地,电流通过对样品施加电压来测量,样品中下电极12由Ru形成,氧化物层14由NiO形成,上电极16由Ru形成。参照图1B,当在第一开关周期施加约0.7V到样品时,重置电流为约3mA。然而,在50个开关周期之后,重置电流增加到约50mA。随着开关周期被重复,氧化物层14的电阻状态继续改变,操作电压和重置电压增大,因而降低了非易失性可变电阻存储器的可靠性。因此,需要能具有稳定操作特性的存储器的结构。
由于在闪存器件中高集成是结构上困难的,所以对交叉点(cross-point)型存储器进行了很多研究。因此,需要开发利用可变电阻材料的具有新结构的交叉点型存储器。
另外,还需要具有使用普通金属代替昂贵的贵金属的下电极的存储器。
发明内容
本发明提供一种非易失性存储器,通过在下电极和可变电阻氧化物层之间包括缓冲层且在该缓冲层和该下电极之间包括n+界面层,即使重复进行开关操作时该非易失性存储器也具有稳定的重置电流。
本发明还提供通过使用普通金属作为下电极而具有低制造成本的高集成存储器。
根据本发明的一个方面,提供一种可变电阻随机存取存储器,包括:下电极;n+界面层,其形成在所述下电极上;形成在所述n+界面层上的缓冲层;氧化物层,其形成在所述缓冲层上并具有可变电阻特性;以及上电极,其形成在所述氧化物层上。
所述氧化物层可由p型过渡金属氧化物形成。
所述氧化物层可以是Ni氧化物层。
所述n+界面层可以由选自包括ZnOx、TiOx和IZOx的欠氧(oxygendeficicent)氧化物、及包括ZnO、TiO和IZO的高度掺杂以n型杂质的氧化物构成的组的至少一种形成。
该下电极可以由选自包括Ni、Co、Cr、W、Cu、Ti、或这些金属的合金的组的一种形成。
所述缓冲层可以由n型氧化物形成。
所述缓冲层可以由选自包括Ir氧化物、Ru氧化物、Zn氧化物、和IZO的组的至少一种形成。
所述n+界面层和所述缓冲层可以由相同材料形成。
附图说明
通过参照附图详细描述其示例性实施例,本发明的上述和其它特征及优点将变得更加明显,附图中:
图1A是横截面图,示出了使用可变电阻材料具有常规结构的电阻随机存取存储器(RRAM)的结构;
图1B是曲线图,示出了图1A所示的非易失性可变电阻存储器的操作特性;
图2是曲线图,示出了其中缓冲层形成在下电极上的RRAM的重置电流根据开关周期数目的变化;
图3是曲线图,示出使用钨作为下电极的RRAM器件的电流特性;
图4是横截面图,示出根据本发明一实施例具有n+界面层的可变电阻随机存取存储器;
图5是能带图,示出n-IZO(缓冲层)和W(下电极)之间的肖特基接触;
图6是当n+界面层形成在n-缓冲层和由普通金属形成的下电极之间时的能带图;
图7是散点图,示出根据本发明一实施例的存储器件的重置电流变化与开关周期数目的关系;
图8是曲线图,示出根据本发明一实施例使用可变电阻的存储器的操作原理。
具体实施方式
下面将参照附图描述根据本发明的具有n+界面层的可变电阻随机存取存储器。附图中,为清晰起见,层和区域的厚度和宽度被放大。
图2是曲线图,示出其中缓冲层形成在下电极上的电阻随机存取存储器(RRAM)的重置电流变化与开关周期数目的关系。
参照图2,RRAM器件包括由Ru形成的下电极、由ZnO形成的缓冲层、和由NiO形成的可变电阻氧化物层。该RRAM器件具有4.5mA的平均重置电流,其是较低重置电流,且具有比常规RRAM(参照图1B)低的重置电流偏差。
图3是曲线图,示出包括普通金属钨形成的下电极的RRAM器件的电流特性。由IZO形成的缓冲层、由NiO形成的可变电阻氧化物层、和由Ni形成的上电极顺序形成在下电极上。
参照图3,较高电压(6V)施加到使用W形成的下电极的RRAM器件后,当重置电流增加时发生存储节点击穿。因此,当下电极简单地由普通金属形成时该RRAM器件不能作为存储器工作。
图4是横截面图,示出了根据本发明一实施例具有n+界面层的可变电阻随机存取存储器。
参照图4,根据本发明一实施例的具有n+界面层的可变电阻随机存取存储器包括下电极20。n+界面层22、n型缓冲层24、可变电阻氧化物层26、和上电极28顺序形成在下电极20上。
下电极20可以由普通金属诸如Ni、Co、Cr、W、Cu、Ti或这些金属的合金形成。当在下电极20中使用普通金属时,可降低存储器的制造成本。在本实施例中,普通金属用在下电极20中,但本发明不限于此,即,下电极20也可以由贵金属形成。
n+界面层22可由欠氧n型氧化物半导体诸如IZOx、ZnOx、或TiOx形成。另外,n+界面层22可由高度掺杂以掺杂剂的IZO、ZnO、或TiO形成。
n型缓冲层24是n型氧化物,且可以由欠氧氧化物诸如IZOx、IrOx、RuOx、ZnOx、或TiOx,或者掺杂以掺杂剂的氧化物诸如IZO、IrO、RuO、ZnO、或TiO形成。
n+界面层22和n型缓冲层24可由相同材料形成从而降低制造成本,且n+界面层22被掺杂以比掺杂到n型缓冲层24的掺杂剂高几个数量级的掺杂剂。
可变电阻氧化物层26可以由上述诸如ZnO、TiO2、Nb2O5、ZrO2、或NiO的过渡金属氧化物形成。
上电极28可由Pt或Ti形成。
当下电极20由普通金属诸如钨(W)形成时,下电极22的功函数较低。在该情况下,肖特基接触形成在下电极20与缓冲层24例如n-IZO层之间的界面处。当肖特基接触形成在下电极20和缓冲层24之间时,由于结电阻而会产生电压降和存储节点退化。结果,存储器的操作特性削弱,或者如图3所示,会发生存储节点的击穿。图5是能带图,示出n-IZO(缓冲层)和W(下电极)之间的肖特基接触。
图6是当n+界面层22形成在n-缓冲层24和由普通金属形成的下电极20之间时的能带图。可形成由n-IZO层/n+IZO层/W层的复合物构成的结层。
参照图6,下电极20的功函数比n+IZO层(n+界面层22)大。因此,n+IZO层与W层之间形成欧姆接触。结果,由于下电极20和n型缓冲层24之间的势垒(barrier)形成地薄,所以电阻能够在下电极20和n型缓冲层24之间自由转移。
图7是散点图,示出根据本发明一实施例的存储器件的重置电流变化与开关周期数目的关系。更具体地,根据本发明一实施例的存储器包括顺序形成在由具有20nm厚度的W形成的下电极20上的具有20nm厚度的n+IZO界面层、由具有20nm厚度的n-IZO形成的缓冲层、具有50nm厚度的p-NiO层、和由具有20nm厚度的Ni形成的上层28。参照图7,存储器具有非常低的重置电流变化,并具有1.2mA的重置电流水平。如图6所示,低重置电流解释为根据本发明在下电极20和n型缓冲层24之间n+界面层22的形成减小了下电极20和n型缓冲层24之间势垒的厚度,因此,电子穿过非常薄的势垒在下电极20和n型缓冲层24之间容易地转移。
上述根据本发明的包括可变电阻材料的非易失性存储器可通过诸如溅射、原子层沉积(ALD)法的PVD法或化学气相沉积(CVD)法制造。下电极20、n+界面层22、n型缓冲层24、可变电阻氧化物层26、和上电极28的厚度不被限制,可以形成为从数纳米到数微米。在图2中,示出了单位器件的结构,但根据本发明的包括可变电阻材料的非易失性存储器可用在交叉点型阵列中。
使用可变电阻的存储器具有两种电阻状态,现在将参照图8说明该存储器的操作原理。
图8是曲线图,示出根据本发明一实施例使用可变电阻的存储器的操作原理。参照图8,当向存储器施加的电压从0V逐渐增加时,电流沿曲线G1与所施加的电压成比例地增加。然而,当施加比V1高的电压时,电流由于存储器电阻的快速增大而降低。当V1与V2之间范围内的电压被施加时,电流沿曲线G2增加。当高于V2的电压例如电压V3被施加到存储器时,由于存储器电阻的快速降低而电流回到沿曲线G1增加。当施加小于V1的电压时,向存储器施加的高于V1的电压影响存储器的电特性,现在将对其进行说明。
V1到V2范围内的电压施加到存储器之后,小于V1的电压再次施加到存储器,则存储器的电流遵循曲线G2。另一方面,当高于V2的电压例如V3施加到存储器之后,小于V1的电压施加到存储器,则电流如图8所示遵循G1。从该结果可以看出,存储器的电特性根据施加到存储器的电压的大小(在V1到V2或大于V2的范围)而受到影响。结果看出,具有可变电阻材料即过渡金属氧化物的存储器可以应用到非易失性存储器。例如,通过指定当如图8所示V1到V2范围内的电压施加到存储器时存储器的状态为“0”,并指定当大于V2的电压被施加时存储器的状态为“1”,数据被记录到存储器中。再现数据时,通过向存储器施加小于V1的电压测量氧化物层中的电流,这样,能够确定存储在存储器中的数据处于“0”状态或“1”状态。状态“1”和状态“0”的指定可以反过来。
根据本发明的存储器具有简单的结构和稳定的开关特性,并且由于该存储器可用作交叉点型存储器而对于高集成是有利的。另外,通过在下电极和n缓冲层之间包括n+界面层,该存储器具有稳定的操作特性。此外,下电极可以由便宜的普通金属形成,因而降低了制造成本。
尽管本发明参照其实施例进行了特定示出和描述,本领域技术人员能够理解,在不脱离本发明的权利要求所定义的精神和范围的情况下可以进行形式和细节上的各种改变。

Claims (7)

1.一种可变电阻随机存取存储器,包括:
下电极;
n+界面层,形成在所述下电极上;
形成在所述n+界面层上的缓冲层;
氧化物层,其形成在所述缓冲层上并具有可变电阻特性;及
上电极,形成在所述氧化物层上,
其中所述n+界面层由选自包括ZnOx、TiOx和IZOx的欠氧氧化物,及包括ZnO、TiO和IZO的高度掺杂以n型杂质的氧化物构成的组的至少一种形成。
2.如权利要求1的可变电阻随机存取存储器,其中所述氧化物层由p型过渡金属氧化物形成。
3.如权利要求1的可变电阻随机存取存储器,其中所述氧化物层是Ni氧化物层。
4.如权利要求1的可变电阻随机存取存储器,其中所述下电极由选自Ni、Co、Cr、W、Cu、Ti、或这些金属的合金构成的组的一种形成。
5.如权利要求1的可变电阻随机存取存储器,其中所述缓冲层由n型氧化物形成。
6.如权利要求5的可变电阻随机存取存储器,其中所述缓冲层由选自Ir氧化物、Ru氧化物、Zn氧化物、和IZO构成的组的至少一种形成。
7.如权利要求1的可变电阻随机存取存储器,其中所述n+界面层和所述缓冲层由相同材料形成。
CN2006101603995A 2006-06-27 2006-11-15 包括n+界面层的可变电阻随机存取存储器 Active CN101097988B (zh)

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