CN101071810B - 半导体器件 - Google Patents
半导体器件 Download PDFInfo
- Publication number
- CN101071810B CN101071810B CN2007101022794A CN200710102279A CN101071810B CN 101071810 B CN101071810 B CN 101071810B CN 2007101022794 A CN2007101022794 A CN 2007101022794A CN 200710102279 A CN200710102279 A CN 200710102279A CN 101071810 B CN101071810 B CN 101071810B
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- semiconductor chip
- electrode pads
- wires
- module substrate
- bonding wires
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006133680A JP4942020B2 (ja) | 2006-05-12 | 2006-05-12 | 半導体装置 |
| JP133680/2006 | 2006-05-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101071810A CN101071810A (zh) | 2007-11-14 |
| CN101071810B true CN101071810B (zh) | 2010-12-22 |
Family
ID=38684349
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007101022794A Active CN101071810B (zh) | 2006-05-12 | 2007-05-09 | 半导体器件 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US7745941B2 (enExample) |
| JP (1) | JP4942020B2 (enExample) |
| CN (1) | CN101071810B (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100798896B1 (ko) * | 2007-06-07 | 2008-01-29 | 주식회사 실리콘웍스 | 반도체 칩의 패드 배치 구조 |
| JP2010177456A (ja) * | 2009-01-29 | 2010-08-12 | Toshiba Corp | 半導体デバイス |
| JP5645371B2 (ja) | 2009-05-15 | 2014-12-24 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置 |
| US11457531B2 (en) | 2013-04-29 | 2022-09-27 | Samsung Display Co., Ltd. | Electronic component, electric device including the same, and bonding method thereof |
| KR102379591B1 (ko) * | 2014-04-10 | 2022-03-30 | 삼성디스플레이 주식회사 | 전자부품, 이를 포함하는 전자기기 및 전자기기의 본딩 방법 |
| JP6129671B2 (ja) | 2013-07-19 | 2017-05-17 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| KR102247916B1 (ko) * | 2014-01-16 | 2021-05-04 | 삼성전자주식회사 | 계단식 적층 구조를 갖는 반도체 패키지 |
| US10186467B2 (en) * | 2016-07-15 | 2019-01-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
| KR102571267B1 (ko) * | 2018-09-19 | 2023-08-29 | 에스케이하이닉스 주식회사 | 부분 중첩 반도체 다이 스택 패키지 |
| TWI686924B (zh) * | 2018-10-18 | 2020-03-01 | 普誠科技股份有限公司 | 積體電路及其測試方法 |
| CN112309875A (zh) * | 2020-11-02 | 2021-02-02 | 南方电网科学研究院有限责任公司 | 一种芯片封装方法 |
| US12136623B2 (en) * | 2020-11-11 | 2024-11-05 | Infineon Technologies Austria Ag | Multi-device semiconductor chip with electrical access to devices at either side |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5323060A (en) * | 1993-06-02 | 1994-06-21 | Micron Semiconductor, Inc. | Multichip module having a stacked chip arrangement |
| US5777391A (en) * | 1994-12-20 | 1998-07-07 | Hitachi, Ltd. | Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof |
| US6476500B2 (en) * | 2000-07-25 | 2002-11-05 | Nec Corporation | Semiconductor device |
| CN1459855A (zh) * | 2002-05-21 | 2003-12-03 | 株式会社日立制作所 | 半导体器件及其制造方法 |
| CN1674268A (zh) * | 2004-03-23 | 2005-09-28 | 株式会社瑞萨科技 | 半导体器件 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002057270A (ja) * | 2000-08-08 | 2002-02-22 | Sharp Corp | チップ積層型半導体装置 |
| JP4449258B2 (ja) * | 2001-06-15 | 2010-04-14 | ソニー株式会社 | 電子回路装置およびその製造方法 |
| US6680219B2 (en) * | 2001-08-17 | 2004-01-20 | Qualcomm Incorporated | Method and apparatus for die stacking |
| US6731011B2 (en) * | 2002-02-19 | 2004-05-04 | Matrix Semiconductor, Inc. | Memory module having interconnected and stacked integrated circuits |
| JP4615189B2 (ja) * | 2003-01-29 | 2011-01-19 | シャープ株式会社 | 半導体装置およびインターポーザチップ |
| US8324725B2 (en) * | 2004-09-27 | 2012-12-04 | Formfactor, Inc. | Stacked die module |
-
2006
- 2006-05-12 JP JP2006133680A patent/JP4942020B2/ja not_active Expired - Fee Related
-
2007
- 2007-04-13 US US11/734,973 patent/US7745941B2/en active Active
- 2007-05-09 CN CN2007101022794A patent/CN101071810B/zh active Active
-
2010
- 2010-05-14 US US12/780,395 patent/US8138611B2/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5323060A (en) * | 1993-06-02 | 1994-06-21 | Micron Semiconductor, Inc. | Multichip module having a stacked chip arrangement |
| US5777391A (en) * | 1994-12-20 | 1998-07-07 | Hitachi, Ltd. | Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof |
| US6476500B2 (en) * | 2000-07-25 | 2002-11-05 | Nec Corporation | Semiconductor device |
| CN1459855A (zh) * | 2002-05-21 | 2003-12-03 | 株式会社日立制作所 | 半导体器件及其制造方法 |
| CN1674268A (zh) * | 2004-03-23 | 2005-09-28 | 株式会社瑞萨科技 | 半导体器件 |
Also Published As
| Publication number | Publication date |
|---|---|
| US7745941B2 (en) | 2010-06-29 |
| US20100219537A1 (en) | 2010-09-02 |
| CN101071810A (zh) | 2007-11-14 |
| US8138611B2 (en) | 2012-03-20 |
| US20070262431A1 (en) | 2007-11-15 |
| JP2007305848A (ja) | 2007-11-22 |
| JP4942020B2 (ja) | 2012-05-30 |
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