CN100595898C - 元件配置设备和元件配置方法 - Google Patents

元件配置设备和元件配置方法 Download PDF

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CN100595898C
CN100595898C CN200710103269A CN200710103269A CN100595898C CN 100595898 C CN100595898 C CN 100595898C CN 200710103269 A CN200710103269 A CN 200710103269A CN 200710103269 A CN200710103269 A CN 200710103269A CN 100595898 C CN100595898 C CN 100595898C
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circuit board
elements
soldering paste
coat film
components
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CN101071783A (zh
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森田健
日吉正宜
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
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    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
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Abstract

利用安置头16从元件供给单元1拾取下表面上形成有凸点并通过使其相互叠置在电路板13上形成层叠结构的第一元件和第二元件，并通过相对于焊膏传递装置5抬起和降低保持第一元件和第二元件的安置头16，利用转移涂布方法成束地为多个元件的凸点施加焊剂10，所述焊膏传递装置以涂覆膜具有两种不同厚度的涂覆膜的方式施加焊剂10。利用这种构造，通过确保最适合的焊膏施加量，能够以满意粘度有效地实行元件配置。

Description

元件配置设备和元件配置方法
技术领域
本发明涉及一种用于在电路板上配置电子元件的元件配置设备和方法(component mounting apparatus and method)，其中在电子元件的下表面上形成有凸点。
背景技术
对于在电路板上配置诸如半导体元件的电子元件的方法，已经使用了这样一种方法，其中具有配置在树脂基板上的半导体元件的半导体封装借助使用钎料凸点(solder bump)的钎焊接合方法配置在电路板上。在利用钎料凸点将电子元件接合在电路板上的钎焊接合方法中，通常按照这样的方式进行接合，即钎料凸点以焊接辅助物质例如焊剂或焊膏被提供给钎料凸点的状态置于形成在电路板上的电极上。为此，用于传递焊剂或焊膏的焊膏传递装置设置在上述适于半导体封装的元件配置设备中(例如参见专利文献1)。在专利文献1中所示的示例中，具有预定厚度的焊膏涂覆膜形成在可旋转的辊的外周边上，并且通过允许钎料凸点与涂覆膜接触使得钎料凸点与焊膏涂覆膜接触，进而用焊膏覆盖钎料凸点。
专利文献1：JP-A-2000-022394
顺带地，元件配置设备同时配置在相同电路板上的元件不总是相同类型的，有时不同类型的元件会被配置在相同的电路板上。例如，在多个半导体封装彼此叠置在电路板上的情况中，传递到半导体封装上的焊剂的最适合量彼此不同，进而焊膏传递装置需要同时形成具有不同厚度的焊剂涂覆膜。另外，在将要配置的元件的类型改变时，必须调整涂覆膜的厚度以具有与元件对应的最佳厚度。
可是，因为包含专利文献1中所披露的上述示例的已知焊膏传递装置不能同时形成具有任意不同厚度的涂覆膜，所以凸点在焊剂传递到其上时未涂覆最适合量的焊剂。为此，根据元件的类型额外地施加不足量的焊剂，进而能够获得满意的焊接结果。
发明内容
因此，本发明提供一种元件配置设备和元件配置方法，其能够同时形成具有不同厚度的涂覆膜并通过确保凸点(bump)涂覆有最适合量的焊膏以满意的粘度有效地实行元件配置。
根据本发明的一个方面，提供一种用于将下表面上形成有凸点的元件配置在电路板上的元件配置设备，并且所述设备包括供给多个元件的元件供给单元，保持并定位电路板的电路板保持单元，从元件供给单元拾取多个元件并将多个元件放置在电路板保持单元所保持的电路板上的安置头(placementhead)，将安置头移动到元件供给单元和电路板保持单元的安置头移动装置，以及设置在安置头移动路径上并提供焊膏的焊膏传递装置，安置头所保持的多个元件的凸点借助于转移涂布方法以具有至少两种不同厚度的涂覆膜的形式被涂覆所述焊膏，其中在保持多个元件的安置头从元件供给单元到电路板保持单元的移动过程中，利用转移涂布方法通过相对于焊膏传递装置而抬起和降低安置头所保持的多个元件，成束地(in a bundle)为多个元件的凸点施加焊膏。
根据本发明的另一方面，提供一种利用元件配置设备在电路板上配置元件的元件配置方法，所述元件配置设备包括供给其下表面上形成有凸点的多个元件的元件供给单元，保持并定位电路板的电路板保持单元，从元件供给单元拾取多个元件并将多个元件放置在电路板保持单元所保持的电路板上的安置头，将安置头移动到元件供给单元和电路板保持单元的安置头移动装置，以及设置在安置头移动路径上并提供焊膏的焊膏传递装置，安置头所保持的多个元件的凸点借助于转移涂布方法以具有至少两种不同厚度的涂覆膜的形式被涂覆所述焊膏，并且元件配置方法包括利用焊膏传递装置分别以根据多个元件设定的不同厚度形成焊膏涂覆膜的涂覆膜形成步骤，利用安置头从元件供给单元拾取多个元件的元件拾取步骤，在保持多个元件的安置头从元件供给单元到电路板保持单元的移动过程中，通过相对于焊膏传递装置抬起和降低安置头所保持的多个元件而成束地为多个元件的钎料凸点传递焊膏的焊膏传递步骤，以及将其上已经传递有焊膏的多个元件放置在电路板上的元件放置步骤。
由于根据本发明的元件配置设备被构造以使得元件配置设备包括在安置头所保持的多个元件的凸点上提供具有至少两种不同厚度的焊膏的焊膏传递设备，并在保持多个元件的安置头从元件供给单元到电路板保持单元的移动过程中，利用转移涂布方法通过降低安置头保持的多个元件成束地为多个元件的凸点施加焊膏，能够同时形成具有任意不同厚度的涂覆膜并确保焊膏的最佳施加量，进而有效地实行具有满意粘结性的元件配置。
附图说明
图1为示出了根据本发明实施例的元件配置设备的前视图。
图2为示出了根据本发明实施例的元件配置设备的顶视平面图。
图3A和3B为示出了根据本发明实施例的元件配置设备中安置头的构造的示意图。
图4A和4B为示出了根据本发明实施例的元件配置设备中焊膏传递装置的结构的示意图。
图5A至5D为示出了根据本发明实施例的元件配置设备中焊膏传递装置的操作的示意图。
图6A至6D为示出了根据本发明实施例的元件配置设备中焊膏传递装置的操作的示意图。
图7A和7B为示出了根据本发明实施例的元件配置方法的步骤的示意图。
图8A和8B为示出了根据本发明实施例的元件配置方法的步骤的示意图。
图9A和9B为示出了根据本发明实施例的元件配置方法的步骤的示意图。
图10A和10B为示出了根据本发明实施例的元件配置方法的步骤的示意图。
图11A和11B为示出了根据本发明实施例的元件配置方法的步骤的示意图。
图12A和12B为示出了根据本发明实施例的元件配置方法的步骤的示意图。
附图标记：
图1
1：元件供给单元
5：焊膏传递装置
6：移动台
7：传递台
9A：第一涂刷器部件(squeegee member)(涂覆膜形成部件)
9B：第二涂刷器部件(涂覆膜形成部件)
10：焊剂(焊膏)
11：电路板保持单元
13：电路板
14：元件放置机构
15：安置头移动机构
16：安置头
17A：第一吸嘴
17B：第二吸嘴
图2
3：第一元件
3a、4a：凸点
4：第二元件
图4
24：控制单元
7a：涂覆膜形成表面
22：直接操作机构
23A：第一涂刷器抬起和降低机构
23B：第二涂刷器抬起和降低机构
g：涂覆膜形成间隙
图5
10a、10b：涂覆膜
具体实施方式
以下，参照附图描述本发明的一个实施例。
此外，参照图1和2描述元件配置设备的结构。元件配置设备具有在电路板上配置诸如半导体封装的元件的功能，在所述元件的下表面上形成有凸点。如图1和2所示，构造元件配置设备以沿Y方向二维地设置元件供给单元1、焊膏传递装置5和电路板保持单元11并将元件放置机构14置于这些元件的上方。在此说明书中，电路板保持单元11的电路板传送方向被限定为X方向。
包含第一元件输送器2A和第二元件输送器2B的多个元件输送器设置在元件供给单元1内，并且第一元件输送器2A和第二元件输送器2B分别供给第一元件3和第二元件4。第一元件3和第二元件4分别具有由下表面上的焊料所形成的凸点3a和4a。在本实施例中，通过将这些元件放置在电路板上而使其相互固定，形成第二元件4放置在第一元件3上的重叠结构。
焊膏传递装置5设置在元件供给单元1的侧边处。焊膏传递装置5被构造成传递台7设置在移动台6的上表面上以便沿Y方向水平移动并且涂刷器单元(squeegee unit)8固定地置于传递台7上方。涂刷器单元8包括第一涂刷器部件9A和第二涂刷器部件9B，并具有在传递台7上表面上形成用作焊膏的焊剂的涂覆膜10的功能。电路板保持单元11包括沿X方向设置的传送轨道12，并通过支撑沿上游侧从一个装置传送的电路板13确定其位置。
配有安置头16的元件放置机构14设置在元件供给单元1、焊膏传递装置5和电路板保持单元11的上方，并且安置头16借助用作安置头移动装置的安置头移动机构15的使用沿X和Y方向水平移动。如图3A所示，安置头16是配有多个单元安置头16a(在此，安置头由8个单元安置头16a形成)的多类型安置头，并且一半的单元安置头16a配有第一吸嘴17A且一半的单元安置头16a具有第二吸嘴17B。借助单元安置头16a内构建的抬起和降低机构的使用，能够分别抬起和降低第一吸嘴17A和第二吸嘴17B。如图3B所示，第一吸嘴17A和第二吸嘴17B能够分别吸取并保持第一元件3和第二元件4。
根据安置头16借助安置头移动机构15的使用在X和Y方向上的水平移动组合与第一吸嘴17A和第二吸嘴17B的抬起和降低操作执行元件配置操作。即，安置头16从第一元件输送器2A和第二元件输送器2B中拾取多个第一元件3和多个第二元件4并借助第一吸嘴17A和第二吸嘴17B将多个第一元件3和第二元件4传送到电路板保持单元11，并且安置头16沿着传送轨道12将多个第一元件3和第二元件4放置在电路板13的元件配置位置13a上以使其相互固定。
接着，描述焊膏传递装置5的功能和结构。利用安置头移动机构15将焊膏传递装置5设置在安置头16的移动路径上，并且焊膏传递装置5具有利用转移涂布方法以涂覆膜根据安置头16所保持的第一元件3和第二元件4的凸点3a和4a具有至少两种类型不同薄膜厚度的方式施加焊剂10的功能。如图4A和4B所示，传递台7设置在移动台6的上表面上以便沿Y方向水平移动。如图4B所示，传递台7借助包含移动台6内构建的电机20、进给螺杆21a和螺母21b的直接操作机构22沿Y方向往复移动，并借助控制电机20的控制单元24执行直接操作机构22。
用于形成焊剂涂覆膜10的平而宽的涂覆膜形成表面7a形成在传递台7的上表面上。涂覆膜形成表面7a被形成为具有长边和短边的矩形平坦表面，也就是，其被形成以X方向的尺寸L大于Y方向的尺寸B。在此，涂覆膜形成表面7a被形成以具有这样的形状和尺寸，以允许具有上述平面表面尺寸的涂覆膜被同时传送到安置头的每个单元安置头16a所保持的多个第一元件3和第二元件4上(在此，单一安置头16所保持的元件3和4的数量分别为4个)，其中涂覆膜形成区域A1和A2被设定成分别对应涂覆膜形成表面7a上的四个第一元件3和四个第二元件4。
即，传递台7被形成以将安置头16所保持的多个第一元件3和第二元件4二维地设置在传递台表面上。借助这样的构造，在保持多个第一元件3和第二元件4的安置头16从元件供给单元1到电路板保持单元11的移动过程中，相对于焊膏传递装置5抬起和下降由安置头16所保持的多个第一元件3和第二元件4，进而利用转移涂覆方法使多个第一元件3和第二元件4的凸点3a和4a一起涂覆有焊剂10。
具有第一涂刷器部件9A和第二涂刷器部件9B的涂刷器单元8设置在传递台7的上方。第一涂刷器部件9A和第二涂刷器部件9B都被形成以具有基本覆盖涂覆膜形成表面7a的X方向尺寸L的长度，并被制成以借助涂刷器单元8中构建的第一涂刷器抬起和降低机构23A和第二涂刷器抬起和降低机构23B抬起和降低，也就是说，被制成以朝向或远离涂覆膜形成表面7a移动。
第一涂刷器抬起和降低机构23A和第二涂刷器抬起和降低机构23B由控制单元24所控制，并能精确地操作第一涂刷器部件9A和第二涂刷器部件9B的抬起和降低位置。利用上述构造，第一涂刷器部件9A和第二涂刷器部件9B(如图4B所示的作为参考的第一涂刷器部件9A)能够在其较低下端部与涂覆膜形成表面7a之间维持预定的涂覆膜形成间隙g，并且下端部能够与涂覆膜形成表面7a处于滑动接触(如图4B所示的作为参考的第二涂刷器部件9B)。也就是说，第一涂刷器部件9A和第二涂刷器部件9B由设置以维持下端部和涂覆膜形成表面7a之间的涂覆膜形成间隙g的膜形成部件所形成。
焊剂10设置在涂覆膜形成表面7a上，并且第一涂刷器部件9A和第二涂刷器部件9B借助驱动直接操作机构22相对于传递台7沿水平方向相对移动，以允许传递台7在第一涂刷器部件9A和第二涂刷器部件9B维持在图4B中所示位置的状态下水平移动，进而在涂覆膜形成表面7a上执行形成具有根据涂覆膜形成间隙g设定的厚度的焊剂涂覆膜10的涂覆膜形成操作。
相应地，利用水平移动传递台7、相对于传递台7以水平方式相对移动用作涂覆膜形成部件的第一涂刷器部件9A和第二涂刷器部件9B的直接操作机构22，构造用于执行形成具有根据涂覆膜形成间隙g设定的厚度的焊剂涂覆膜10的涂覆膜形成操作的涂覆膜形成操作装置。在涂覆膜形成操作中，由于第一涂刷器部件9A和第二涂刷器部件9B沿Y方向移动，也就是沿涂覆膜形成表面7a上矩形短边的方向移动，缩短了一次涂覆膜形成操作过程中的移动距离，进而能够缩短涂覆膜形成操作的必需时间。
此时，通过允许电机20、第一涂刷器抬起和降低机构23A和第二涂刷器抬起和降低机构23B受控制单元24控制，能够与传递台7的水平移动同步地控制第一涂刷器部件9A和第二涂刷器部件9B的抬起和降低位置。利用这种构造，能够根据涂覆膜形成表面7a上Y方向上的位置任意地改变涂覆膜形成间隙g，进而能够将焊膏涂覆膜的厚度t调节到所需厚度。即，将控制单元24、第一涂刷器抬起和降低机构23A和第二涂刷器抬起和降低机构23B制造成用于通过改变涂覆膜形成间隙调节焊膏涂覆膜厚度的厚度调节装置。
接着，参照图5A至5D和6A至6D描述焊膏传递装置5所执行的涂覆膜形成操作和涂覆膜刮擦操作。首先，图5A示出了第一涂刷器部件9A和第二涂刷器部件9B置于涂覆膜形成开始侧的端部(在本示例中为右端部)以及在开始涂覆膜形成操作之前在涂覆膜形成表面7a上的第一涂刷器部件9A和第二涂刷器部件9B之间施加焊剂10的状态。在此，说明利用第一涂刷器部件9A形成涂覆膜的实例。在开始涂覆膜形成操作时，第一涂刷器部件9A下端部与涂覆膜形成表面7a之间的涂覆膜形成间隙被设定成厚度t1，使得焊剂10被最适当地传递到第一元件3的凸点3a上，并且抬起第二涂刷器部件9B，以便不会扰乱焊剂10在形成涂覆膜时的流动。
随后，通过驱动移动台6内构建的直接操作机构22(参见图4B)，使得传递台7沿着图5B中所示箭头a的方向移动。利用上述构造，焊剂10被第一涂刷器部件9A散布在涂覆膜形成表面7a上，并且在涂覆膜形成表面7a上形成具有厚度t1的涂覆膜10a。另外，如图5C所示，在形成如图4A所示的具有根据涂覆膜形成区域A1设定的宽度的涂覆膜10a时调节厚度。也就是说，通过利用控制单元24控制第一涂刷器抬起和降低机构23A，略微降低第一涂刷器部件9A，以使第一涂刷器部件9A下端部和涂覆膜形成表面7a之间的涂覆膜形成间隙g变为厚度t2，进而允许最适合的焊剂10被传递到第二元件4的凸点4a上。
进而，通过沿箭头a的方向再次移动，在涂覆膜形成表面7a上形成具有厚度t2的涂覆膜10b。如图5D所示，通过形成具有根据图4B中所示的涂覆膜形成区域A2设定的宽度的涂覆膜10b，完成涂覆膜形成操作。即，在本实施例中，在涂覆膜形成操作期间，借助厚度调节装置改变涂覆膜形成间隙g，进而在涂覆膜形成表面7a上形成具有根据安置头16所保持的多个第一元件3和第二元件4所设定的厚度t1和t2的涂覆膜。
另外，在上述涂覆膜形成操作实例中，说明了第一涂刷器部件9A形成涂覆膜的实例，但涂覆膜也可由第二涂刷器部件9B形成。在此情况中，涂覆膜形成表面7a上左侧端部被设定为涂覆膜开始侧的端部，并通过沿与箭头a相反的方向移动传递台7，按照与上述相同的方式在涂覆膜形成表面7a上形成焊剂涂覆膜10。
在上述涂覆膜形成操作实例中，将具有不同厚度的两种类型的涂覆膜形成以星形，但也可形成其厚度同层多阶变化的涂覆膜。另外，通过利用控制单元24彼此同步地控制电机20、第一涂刷器抬起和降低机构23A和第二涂刷器抬起和降低机构23B，能够将涂覆膜形成以厚度在涂覆膜形成表面7a上不会变化且没有任何台阶。利用这种构造，能在相同元件的目标传递凸点上形成具有不同厚度的涂覆膜，进而能够精确地调节焊剂的施加量。
接着，参照图6A至6D描述刮擦焊剂10的操作。无论何时利用转移涂布方法由形成在涂覆膜形成表面7a上的涂覆膜将焊剂10传递到第一元件3或第二元件4，因为涂覆膜变得粗糙而使得涂覆膜变成不能用的状态。为此，必须刮擦粗糙的涂覆膜，使涂覆膜可用于涂覆膜形成操作。即，如图6A所示，在焊剂10未均匀地散布在涂覆膜形成表面7a上的情况中，第二涂刷器部件9B朝涂覆膜形成表面7a下降，以便与涂覆膜表面7a滑动接触，并且传递台7随后沿箭头b的方向移动。利用这种结构，如图6B所示，涂覆膜形成表面7a上的焊剂10借助第二涂刷器部件9B的刮擦操作而被收集。因此，涂覆膜几乎变成与图5A中所示涂覆膜形成操作开始之前相同的状态。
当然，第一涂刷器部件9A也能够收集焊剂10。如图6C所示，在焊剂10以上述相同的方式不均匀地形成在涂覆膜形成表面7a上，第一涂刷器部件9A朝涂覆膜形成表面7a降低以便与涂覆膜形成表面7a滑动接触，并且传递台7随后沿箭头a移动。利用上述构造，如图6D所示，涂覆膜形成表面7a上的焊剂10通过第一涂刷器部件9A的刮擦操作而被收集。即，在本实施例中，用作涂覆膜形成部件的第一涂刷器部件9A和第二涂刷器部件9B被构造以用于刮擦涂覆膜形成表面7a上的涂覆膜。
按照以上所述构造元件配置设备。接着，描述利用元件配置元件将第一元件3和第二元件4配置在电路板13上而形成叠层结构的元件配置方法。首先，在焊膏传递装置5中，执行图5中所描述的涂覆膜形成操作，并形成具有根据多个元件设定的厚度的焊膏涂覆膜(涂覆膜形成步骤)。即，如图7A所示，具有根据第一元件3设定的厚度的涂覆膜10a形成在涂覆膜形成表面7a上，并随后如图7B所示，具有根据第二元件4设定的厚度的涂覆膜10b形成在涂覆膜形成表面7a上。
此后，利用安置头16从元件供给单元1拾取多个第一元件3和第二元件4(元件拾取步骤)。即，如图8A所示，安置头16在元件供给单元1上方移动，并且第二吸嘴17B首先从第二元件输送器2B(参看图2)拾取第二元件4。随后，如图8B所示，第一吸嘴17A从第一元件输送器2A(参看图2)拾取第一元件3。
此后，保持多个第一元件3和第二元件4的安置头16从元件供给单元1移动到电路板保持单元11。在移动过程中，如图9A所示，安置头16停在焊膏传递装置5上方，并且第一元件3和第二元件4分别置于之前形成在涂覆膜形成表面7a上的涂覆膜10a和10b上方。随后，抬起和降低第一吸嘴17A和第二吸嘴17B，进而相对于涂覆膜形成表面7a抬起和降低多个第一元件3和第二元件4，进而利用转移涂布方法使多个第一元件3和第二元件4的凸点3a和4a一起分别配有焊膏10(焊膏传递步骤)。即，如图9B所示，第一吸嘴17A和第二吸嘴17B所保持的第一元件3和第二元件4的凸点3a和4a开始分别与形成在涂覆膜形成表面7a上的涂覆膜10a和10b相接触。
随后，如图10A所示，当抬起第一吸嘴7A和第二吸嘴17B时，变成利用转移涂布方法使得凸点3a和4a下端部涂覆有焊剂10的状态。此时，由于具有根据凸点3a和4a各自凸点尺寸最佳设定的厚度t1和t2的涂覆膜10a和10b形成在涂覆膜形成表面7a，所以为凸点3a和4a提供最适合量的焊剂10。
此后，安置头16在电路板保持单元11上方移动，并且传递有焊剂10的多个第一元件3和第二元件4被放置在电路板13上(元件放置步骤)。即，如图11A和11B所示，第一吸嘴17A首先被适当地定位在电路板13的部件配置位置13a(参看图2)，并通过抬起和降低第一吸嘴17A将第一元件置于电路板13上。随后，如图12A和12B所示，第二吸嘴17B被适当地定位在之前放置在电路板13上的第一元件3上，并通过抬起和降低第二吸嘴17B将第二元件4放置在第一元件3上。利用这种构造，在电路板13上形成第二元件4叠置在第一元件3上的层叠结构。
此后，在元件配置位置13a上形成有层叠结构的电路板13通过传送轨12被传送到下流侧，并且随后被传送到回流装置(reflow device)，以便通过加热实行钎焊接合。利用这种构造，利用钎焊接合方法借助凸点3a将第一元件3接合在电路板13上，并利用钎焊接合方法借助凸点4a将第二元件4接合在第一元件3上。此时，由于根据凸点尺寸为凸点3a和4a施加最适合量的焊剂10，所有很少发生由于过量或不足量的焊剂10所引起的不完全接合。
如上所述，根据本实施例的元件配置方法，在元件拾取步骤中，在元件配置在电路板13上之后，包含构成层叠结构的第一元件3和第二元件4的多个元件被每次单一配置轮回的安置头16所拾取。在焊膏传递步骤中，使第一元件3和第二元件4的凸点3a和4a与具有不同厚度的焊膏涂覆膜10a和10b相接触，分别使凸点3a和4a一起涂覆有不同量的焊膏。另外，在元件放置步骤中，将第一元件3放置在电路板13上，并随后通过使其相互固定而将第二元件4放置在第一元件3，进而形成层叠结构。利用这种构造，通过其中安置头16从元件供给单元1移动到电路板保持单元11的单一配置轮回操作能够有效地形成层叠结构。
此外，根据本实施例，尽管描述了其中用于焊剂的焊膏被传递到由焊料形成的凸点的实例，但本发明并不限于上述应用，并且也可用于这样的应用，利用转移涂布方法使得由焊料之外的金属所形成的凸点覆盖有焊膏类的粘合材料，如焊料焊膏或树脂粘结剂。
根据本发明的元件配置设备和元件配置方法具有以下优点，即同时形成具有不同任意厚度的涂覆膜并通过确保最适合量的焊膏以满意的粘度有效地实行元件配置，并适用于将其上形成有凸点的多个元件配置在电路板的领域。
本申请基于并要求2006年5月10日递交的日本专利申请No.2006-131363的优先权权益，其全部内容在此包含引作参考。

Claims (4)

1.一种用于将下表面上形成有凸点的元件配置在电路板上的元件配置设备，所述设备包括：
提供多个元件的元件供给单元；
保持并定位电路板的电路板保持单元；
从元件供给单元拾取多个元件并将该多个元件放置在电路板保持单元所保持的电路板上的安置头；
使安置头移动到元件供给单元和电路板保持单元的安置头移动装置；和
设置在安置头移动路径上并提供焊膏的焊膏传递装置，安置头所保持的多个元件的凸点借助于转移涂布方法以具有至少两种不同厚度的涂覆膜的形式被涂覆所述焊膏，
其中在保持多个元件的安置头从元件供给单元到电路板保持单元的移动过程中，利用转移涂布方法通过相对于焊膏传递装置而抬起和降低安置头所保持的多个元件，成束地为多个元件的凸点施加焊膏。
2.根据权利要求1所述的元件配置设备，其中所述元件供给单元提供的多个元件包括第一元件和第二元件，所述第一元件和第二元件在配置所述元件之后构成层叠结构，
其中所述焊膏传递装置提供具有根据第一元件和第二元件的凸点设定的不同厚度的涂覆膜。
3.一种利用元件配置设备在电路板上配置元件的元件配置方法，所述元件配置设备包括提供下表面上形成有凸点的多个元件的元件供给单元，保持并定位电路板的电路板保持单元，从元件供给单元拾取多个元件并将多个元件放置在电路板保持单元所保持的电路板上的安置头，将安置头移动到元件供给单元和电路板保持单元的安置头移动装置，以及设置在安置头移动路径上并提供焊膏的焊膏传递装置，安置头所保持的多个元件的凸点借助于转移涂布方法以具有至少两种不同厚度的涂覆膜的形式被涂覆所述焊膏，所述元件配置方法包括步骤：
利用焊膏传递装置分别以根据多个元件设定的不同厚度形成焊膏涂覆膜；
利用安置头从元件供给单元拾取多个元件；
在保持多个元件的安置头从元件供给单元到电路板保持单元的移动过程中，通过相对于焊膏传递装置抬起和降低安置头所保持的多个元件而成束地为多个元件的钎料凸点传递焊膏；和
将其上已经传递有焊膏的多个元件放置在电路板上。
4.根据权利要求3所述的元件配置方法，其中在所述拾取元件的步骤中拾取的多个元件包括第一元件和第二元件，所述第一元件和第二元件在配置所述元件之后构成层叠结构，
其中在所述传递焊膏的步骤中通过使第一元件和第二元件与具有不同厚度的涂覆膜相接触而施加不同量的焊膏，和
其中在所述放置元件的步骤中通过将第一元件放置在电路板上以及将第二元件叠置在第一元件上形成层叠结构。
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Families Citing this family (18)

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Publication number Priority date Publication date Assignee Title
CN101194541A (zh) * 2005-06-16 2008-06-04 千住金属工业株式会社 模块基板的钎焊方法
KR20090125151A (ko) * 2007-04-03 2009-12-03 파나소닉 주식회사 부품 실장 방법
JP5100496B2 (ja) * 2008-05-13 2012-12-19 Ｊｕｋｉ株式会社 粘着剤転写装置
JP4788759B2 (ja) * 2008-11-20 2011-10-05 パナソニック株式会社 部品実装装置
JP4811499B2 (ja) * 2009-06-02 2011-11-09 パナソニック株式会社 部品実装装置
KR101036134B1 (ko) * 2009-08-20 2011-05-23 세크론 주식회사 솔더 범프 전달 장치
US7845541B1 (en) * 2009-12-01 2010-12-07 Cheng Uei Precision Industry Co., Ltd. Soldering apparatus and soldering method
JP5597050B2 (ja) * 2010-07-15 2014-10-01 富士機械製造株式会社 基板停止位置制御方法および装置、ならびに基板装着位置制御方法
US8381965B2 (en) 2010-07-22 2013-02-26 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal compress bonding
US8104666B1 (en) 2010-09-01 2012-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal compressive bonding with separate die-attach and reflow processes
JP5874683B2 (ja) * 2013-05-16 2016-03-02 ソニー株式会社 実装基板の製造方法、および電子機器の製造方法
TWI514489B (zh) * 2013-05-23 2015-12-21 Shinkawa Kk 電子零件安裝裝置以及電子零件的製造方法
JP6123076B2 (ja) * 2013-11-12 2017-05-10 パナソニックＩｐマネジメント株式会社 スクリーン印刷装置及び電子部品実装システム
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US9673170B2 (en) 2014-08-05 2017-06-06 Infineon Technologies Ag Batch process for connecting chips to a carrier
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WO2018161240A1 (zh) * 2017-03-06 2018-09-13 邹霞 Pcb基板自动装配装置
US20190275600A1 (en) * 2018-03-07 2019-09-12 Powertech Technology Inc. Flux transfer tool and flux transfer method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08162797A (ja) * 1994-12-08 1996-06-21 Matsushita Electric Ind Co Ltd 電子部品実装装置
JP2000022394A (ja) 1998-07-06 2000-01-21 Matsushita Electric Ind Co Ltd 電子部品の実装装置および実装方法ならびにフラックス転写装置および転写方法
DE69921418T2 (de) * 1998-10-13 2005-12-01 Matsushita Electric Industrial Co., Ltd., Kadoma Vorrichtung und Verfahren zur Montage eines elektronischen Bauteils
US6479321B2 (en) * 2001-03-23 2002-11-12 Industrial Technology Research Institute One-step semiconductor stack packaging method
JP3846554B2 (ja) * 2001-06-01 2006-11-15 日本電気株式会社 印刷用マスクおよび印刷方法、実装構造体およびこの実装構造体の製造方法
JP3899902B2 (ja) * 2001-11-07 2007-03-28 松下電器産業株式会社 ペースト供給装置
JP4074763B2 (ja) * 2002-01-22 2008-04-09 シャープ株式会社 太陽電池の製造方法
JP3661658B2 (ja) * 2002-03-19 2005-06-15 松下電器産業株式会社 電子部品搭載装置および電子部品搭載方法
JP4357940B2 (ja) * 2003-06-09 2009-11-04 パナソニック株式会社 実装基板の製造方法
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