CN100550422C - 半导体结构 - Google Patents
半导体结构 Download PDFInfo
- Publication number
- CN100550422C CN100550422C CNB2006800115140A CN200680011514A CN100550422C CN 100550422 C CN100550422 C CN 100550422C CN B2006800115140 A CNB2006800115140 A CN B2006800115140A CN 200680011514 A CN200680011514 A CN 200680011514A CN 100550422 C CN100550422 C CN 100550422C
- Authority
- CN
- China
- Prior art keywords
- layer
- gate dielectric
- metal
- gate
- dielectric layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01332—Making the insulator
- H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
- H10D64/0134—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01318—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN
- H10D64/0132—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN the conductor being a metallic silicide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01332—Making the insulator
- H10D64/0135—Making the insulator by deposition of a layer, e.g. metal, metal compound or polysilicon, followed by transformation thereof into the insulator
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
- H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0181—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/907,935 | 2005-04-21 | ||
| US10/907,935 US7504700B2 (en) | 2005-04-21 | 2005-04-21 | Method of forming an ultra-thin [[HfSiO]] metal silicate film for high performance CMOS applications and semiconductor structure formed in said method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101156246A CN101156246A (zh) | 2008-04-02 |
| CN100550422C true CN100550422C (zh) | 2009-10-14 |
Family
ID=37185981
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006800115140A Expired - Fee Related CN100550422C (zh) | 2005-04-21 | 2006-04-19 | 半导体结构 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7504700B2 (https=) |
| EP (1) | EP1872409A4 (https=) |
| JP (1) | JP5159609B2 (https=) |
| CN (1) | CN100550422C (https=) |
| TW (1) | TW200727479A (https=) |
| WO (1) | WO2006115914A1 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107516631A (zh) * | 2016-06-15 | 2017-12-26 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的形成方法 |
Families Citing this family (48)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7589029B2 (en) | 2002-05-02 | 2009-09-15 | Micron Technology, Inc. | Atomic layer deposition and conversion |
| US7588988B2 (en) | 2004-08-31 | 2009-09-15 | Micron Technology, Inc. | Method of forming apparatus having oxide films formed using atomic layer deposition |
| US7820538B2 (en) * | 2005-04-21 | 2010-10-26 | Freescale Semiconductor, Inc. | Method of fabricating a MOS device with non-SiO2 gate dielectric |
| US7662729B2 (en) | 2005-04-28 | 2010-02-16 | Micron Technology, Inc. | Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer |
| US7927948B2 (en) | 2005-07-20 | 2011-04-19 | Micron Technology, Inc. | Devices with nanocrystals and methods of formation |
| US7799668B2 (en) * | 2005-08-17 | 2010-09-21 | Texas Instruments Incorporated | Formation of uniform silicate gate dielectrics |
| US8110469B2 (en) * | 2005-08-30 | 2012-02-07 | Micron Technology, Inc. | Graded dielectric layers |
| US8053849B2 (en) * | 2005-11-09 | 2011-11-08 | Advanced Micro Devices, Inc. | Replacement metal gate transistors with reduced gate oxide leakage |
| JP5039396B2 (ja) * | 2007-02-19 | 2012-10-03 | ローム株式会社 | 半導体装置の製造方法 |
| KR100877100B1 (ko) * | 2007-04-16 | 2009-01-09 | 주식회사 하이닉스반도체 | 비휘발성 메모리 소자 제조 방법 |
| JP2008288364A (ja) * | 2007-05-17 | 2008-11-27 | Sony Corp | 半導体装置および半導体装置の製造方法 |
| US9449831B2 (en) | 2007-05-25 | 2016-09-20 | Cypress Semiconductor Corporation | Oxide-nitride-oxide stack having multiple oxynitride layers |
| US8633537B2 (en) | 2007-05-25 | 2014-01-21 | Cypress Semiconductor Corporation | Memory transistor with multiple charge storing layers and a high work function gate electrode |
| US8283261B2 (en) * | 2007-05-25 | 2012-10-09 | Cypress Semiconductor Corporation | Radical oxidation process for fabricating a nonvolatile charge trap memory device |
| US8063434B1 (en) | 2007-05-25 | 2011-11-22 | Cypress Semiconductor Corporation | Memory transistor with multiple charge storing layers and a high work function gate electrode |
| US8940645B2 (en) | 2007-05-25 | 2015-01-27 | Cypress Semiconductor Corporation | Radical oxidation process for fabricating a nonvolatile charge trap memory device |
| US20090179253A1 (en) | 2007-05-25 | 2009-07-16 | Cypress Semiconductor Corporation | Oxide-nitride-oxide stack having multiple oxynitride layers |
| US7632745B2 (en) * | 2007-06-30 | 2009-12-15 | Intel Corporation | Hybrid high-k gate dielectric film |
| JP5349903B2 (ja) * | 2008-02-28 | 2013-11-20 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| US20100102393A1 (en) * | 2008-10-29 | 2010-04-29 | Chartered Semiconductor Manufacturing, Ltd. | Metal gate transistors |
| KR101049875B1 (ko) * | 2008-11-18 | 2011-07-19 | 주식회사 동부하이텍 | 반도체 소자 및 그의 제조 방법 |
| CN101752237B (zh) * | 2008-12-16 | 2012-08-08 | 国际商业机器公司 | 在半导体器件中形成高k栅极叠层的方法 |
| KR101589440B1 (ko) * | 2009-02-09 | 2016-01-29 | 삼성전자주식회사 | 듀얼 게이트 반도체 장치의 제조 방법 |
| US8026539B2 (en) * | 2009-02-18 | 2011-09-27 | Globalfoundries Inc. | Metal oxide semiconductor devices having doped silicon-compromising capping layers and methods for fabricating the same |
| US20100213555A1 (en) * | 2009-02-23 | 2010-08-26 | Advanced Micro Devices, Inc. | Metal oxide semiconductor devices having capping layers and methods for fabricating the same |
| US8048791B2 (en) * | 2009-02-23 | 2011-11-01 | Globalfoundries Inc. | Method of forming a semiconductor device |
| US7943457B2 (en) * | 2009-04-14 | 2011-05-17 | International Business Machines Corporation | Dual metal and dual dielectric integration for metal high-k FETs |
| JP5375362B2 (ja) * | 2009-06-24 | 2013-12-25 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| DE102009031155B4 (de) * | 2009-06-30 | 2012-02-23 | GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG | Einstellen einer Schwellwertspannung für komplexe Transistoren durch Diffundieren einer Metallsorte in das Gatedielektrikum vor der Gatestrukturierung |
| US20110065287A1 (en) * | 2009-09-11 | 2011-03-17 | Tokyo Electron Limited | Pulsed chemical vapor deposition of metal-silicon-containing films |
| WO2011055433A1 (ja) * | 2009-11-04 | 2011-05-12 | 株式会社 東芝 | 不揮発性半導体記憶装置 |
| US8598027B2 (en) | 2010-01-20 | 2013-12-03 | International Business Machines Corporation | High-K transistors with low threshold voltage |
| US8343865B2 (en) * | 2010-01-21 | 2013-01-01 | Renesas Electronics Corporation | Semiconductor device having dual work function metal |
| US20120273861A1 (en) * | 2011-04-29 | 2012-11-01 | Shanghan Institute Of Microsystem And Imformation Technology,Chinese Academ | Method of depositing gate dielectric, method of preparing mis capacitor, and mis capacitor |
| US8633118B2 (en) * | 2012-02-01 | 2014-01-21 | Tokyo Electron Limited | Method of forming thin metal and semi-metal layers by thermal remote oxygen scavenging |
| US8921176B2 (en) * | 2012-06-11 | 2014-12-30 | Freescale Semiconductor, Inc. | Modified high-K gate dielectric stack |
| TWI594327B (zh) * | 2012-07-01 | 2017-08-01 | 賽普拉斯半導體公司 | 用於製造非揮發性電荷捕獲記憶體元件之基氧化方法 |
| KR101934829B1 (ko) * | 2012-10-23 | 2019-03-18 | 삼성전자 주식회사 | 반도체 장치 및 반도체 장치의 제조 방법 |
| KR102392059B1 (ko) | 2013-07-29 | 2022-04-28 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
| US9070634B1 (en) * | 2013-12-26 | 2015-06-30 | Macronix International Co., Ltd. | Semiconductor device comprising a surface portion implanted with nitrogen and fluorine |
| US9673108B1 (en) | 2015-12-14 | 2017-06-06 | International Business Machines Corporation | Fabrication of higher-K dielectrics |
| CN107591437B (zh) * | 2016-07-07 | 2020-03-10 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的形成方法 |
| CN108630538A (zh) * | 2017-03-17 | 2018-10-09 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法和电子装置 |
| US10109639B1 (en) * | 2017-06-09 | 2018-10-23 | International Business Machines Corporation | Lateral non-volatile storage cell |
| CN107863349A (zh) * | 2017-10-17 | 2018-03-30 | 安阳师范学院 | 基于HfxSi1‑xO2多元氧化物存储材料的电荷存储器件及其制备方法 |
| WO2019195809A1 (en) * | 2018-04-06 | 2019-10-10 | Applied Materials, Inc. | Methods for conformal doping of three dimensional structures |
| US10629499B2 (en) | 2018-06-13 | 2020-04-21 | International Business Machines Corporation | Method and structure for forming a vertical field-effect transistor using a replacement metal gate process |
| JP7189848B2 (ja) * | 2019-08-07 | 2022-12-14 | 株式会社東芝 | 半導体装置およびその製造方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6172407B1 (en) * | 1998-04-16 | 2001-01-09 | Advanced Micro Devices, Inc. | Source/drain and lightly doped drain formation at post interlevel dielectric isolation with high-K gate electrode design |
| US6342414B1 (en) * | 2000-12-12 | 2002-01-29 | Advanced Micro Devices, Inc. | Damascene NiSi metal gate high-k transistor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPS5661165A (en) * | 1979-10-24 | 1981-05-26 | Fujitsu Ltd | Control of threshold voltage of transistor |
| DE19622600C2 (de) * | 1996-06-05 | 2001-08-02 | Fraunhofer Ges Forschung | Elektrochrome Einheit |
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| JP2002184973A (ja) * | 2000-12-11 | 2002-06-28 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JP3944367B2 (ja) * | 2001-02-06 | 2007-07-11 | 松下電器産業株式会社 | 絶縁膜の形成方法及び半導体装置の製造方法 |
| JP4184686B2 (ja) * | 2001-03-28 | 2008-11-19 | 株式会社東芝 | 半導体装置の製造方法 |
| US6420279B1 (en) | 2001-06-28 | 2002-07-16 | Sharp Laboratories Of America, Inc. | Methods of using atomic layer deposition to deposit a high dielectric constant material on a substrate |
| WO2003019643A1 (fr) * | 2001-08-23 | 2003-03-06 | Nec Corporation | Dispositif semi-conducteur comportant un film isolant presentant une permittivite elevee et son procede de production |
| JP3688631B2 (ja) * | 2001-11-22 | 2005-08-31 | 株式会社東芝 | 半導体装置の製造方法 |
| US6504214B1 (en) * | 2002-01-11 | 2003-01-07 | Advanced Micro Devices, Inc. | MOSFET device having high-K dielectric layer |
| US6797525B2 (en) * | 2002-05-22 | 2004-09-28 | Agere Systems Inc. | Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process |
| JP4004040B2 (ja) * | 2002-09-05 | 2007-11-07 | 株式会社東芝 | 半導体装置 |
| US6624093B1 (en) | 2002-10-09 | 2003-09-23 | Wisys Technology Foundation | Method of producing high dielectric insulator for integrated circuit |
| JP4574951B2 (ja) * | 2003-02-26 | 2010-11-04 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2005045166A (ja) * | 2003-07-25 | 2005-02-17 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP3790242B2 (ja) * | 2003-09-26 | 2006-06-28 | 株式会社東芝 | 半導体装置及びその製造方法 |
| US20050224897A1 (en) * | 2004-03-26 | 2005-10-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | High-K gate dielectric stack with buffer layer to improve threshold voltage characteristics |
-
2005
- 2005-04-21 US US10/907,935 patent/US7504700B2/en not_active Expired - Lifetime
-
2006
- 2006-04-07 TW TW095112383A patent/TW200727479A/zh unknown
- 2006-04-19 JP JP2008507818A patent/JP5159609B2/ja not_active Expired - Fee Related
- 2006-04-19 WO PCT/US2006/014622 patent/WO2006115914A1/en not_active Ceased
- 2006-04-19 EP EP06750619A patent/EP1872409A4/en not_active Withdrawn
- 2006-04-19 CN CNB2006800115140A patent/CN100550422C/zh not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6172407B1 (en) * | 1998-04-16 | 2001-01-09 | Advanced Micro Devices, Inc. | Source/drain and lightly doped drain formation at post interlevel dielectric isolation with high-K gate electrode design |
| US6342414B1 (en) * | 2000-12-12 | 2002-01-29 | Advanced Micro Devices, Inc. | Damascene NiSi metal gate high-k transistor |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107516631A (zh) * | 2016-06-15 | 2017-12-26 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的形成方法 |
| CN107516631B (zh) * | 2016-06-15 | 2019-11-05 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件的形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1872409A1 (en) | 2008-01-02 |
| JP5159609B2 (ja) | 2013-03-06 |
| EP1872409A4 (en) | 2009-12-30 |
| US7504700B2 (en) | 2009-03-17 |
| TW200727479A (en) | 2007-07-16 |
| US20060237803A1 (en) | 2006-10-26 |
| CN101156246A (zh) | 2008-04-02 |
| JP2008538655A (ja) | 2008-10-30 |
| WO2006115914A1 (en) | 2006-11-02 |
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