CN100477125C - 形成非对称侧壁间隔物的方法 - Google Patents
形成非对称侧壁间隔物的方法 Download PDFInfo
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- CN100477125C CN100477125C CNB2004800217465A CN200480021746A CN100477125C CN 100477125 C CN100477125 C CN 100477125C CN B2004800217465 A CNB2004800217465 A CN B2004800217465A CN 200480021746 A CN200480021746 A CN 200480021746A CN 100477125 C CN100477125 C CN 100477125C
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- side wall
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
- H01L21/823425—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
- H01L29/6678—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates on sapphire substrates, e.g. SOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/78654—Monocrystalline silicon transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/78654—Monocrystalline silicon transistors
- H01L29/78657—SOS transistors
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Drying Of Semiconductors (AREA)
- Electron Beam Exposure (AREA)
Abstract
Description
Claims (10)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/633,981 US6794256B1 (en) | 2003-08-04 | 2003-08-04 | Method for asymmetric spacer formation |
US10/633,981 | 2003-08-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1830074A CN1830074A (zh) | 2006-09-06 |
CN100477125C true CN100477125C (zh) | 2009-04-08 |
Family
ID=32991187
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800217465A Expired - Fee Related CN100477125C (zh) | 2003-08-04 | 2004-06-04 | 形成非对称侧壁间隔物的方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US6794256B1 (zh) |
JP (1) | JP2007501518A (zh) |
KR (1) | KR101065048B1 (zh) |
CN (1) | CN100477125C (zh) |
DE (1) | DE112004001441B4 (zh) |
GB (1) | GB2421854B (zh) |
TW (1) | TWI342061B (zh) |
WO (1) | WO2005017993A1 (zh) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4867171B2 (ja) * | 2005-01-21 | 2012-02-01 | 富士電機株式会社 | 半導体装置の製造方法 |
DE102005009023B4 (de) * | 2005-02-28 | 2011-01-27 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Herstellen einer Gateelektrodenstruktur mit asymmetrischen Abstandselementen und Gateestruktur |
JP5170490B2 (ja) * | 2005-06-09 | 2013-03-27 | セイコーエプソン株式会社 | 半導体装置 |
US7396713B2 (en) * | 2005-10-07 | 2008-07-08 | International Business Machines Corporation | Structure and method for forming asymmetrical overlap capacitance in field effect transistors |
US20070090406A1 (en) * | 2005-10-26 | 2007-04-26 | International Business Machines Corporation | Structure and method for manufacturing high performance and low leakage field effect transistor |
JP4812480B2 (ja) * | 2006-03-22 | 2011-11-09 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
WO2008114392A1 (ja) * | 2007-03-19 | 2008-09-25 | Fujitsu Microelectronics Limited | 半導体装置及びその製造方法 |
US7892928B2 (en) * | 2007-03-23 | 2011-02-22 | International Business Machines Corporation | Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers |
JP5206668B2 (ja) * | 2007-03-28 | 2013-06-12 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
KR100950473B1 (ko) * | 2007-12-28 | 2010-03-31 | 주식회사 하이닉스반도체 | 균일한 두께의 게이트스페이서막을 갖는 반도체소자의제조방법 |
KR101028085B1 (ko) * | 2008-02-19 | 2011-04-08 | 엘지전자 주식회사 | 비대칭 웨이퍼의 식각방법, 비대칭 식각의 웨이퍼를포함하는 태양전지, 및 태양전지의 제조방법 |
US9016236B2 (en) | 2008-08-04 | 2015-04-28 | International Business Machines Corporation | Method and apparatus for angular high density plasma chemical vapor deposition |
DE102008049719A1 (de) | 2008-09-30 | 2010-04-08 | Advanced Micro Devices, Inc., Sunnyvale | Asymmetrische Transistorbauelemente, die durch asymmetrische Abstandshalter und eine geeignete Implantation hergestellt sind |
DE102009006885B4 (de) | 2009-01-30 | 2011-09-22 | Advanced Micro Devices, Inc. | Verfahren zum Erzeugen einer abgestuften Wannenimplantation für asymmetrische Transistoren mit kleinen Gateelektrodenabständen und Halbleiterbauelemente |
JP5463811B2 (ja) | 2009-09-09 | 2014-04-09 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP5817205B2 (ja) * | 2011-04-28 | 2015-11-18 | 株式会社デンソー | 半導体装置の製造方法 |
CN102610526A (zh) * | 2012-03-23 | 2012-07-25 | 上海华力微电子有限公司 | 减小热载流子注入损伤的侧墙刻蚀方法 |
US8822320B2 (en) | 2012-11-20 | 2014-09-02 | International Business Machines Corporation | Dense finFET SRAM |
US8889022B2 (en) * | 2013-03-01 | 2014-11-18 | Globalfoundries Inc. | Methods of forming asymmetric spacers on various structures on integrated circuit products |
US20150021689A1 (en) | 2013-07-18 | 2015-01-22 | International Business Machines Corporation | Asymmetrical replacement metal gate field effect transistor |
US9613954B2 (en) * | 2014-07-08 | 2017-04-04 | International Business Machines Corporation | Selective removal of semiconductor fins |
US9748364B2 (en) * | 2015-04-21 | 2017-08-29 | Varian Semiconductor Equipment Associates, Inc. | Method for fabricating three dimensional device |
US9543435B1 (en) | 2015-10-20 | 2017-01-10 | International Business Machines Corporation | Asymmetric multi-gate finFET |
US9659942B1 (en) | 2015-11-24 | 2017-05-23 | International Business Machines Corporation | Selective epitaxy growth for semiconductor devices with fin field-effect transistors (FinFET) |
US9773870B1 (en) | 2016-06-28 | 2017-09-26 | International Business Machines Corporation | Strained semiconductor device |
US10002762B2 (en) * | 2016-09-09 | 2018-06-19 | International Business Machines Corporation | Multi-angled deposition and masking for custom spacer trim and selected spacer removal |
US10229832B2 (en) * | 2016-09-22 | 2019-03-12 | Varian Semiconductor Equipment Associates, Inc. | Techniques for forming patterned features using directional ions |
US10079290B2 (en) * | 2016-12-30 | 2018-09-18 | United Microelectronics Corp. | Semiconductor device having asymmetric spacer structures |
KR102491093B1 (ko) | 2017-08-21 | 2023-01-20 | 삼성전자주식회사 | 패턴 형성 방법 |
US11075268B2 (en) | 2019-08-15 | 2021-07-27 | Globalfoundries U.S. Inc. | Transistors with separately-formed source and drain |
US11362178B2 (en) | 2019-11-07 | 2022-06-14 | Globalfoundries U.S. Inc. | Asymmetric source drain structures |
US11239366B2 (en) | 2020-01-30 | 2022-02-01 | Globalfoundries U.S. Inc. | Transistors with an asymmetrical source and drain |
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JPS60210876A (ja) * | 1984-04-04 | 1985-10-23 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH03273646A (ja) * | 1990-03-22 | 1991-12-04 | Nec Corp | 絶縁ゲート型電界効果トランジスタの製造方法 |
JP2786307B2 (ja) * | 1990-04-19 | 1998-08-13 | 三菱電機株式会社 | 電界効果トランジスタ及びその製造方法 |
JPH04186732A (ja) * | 1990-11-21 | 1992-07-03 | Hitachi Ltd | 半導体装置及びその製造方法 |
JPH05136165A (ja) * | 1991-11-11 | 1993-06-01 | Fujitsu Ltd | 半導体装置の製造方法 |
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JP3514500B2 (ja) * | 1994-01-28 | 2004-03-31 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
JP2827882B2 (ja) * | 1994-02-24 | 1998-11-25 | 日本電気株式会社 | 半導体装置の製造方法 |
CN1157480A (zh) * | 1995-08-30 | 1997-08-20 | 摩托罗拉公司 | 用栅电极易处置隔层形成单边缓变沟道半导体器件的方法 |
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-
2003
- 2003-08-04 US US10/633,981 patent/US6794256B1/en not_active Expired - Fee Related
-
2004
- 2004-06-04 CN CNB2004800217465A patent/CN100477125C/zh not_active Expired - Fee Related
- 2004-06-04 KR KR1020067002326A patent/KR101065048B1/ko not_active IP Right Cessation
- 2004-06-04 JP JP2006522548A patent/JP2007501518A/ja active Pending
- 2004-06-04 DE DE112004001441T patent/DE112004001441B4/de not_active Expired - Fee Related
- 2004-06-04 GB GB0604133A patent/GB2421854B/en not_active Expired - Fee Related
- 2004-06-04 WO PCT/US2004/017708 patent/WO2005017993A1/en active Application Filing
- 2004-07-23 TW TW093122009A patent/TWI342061B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB2421854B (en) | 2007-01-24 |
WO2005017993A1 (en) | 2005-02-24 |
DE112004001441B4 (de) | 2010-06-17 |
KR101065048B1 (ko) | 2011-09-20 |
TWI342061B (en) | 2011-05-11 |
GB2421854A (en) | 2006-07-05 |
US6794256B1 (en) | 2004-09-21 |
GB0604133D0 (en) | 2006-04-12 |
TW200507170A (en) | 2005-02-16 |
CN1830074A (zh) | 2006-09-06 |
DE112004001441T5 (de) | 2006-06-08 |
JP2007501518A (ja) | 2007-01-25 |
KR20060055533A (ko) | 2006-05-23 |
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