CH623959A5 - - Google Patents
Download PDFInfo
- Publication number
- CH623959A5 CH623959A5 CH1285977A CH1285977A CH623959A5 CH 623959 A5 CH623959 A5 CH 623959A5 CH 1285977 A CH1285977 A CH 1285977A CH 1285977 A CH1285977 A CH 1285977A CH 623959 A5 CH623959 A5 CH 623959A5
- Authority
- CH
- Switzerland
- Prior art keywords
- layer
- doping
- source
- mask
- semiconductor body
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims description 48
- 230000003647 oxidation Effects 0.000 claims description 32
- 238000007254 oxidation reaction Methods 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 25
- 230000005669 field effect Effects 0.000 claims description 22
- 239000004020 conductor Substances 0.000 claims description 21
- 229910052785 arsenic Inorganic materials 0.000 claims description 18
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 15
- 238000009792 diffusion process Methods 0.000 claims description 15
- 230000000873 masking effect Effects 0.000 claims description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 13
- 229910052787 antimony Inorganic materials 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 12
- 239000000126 substance Substances 0.000 claims description 10
- 150000004767 nitrides Chemical class 0.000 claims description 9
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical group [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 125000004429 atom Chemical group 0.000 claims description 6
- 239000002019 doping agent Substances 0.000 claims description 6
- 238000005468 ion implantation Methods 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 125000004437 phosphorous atom Chemical group 0.000 claims description 3
- 238000002513 implantation Methods 0.000 claims description 2
- 238000001259 photo etching Methods 0.000 claims description 2
- 238000002161 passivation Methods 0.000 claims 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- 238000010586 diagram Methods 0.000 claims 1
- 230000004927 fusion Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000012535 impurity Substances 0.000 claims 1
- 238000005259 measurement Methods 0.000 claims 1
- 238000001465 metallisation Methods 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 108090000623 proteins and genes Proteins 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 230000002349 favourable effect Effects 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Local Oxidation Of Silicon (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NLAANVRAGE7611773,A NL185376C (nl) | 1976-10-25 | 1976-10-25 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH623959A5 true CH623959A5 (nl) | 1981-06-30 |
Family
ID=19827103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH1285977A CH623959A5 (nl) | 1976-10-25 | 1977-10-21 |
Country Status (11)
| Country | Link |
|---|---|
| US (1) | US4101344A (nl) |
| JP (1) | JPS5353276A (nl) |
| AU (1) | AU506465B2 (nl) |
| CA (1) | CA1075372A (nl) |
| CH (1) | CH623959A5 (nl) |
| DE (1) | DE2745857A1 (nl) |
| FR (1) | FR2368799A1 (nl) |
| GB (1) | GB1567197A (nl) |
| IT (1) | IT1066832B (nl) |
| NL (1) | NL185376C (nl) |
| SE (1) | SE414980B (nl) |
Families Citing this family (39)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7038290B1 (en) | 1965-09-28 | 2006-05-02 | Li Chou H | Integrated circuit device |
| US5696402A (en) * | 1965-09-28 | 1997-12-09 | Li; Chou H. | Integrated circuit device |
| US4244752A (en) * | 1979-03-06 | 1981-01-13 | Burroughs Corporation | Single mask method of fabricating complementary integrated circuits |
| US4288910A (en) * | 1979-04-16 | 1981-09-15 | Teletype Corporation | Method of manufacturing a semiconductor device |
| NL7903158A (nl) * | 1979-04-23 | 1980-10-27 | Philips Nv | Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze. |
| US4261761A (en) * | 1979-09-04 | 1981-04-14 | Tektronix, Inc. | Method of manufacturing sub-micron channel width MOS transistor |
| US4458262A (en) * | 1980-05-27 | 1984-07-03 | Supertex, Inc. | CMOS Device with ion-implanted channel-stop region and fabrication method therefor |
| NL8003612A (nl) * | 1980-06-23 | 1982-01-18 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd door toepassing van deze werkwijze. |
| EP0052475A3 (en) * | 1980-11-19 | 1983-12-21 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing the same |
| NL186886C (nl) * | 1980-11-28 | 1992-03-16 | Philips Nv | Halfgeleiderinrichting. |
| US4373965A (en) * | 1980-12-22 | 1983-02-15 | Ncr Corporation | Suppression of parasitic sidewall transistors in locos structures |
| US4511911A (en) * | 1981-07-22 | 1985-04-16 | International Business Machines Corporation | Dense dynamic memory cell structure and process |
| US4763177A (en) * | 1985-02-19 | 1988-08-09 | Texas Instruments Incorporated | Read only memory with improved channel length isolation and method of forming |
| GB2179787B (en) * | 1985-08-26 | 1989-09-20 | Intel Corp | Buried interconnect for mos structure |
| US4700461A (en) * | 1986-09-29 | 1987-10-20 | Massachusetts Institute Of Technology | Process for making junction field-effect transistors |
| US4874715A (en) * | 1987-05-20 | 1989-10-17 | Texas Instruments Incorporated | Read only memory with improved channel length control and method of forming |
| GB2215124A (en) * | 1988-02-16 | 1989-09-13 | Stc Plc | Integrated circuit underpasses |
| DE69324637T2 (de) | 1992-07-31 | 1999-12-30 | Hughes Electronics Corp., El Segundo | Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen |
| US5927992A (en) * | 1993-12-22 | 1999-07-27 | Stmicroelectronics, Inc. | Method of forming a dielectric in an integrated circuit |
| US5811865A (en) * | 1993-12-22 | 1998-09-22 | Stmicroelectronics, Inc. | Dielectric in an integrated circuit |
| US5418176A (en) * | 1994-02-17 | 1995-05-23 | United Microelectronics Corporation | Process for producing memory devices having narrow buried N+ lines |
| JP3653107B2 (ja) * | 1994-03-14 | 2005-05-25 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
| US5756385A (en) * | 1994-03-30 | 1998-05-26 | Sandisk Corporation | Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers |
| US5661053A (en) * | 1994-05-25 | 1997-08-26 | Sandisk Corporation | Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers |
| US20040144999A1 (en) * | 1995-06-07 | 2004-07-29 | Li Chou H. | Integrated circuit device |
| US5767000A (en) * | 1996-06-05 | 1998-06-16 | Advanced Micro Devices, Inc. | Method of manufacturing subfield conductive layer |
| US5973375A (en) * | 1997-06-06 | 1999-10-26 | Hughes Electronics Corporation | Camouflaged circuit structure with step implants |
| US6391724B1 (en) * | 1999-12-24 | 2002-05-21 | Hyundai Electronics Industries Co., Ltd. | Method for manufacturing a gate structure incorporating aluminum oxide as a gate dielectric |
| US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
| US6815816B1 (en) | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
| US6740942B2 (en) | 2001-06-15 | 2004-05-25 | Hrl Laboratories, Llc. | Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
| US6774413B2 (en) | 2001-06-15 | 2004-08-10 | Hrl Laboratories, Llc | Integrated circuit structure with programmable connector/isolator |
| US6897535B2 (en) * | 2002-05-14 | 2005-05-24 | Hrl Laboratories, Llc | Integrated circuit with reverse engineering protection |
| US6979606B2 (en) | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
| WO2004055868A2 (en) | 2002-12-13 | 2004-07-01 | Hrl Laboratories, Llc | Integrated circuit modification using well implants |
| US20050275058A1 (en) * | 2004-05-28 | 2005-12-15 | Leibiger Steven M | Method for enhancing field oxide and integrated circuit with enhanced field oxide |
| US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
| US8421119B2 (en) * | 2006-09-13 | 2013-04-16 | Rohm Co., Ltd. | GaN related compound semiconductor element and process for producing the same and device having the same |
| US8168487B2 (en) | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1357515A (en) * | 1972-03-10 | 1974-06-26 | Matsushita Electronics Corp | Method for manufacturing an mos integrated circuit |
| US3747200A (en) * | 1972-03-31 | 1973-07-24 | Motorola Inc | Integrated circuit fabrication method |
| US3873372A (en) * | 1973-07-09 | 1975-03-25 | Ibm | Method for producing improved transistor devices |
| US4013489A (en) * | 1976-02-10 | 1977-03-22 | Intel Corporation | Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit |
| JPS52146578A (en) * | 1976-05-28 | 1977-12-06 | Texas Instruments Inc | Method of producing resistance element and semiconductor device having same element |
-
1976
- 1976-10-25 NL NLAANVRAGE7611773,A patent/NL185376C/nl not_active IP Right Cessation
- 1976-12-16 SE SE7614157A patent/SE414980B/xx not_active IP Right Cessation
- 1976-12-17 GB GB52770/76A patent/GB1567197A/en not_active Expired
- 1976-12-23 IT IT30842/76A patent/IT1066832B/it active
- 1976-12-24 AU AU20908/76A patent/AU506465B2/en not_active Expired
- 1976-12-27 US US05/754,896 patent/US4101344A/en not_active Expired - Lifetime
-
1977
- 1977-01-06 CA CA269,266A patent/CA1075372A/en not_active Expired
- 1977-06-06 JP JP6587377A patent/JPS5353276A/ja active Granted
- 1977-10-12 DE DE19772745857 patent/DE2745857A1/de active Granted
- 1977-10-21 CH CH1285977A patent/CH623959A5/de not_active IP Right Cessation
- 1977-10-24 FR FR7731904A patent/FR2368799A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| NL185376C (nl) | 1990-03-16 |
| DE2745857A1 (de) | 1978-04-27 |
| GB1567197A (en) | 1980-05-14 |
| JPS5353276A (en) | 1978-05-15 |
| SE414980B (sv) | 1980-08-25 |
| FR2368799A1 (fr) | 1978-05-19 |
| NL7611773A (nl) | 1978-04-27 |
| CA1075372A (en) | 1980-04-08 |
| SE7614157L (sv) | 1978-04-26 |
| JPS6112382B2 (nl) | 1986-04-08 |
| DE2745857C2 (nl) | 1988-12-08 |
| US4101344A (en) | 1978-07-18 |
| AU2090876A (en) | 1978-06-29 |
| FR2368799B1 (nl) | 1983-04-08 |
| AU506465B2 (en) | 1980-01-03 |
| NL185376B (nl) | 1989-10-16 |
| IT1066832B (it) | 1985-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE2745857C2 (nl) | ||
| DE2212049C2 (de) | Verfahren zur Herstellung einer Halbleiteranordnung und Verfahren zur Herstellung eines Transistors | |
| DE2646308C3 (de) | Verfahren zum Herstellen nahe beieinander liegender elektrisch leitender Schichten | |
| DE3245064C2 (nl) | ||
| DE3116268C2 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
| DE2732184A1 (de) | Halbleitervorrichtung und verfahren zu ihrer herstellung | |
| DE2749607C3 (de) | Halbleiteranordnung und Verfahren zu deren Herstellung | |
| DE2926334C2 (nl) | ||
| DE2420239A1 (de) | Verfahren zur herstellung doppelt diffundierter lateraler transistoren | |
| DE2729973A1 (de) | Verfahren zur herstellung einer halbleiteranordnung | |
| DE2453279C3 (de) | Halbleiteranordnung | |
| EP0000545B1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung mit Selbstjustierung | |
| DE3018594C2 (de) | Verfahren zum Herstellen eines Sperrschicht-Feldeffekttransistors | |
| DE69105621T2 (de) | Herstellungsverfahren eines Kanals in MOS-Halbleiteranordnung. | |
| DE3001032A1 (de) | Halbleiteranordnung und verfahren zu deren herstellung | |
| DE2752335C3 (de) | Verfahren zur Herstellung eines Sperrschicht-Feldeffekttransistors mit einem vertikalen Kanal | |
| DE2533460A1 (de) | Verfahren zur einstellung der schwellenspannung von feldeffekttransistoren | |
| DE2111633A1 (de) | Verfahren zur Herstellung eines Oberflaechen-Feldeffekt-Transistors | |
| DE3015101C2 (nl) | ||
| DE2320420A1 (de) | Verfahren zur herstellung eines leitfaehigen verbindungsmusters auf halbleiterschaltungen sowie nach dem verfahren hergestellte anordnungen | |
| EP0005181B1 (de) | Verfahren zur Herstellung einer, Bauelemente vom Feldeffekttransistortyp enthaltenden, Halbleiteranordnung | |
| DE2510951C3 (de) | Verfahren zur Herstellung einer monolithisch integrierten Halbleiterschaltung | |
| DE2522448A1 (de) | Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung | |
| DE2840975A1 (de) | Verfahren zur herstellung einer integrierten halbleiterschaltung | |
| EP0002797A1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung mit aktiven Bauelementen und Widerstandsgebieten |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PFA | Name/firm changed |
Owner name: PHILIPS ELECTRONICS N.V. |
|
| PL | Patent ceased |