NL185376B - Werkwijze ter vervaardiging van een halfgeleiderinrichting. - Google Patents

Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Info

Publication number
NL185376B
NL185376B NLAANVRAGE7611773,A NL7611773A NL185376B NL 185376 B NL185376 B NL 185376B NL 7611773 A NL7611773 A NL 7611773A NL 185376 B NL185376 B NL 185376B
Authority
NL
Netherlands
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
NLAANVRAGE7611773,A
Other languages
English (en)
Other versions
NL185376C (nl
NL7611773A (nl
Inventor
Elze Dr Kooi
Pieter Johannes Wilhel Jochems
Adrianus Teunis Van Ir Zanten
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NLAANVRAGE7611773,A priority Critical patent/NL185376C/nl
Priority to SE7614157A priority patent/SE414980B/xx
Priority to GB52770/76A priority patent/GB1567197A/en
Priority to IT30842/76A priority patent/IT1066832B/it
Priority to AU20908/76A priority patent/AU506465B2/en
Priority to US05/754,896 priority patent/US4101344A/en
Priority to CA269,266A priority patent/CA1075372A/en
Priority to JP6587377A priority patent/JPS5353276A/ja
Priority to DE19772745857 priority patent/DE2745857A1/de
Priority to CH1285977A priority patent/CH623959A5/de
Priority to FR7731904A priority patent/FR2368799A1/fr
Publication of NL7611773A publication Critical patent/NL7611773A/nl
Publication of NL185376B publication Critical patent/NL185376B/nl
Application granted granted Critical
Publication of NL185376C publication Critical patent/NL185376C/nl

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
NLAANVRAGE7611773,A 1976-10-25 1976-10-25 Werkwijze ter vervaardiging van een halfgeleiderinrichting. NL185376C (nl)

Priority Applications (11)

Application Number Priority Date Filing Date Title
NLAANVRAGE7611773,A NL185376C (nl) 1976-10-25 1976-10-25 Werkwijze ter vervaardiging van een halfgeleiderinrichting.
SE7614157A SE414980B (sv) 1976-10-25 1976-12-16 Sett att framstella en halvledaranordning
GB52770/76A GB1567197A (en) 1976-10-25 1976-12-17 Methods of manufacturing semiconductor devices
IT30842/76A IT1066832B (it) 1976-10-25 1976-12-23 Metodo per la fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo
AU20908/76A AU506465B2 (en) 1976-10-25 1976-12-24 Semiconductor F. E. T. device
US05/754,896 US4101344A (en) 1976-10-25 1976-12-27 Method of manufacturing a semiconductor device
CA269,266A CA1075372A (en) 1976-10-25 1977-01-06 Semiconductor device with underpass interconnection zone
JP6587377A JPS5353276A (en) 1976-10-25 1977-06-06 Method of producing semiconductor device
DE19772745857 DE2745857A1 (de) 1976-10-25 1977-10-12 Verfahren zur herstellung einer halbleiteranordnung
CH1285977A CH623959A5 (nl) 1976-10-25 1977-10-21
FR7731904A FR2368799A1 (fr) 1976-10-25 1977-10-24 Dispositif semiconducteur et son procede de fabrication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NLAANVRAGE7611773,A NL185376C (nl) 1976-10-25 1976-10-25 Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Publications (3)

Publication Number Publication Date
NL7611773A NL7611773A (nl) 1978-04-27
NL185376B true NL185376B (nl) 1989-10-16
NL185376C NL185376C (nl) 1990-03-16

Family

ID=19827103

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7611773,A NL185376C (nl) 1976-10-25 1976-10-25 Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Country Status (11)

Country Link
US (1) US4101344A (nl)
JP (1) JPS5353276A (nl)
AU (1) AU506465B2 (nl)
CA (1) CA1075372A (nl)
CH (1) CH623959A5 (nl)
DE (1) DE2745857A1 (nl)
FR (1) FR2368799A1 (nl)
GB (1) GB1567197A (nl)
IT (1) IT1066832B (nl)
NL (1) NL185376C (nl)
SE (1) SE414980B (nl)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7038290B1 (en) 1965-09-28 2006-05-02 Li Chou H Integrated circuit device
US5696402A (en) * 1965-09-28 1997-12-09 Li; Chou H. Integrated circuit device
US4244752A (en) * 1979-03-06 1981-01-13 Burroughs Corporation Single mask method of fabricating complementary integrated circuits
US4288910A (en) * 1979-04-16 1981-09-15 Teletype Corporation Method of manufacturing a semiconductor device
NL7903158A (nl) * 1979-04-23 1980-10-27 Philips Nv Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
US4261761A (en) * 1979-09-04 1981-04-14 Tektronix, Inc. Method of manufacturing sub-micron channel width MOS transistor
US4458262A (en) * 1980-05-27 1984-07-03 Supertex, Inc. CMOS Device with ion-implanted channel-stop region and fabrication method therefor
NL8003612A (nl) * 1980-06-23 1982-01-18 Philips Nv Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd door toepassing van deze werkwijze.
EP0052475A3 (en) * 1980-11-19 1983-12-21 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
NL186886C (nl) * 1980-11-28 1992-03-16 Philips Nv Halfgeleiderinrichting.
US4373965A (en) * 1980-12-22 1983-02-15 Ncr Corporation Suppression of parasitic sidewall transistors in locos structures
US4511911A (en) * 1981-07-22 1985-04-16 International Business Machines Corporation Dense dynamic memory cell structure and process
US4763177A (en) * 1985-02-19 1988-08-09 Texas Instruments Incorporated Read only memory with improved channel length isolation and method of forming
GB2179787B (en) * 1985-08-26 1989-09-20 Intel Corp Buried interconnect for mos structure
US4700461A (en) * 1986-09-29 1987-10-20 Massachusetts Institute Of Technology Process for making junction field-effect transistors
US4874715A (en) * 1987-05-20 1989-10-17 Texas Instruments Incorporated Read only memory with improved channel length control and method of forming
GB2215124A (en) * 1988-02-16 1989-09-13 Stc Plc Integrated circuit underpasses
DE69324637T2 (de) 1992-07-31 1999-12-30 Hughes Electronics Corp., El Segundo Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen
US5927992A (en) * 1993-12-22 1999-07-27 Stmicroelectronics, Inc. Method of forming a dielectric in an integrated circuit
US5811865A (en) * 1993-12-22 1998-09-22 Stmicroelectronics, Inc. Dielectric in an integrated circuit
US5418176A (en) * 1994-02-17 1995-05-23 United Microelectronics Corporation Process for producing memory devices having narrow buried N+ lines
JP3653107B2 (ja) * 1994-03-14 2005-05-25 株式会社ルネサステクノロジ 半導体装置およびその製造方法
US5756385A (en) * 1994-03-30 1998-05-26 Sandisk Corporation Dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
US5661053A (en) * 1994-05-25 1997-08-26 Sandisk Corporation Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
US20040144999A1 (en) * 1995-06-07 2004-07-29 Li Chou H. Integrated circuit device
US5767000A (en) * 1996-06-05 1998-06-16 Advanced Micro Devices, Inc. Method of manufacturing subfield conductive layer
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants
US6391724B1 (en) * 1999-12-24 2002-05-21 Hyundai Electronics Industries Co., Ltd. Method for manufacturing a gate structure incorporating aluminum oxide as a gate dielectric
US7217977B2 (en) * 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US6740942B2 (en) 2001-06-15 2004-05-25 Hrl Laboratories, Llc. Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US6774413B2 (en) 2001-06-15 2004-08-10 Hrl Laboratories, Llc Integrated circuit structure with programmable connector/isolator
US6897535B2 (en) * 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US6979606B2 (en) 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
WO2004055868A2 (en) 2002-12-13 2004-07-01 Hrl Laboratories, Llc Integrated circuit modification using well implants
US20050275058A1 (en) * 2004-05-28 2005-12-15 Leibiger Steven M Method for enhancing field oxide and integrated circuit with enhanced field oxide
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US8421119B2 (en) * 2006-09-13 2013-04-16 Rohm Co., Ltd. GaN related compound semiconductor element and process for producing the same and device having the same
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1357515A (en) * 1972-03-10 1974-06-26 Matsushita Electronics Corp Method for manufacturing an mos integrated circuit
US3747200A (en) * 1972-03-31 1973-07-24 Motorola Inc Integrated circuit fabrication method
US3873372A (en) * 1973-07-09 1975-03-25 Ibm Method for producing improved transistor devices
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
JPS52146578A (en) * 1976-05-28 1977-12-06 Texas Instruments Inc Method of producing resistance element and semiconductor device having same element

Also Published As

Publication number Publication date
NL185376C (nl) 1990-03-16
DE2745857A1 (de) 1978-04-27
GB1567197A (en) 1980-05-14
JPS5353276A (en) 1978-05-15
CH623959A5 (nl) 1981-06-30
SE414980B (sv) 1980-08-25
FR2368799A1 (fr) 1978-05-19
NL7611773A (nl) 1978-04-27
CA1075372A (en) 1980-04-08
SE7614157L (sv) 1978-04-26
JPS6112382B2 (nl) 1986-04-08
DE2745857C2 (nl) 1988-12-08
US4101344A (en) 1978-07-18
AU2090876A (en) 1978-06-29
FR2368799B1 (nl) 1983-04-08
AU506465B2 (en) 1980-01-03
IT1066832B (it) 1985-03-12

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Legal Events

Date Code Title Description
BC A request for examination has been filed
A85 Still pending on 85-01-01
V1 Lapsed because of non-payment of the annual fee