CA1042115A - Removal of projections on epitaxial layers - Google Patents

Removal of projections on epitaxial layers

Info

Publication number
CA1042115A
CA1042115A CA246,348A CA246348A CA1042115A CA 1042115 A CA1042115 A CA 1042115A CA 246348 A CA246348 A CA 246348A CA 1042115 A CA1042115 A CA 1042115A
Authority
CA
Canada
Prior art keywords
projections
coating
semiconductor
etchant
accordance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA246,348A
Other languages
English (en)
French (fr)
Inventor
William C. Erdman
Lewis E. Katz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Application granted granted Critical
Publication of CA1042115A publication Critical patent/CA1042115A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H10P95/064—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching
    • H10P95/066—Planarisation of inorganic insulating materials involving a dielectric removal step the removal being chemical etching the removal being a selective chemical etching step, e.g. selective dry etching through a mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • H10P50/695—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/017—Clean surfaces
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special

Landscapes

  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
CA246,348A 1975-03-31 1976-02-23 Removal of projections on epitaxial layers Expired CA1042115A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/563,722 US3990925A (en) 1975-03-31 1975-03-31 Removal of projections on epitaxial layers

Publications (1)

Publication Number Publication Date
CA1042115A true CA1042115A (en) 1978-11-07

Family

ID=24251640

Family Applications (1)

Application Number Title Priority Date Filing Date
CA246,348A Expired CA1042115A (en) 1975-03-31 1976-02-23 Removal of projections on epitaxial layers

Country Status (7)

Country Link
US (1) US3990925A (oth)
JP (1) JPS51121266A (oth)
CA (1) CA1042115A (oth)
DE (1) DE2613490C3 (oth)
FR (1) FR2306529A1 (oth)
GB (1) GB1537306A (oth)
IT (1) IT1058695B (oth)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244173A (en) * 1975-10-06 1977-04-06 Hitachi Ltd Method of flat etching of silicon substrate
JPS5527686A (en) * 1978-08-21 1980-02-27 Sony Corp Projection eliminating device
JPS5612723A (en) * 1979-07-11 1981-02-07 Fujitsu Ltd Manufacture of semiconductor device
JPS56114315A (en) * 1980-02-14 1981-09-08 Fujitsu Ltd Manufacture of semiconductor device
JPS57115824A (en) * 1981-01-10 1982-07-19 Nec Home Electronics Ltd Removing epitaxial layer mound
DE3524765A1 (de) * 1985-07-11 1987-01-22 Licentia Gmbh Verfahren zum herstellen einer durchsichtphotokathode
JPS62128516A (ja) * 1985-11-29 1987-06-10 Shin Etsu Handotai Co Ltd 半導体ウエ−ハの突起物除去方法
DE3721940A1 (de) * 1987-07-02 1989-01-12 Ibm Deutschland Entfernen von partikeln von oberflaechen fester koerper durch laserbeschuss
JP3060714B2 (ja) * 1992-04-15 2000-07-10 日本電気株式会社 半導体集積回路の製造方法
JP2011096935A (ja) * 2009-10-30 2011-05-12 Fujifilm Corp エピタキシャルウエハ、エピタキシャルウエハの製造方法、発光素子ウエハ、発光素子ウエハの製造方法、及び発光素子
FR2994615A1 (fr) * 2012-08-14 2014-02-21 Commissariat Energie Atomique Procede de planarisation d'une couche epitaxiee
KR102646643B1 (ko) 2017-09-14 2024-03-12 신에쓰 가가꾸 고교 가부시끼가이샤 수중유형 유화 조성물의 제조 방법 및 화장료
JP2019090956A (ja) * 2017-11-16 2019-06-13 旭化成エレクトロニクス株式会社 光学素子の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1652225A1 (de) * 1967-08-21 1971-04-22 Halbleiterwerk Frankfurt Oder Verfahren zum Abtragen und Polieren von Halbleiterkoerpern,insbesondere Silizium-Einkristallscheiben
US3656671A (en) * 1970-03-16 1972-04-18 Ibm Frangible projection removal
US3699644A (en) * 1971-01-04 1972-10-24 Sylvania Electric Prod Method of dividing wafers
US3783044A (en) * 1971-04-09 1974-01-01 Motorola Inc Photoresist keys and depth indicator
US3718514A (en) * 1971-05-28 1973-02-27 Bell Telephone Labor Inc Removal of projections on epitaxial layers
BE789090A (fr) * 1971-09-22 1973-01-15 Western Electric Co Procede et solution d'attaque de semi-conducteurs
US3838501A (en) * 1973-02-09 1974-10-01 Honeywell Inf Systems Method in microcircuit package assembly providing nonabrasive, electrically passive edges on integrated circuit chips

Also Published As

Publication number Publication date
GB1537306A (en) 1978-12-29
FR2306529B1 (oth) 1978-05-19
IT1058695B (it) 1982-05-10
DE2613490C3 (de) 1981-10-08
FR2306529A1 (fr) 1976-10-29
USB563722I5 (oth) 1976-01-13
US3990925A (en) 1976-11-09
DE2613490A1 (de) 1976-10-14
JPS51121266A (en) 1976-10-23
DE2613490B2 (de) 1978-04-13
JPS5533176B2 (oth) 1980-08-29

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