BR112016024960A2 - circuitos de malha fechada por rede de baixo ruído - Google Patents

circuitos de malha fechada por rede de baixo ruído

Info

Publication number
BR112016024960A2
BR112016024960A2 BR112016024960A BR112016024960A BR112016024960A2 BR 112016024960 A2 BR112016024960 A2 BR 112016024960A2 BR 112016024960 A BR112016024960 A BR 112016024960A BR 112016024960 A BR112016024960 A BR 112016024960A BR 112016024960 A2 BR112016024960 A2 BR 112016024960A2
Authority
BR
Brazil
Prior art keywords
signal
closed loop
low noise
loop circuits
signals
Prior art date
Application number
BR112016024960A
Other languages
English (en)
Portuguese (pt)
Inventor
Savla Anup
Bicakci Ara
Yang Jeongsik
Wang Shen
Cat Nguyen Thinh
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112016024960A2 publication Critical patent/BR112016024960A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/05—Compensating for non-linear characteristics of the controlled oscillator

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
BR112016024960A 2014-04-30 2015-04-15 circuitos de malha fechada por rede de baixo ruído BR112016024960A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/266,730 US20150318860A1 (en) 2014-04-30 2014-04-30 Low noise phase locked loops
PCT/US2015/025967 WO2015167805A1 (en) 2014-04-30 2015-04-15 Low noise phase locked loops

Publications (1)

Publication Number Publication Date
BR112016024960A2 true BR112016024960A2 (pt) 2017-08-15

Family

ID=53177354

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016024960A BR112016024960A2 (pt) 2014-04-30 2015-04-15 circuitos de malha fechada por rede de baixo ruído

Country Status (7)

Country Link
US (1) US20150318860A1 (enrdf_load_stackoverflow)
EP (1) EP3138201A1 (enrdf_load_stackoverflow)
JP (1) JP6679499B2 (enrdf_load_stackoverflow)
KR (1) KR20160146752A (enrdf_load_stackoverflow)
CN (1) CN106537784B (enrdf_load_stackoverflow)
BR (1) BR112016024960A2 (enrdf_load_stackoverflow)
WO (1) WO2015167805A1 (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
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US9553715B2 (en) * 2014-12-22 2017-01-24 Opel Solar, Inc. Optical phase detector for an optical phase lock loop
US10120064B2 (en) * 2015-03-19 2018-11-06 Nxp Usa, Inc. Radar system and method with saturation detection and reset
TWI554037B (zh) * 2015-04-16 2016-10-11 群聯電子股份有限公司 時脈資料回復電路模組、記憶體儲存裝置及相位鎖定方法
CN110061737B (zh) * 2019-04-26 2023-05-16 海光信息技术股份有限公司 相位锁定检测输出电路及全数字锁相环系统
JP7301766B2 (ja) * 2020-03-04 2023-07-03 株式会社東芝 位相補正装置、測距装置及び位相変動検出装置
JP7301771B2 (ja) * 2020-03-19 2023-07-03 株式会社東芝 位相補正装置、測距装置及び位相変動検出装置
WO2022041277A1 (zh) * 2020-08-31 2022-03-03 华为技术有限公司 锁相环和射频收发机
TWI739640B (zh) * 2020-10-27 2021-09-11 瑞昱半導體股份有限公司 電路和相關晶片

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JPS561619A (en) * 1979-06-19 1981-01-09 Toshiba Corp Phase comparator
JP3021747B2 (ja) * 1991-04-26 2000-03-15 松下電器産業株式会社 Ｐｌｌ回路
JP3208736B2 (ja) * 1991-11-08 2001-09-17 ソニー株式会社 Ｐｌｌ回路
US5307028A (en) * 1992-10-16 1994-04-26 Ncr Corporation Phase-and-frequency mode/phase mode detector with the same gain in both modes
US5304952A (en) * 1993-05-10 1994-04-19 National Semiconductor Corporation Lock sensor circuit and method for phase lock loop circuits
JPH07142966A (ja) * 1993-11-12 1995-06-02 Sanyo Electric Co Ltd 逓倍回路
US6002273A (en) * 1998-10-05 1999-12-14 Motorola, Inc. Linear low noise phase-frequency detector
JP2000349625A (ja) * 1999-06-01 2000-12-15 Fujitsu Denso Ltd 位相比較器及び位相同期回路
US6275072B1 (en) * 1999-10-07 2001-08-14 Velio Communications, Inc. Combined phase comparator and charge pump circuit
JP4015793B2 (ja) * 2000-02-16 2007-11-28 株式会社東芝 位相比較回路およびｐｌｌ回路
GB2362045B (en) * 2000-02-23 2004-05-05 Phoenix Vlsi Consultants Ltd Analogue-Controlled phase interpolator
US6605935B2 (en) * 2001-03-21 2003-08-12 Telefonaktiebolaget L M Ericsson (Publ) Linear fast-locking digital phase detector
US7082176B2 (en) * 2002-06-12 2006-07-25 Broadcom Corporation Linearized fractional-N synthesizer with fixed charge pump offset
JP2004120443A (ja) * 2002-09-27 2004-04-15 Matsushita Electric Ind Co Ltd 遅延調整回路
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JP4033154B2 (ja) * 2004-03-15 2008-01-16 松下電工株式会社 フラクショナルｎ周波数シンセサイザ装置
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JP4827764B2 (ja) * 2007-02-20 2011-11-30 富士通セミコンダクター株式会社 分数分周ｐｌｌ装置、およびその制御方法
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Also Published As

Publication number Publication date
CN106537784B (zh) 2019-08-02
CN106537784A (zh) 2017-03-22
KR20160146752A (ko) 2016-12-21
EP3138201A1 (en) 2017-03-08
JP6679499B2 (ja) 2020-04-15
JP2017518685A (ja) 2017-07-06
WO2015167805A1 (en) 2015-11-05
US20150318860A1 (en) 2015-11-05

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Legal Events

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2562 DE 2020-02-11

B350 Update of information on the portal [chapter 15.35 patent gazette]