BE789500A - Memoire a semiconducteurs avec elements de memorisation a un seul transistor - Google Patents

Memoire a semiconducteurs avec elements de memorisation a un seul transistor

Info

Publication number
BE789500A
BE789500A BE789500DA BE789500A BE 789500 A BE789500 A BE 789500A BE 789500D A BE789500D A BE 789500DA BE 789500 A BE789500 A BE 789500A
Authority
BE
Belgium
Prior art keywords
semiconductor memory
single transistor
memorization
elements
memorization elements
Prior art date
Application number
Other languages
English (en)
French (fr)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication date
Priority claimed from DE19712148896 external-priority patent/DE2148896C3/de
Publication of BE789500A publication Critical patent/BE789500A/xx

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4099Dummy cell treatment; Reference voltage generators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356086Bistable circuits with additional means for controlling the main nodes
    • H03K3/356095Bistable circuits with additional means for controlling the main nodes with synchronous operation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/023Shaping pulses by amplifying using field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
BE789500D 1971-09-30 Memoire a semiconducteurs avec elements de memorisation a un seul transistor BE789500A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19712148896 DE2148896C3 (de) 1971-09-30 Halbleiterspeicher mit Ein-Transistor-Speicherelementen und mit Flipflop-Schaltung zur Informationsbewertung und -regenerierung und Verfahren zum Betrieb dieses Speichers
DE2409058A DE2409058A1 (de) 1971-09-30 1974-02-25 Regenerierschaltung fuer binaersignale nach art eines getasteten flipflops und verfahren zu deren betrieb

Publications (1)

Publication Number Publication Date
BE789500A true BE789500A (fr) 1973-03-29

Family

ID=62567065

Family Applications (1)

Application Number Title Priority Date Filing Date
BE789500D BE789500A (fr) 1971-09-30 Memoire a semiconducteurs avec elements de memorisation a un seul transistor

Country Status (9)

Country Link
US (1) US3774176A (ja)
JP (2) JPS5516342B2 (ja)
BE (1) BE789500A (ja)
DE (1) DE2409058A1 (ja)
FR (1) FR2154683B1 (ja)
GB (1) GB1409910A (ja)
IT (1) IT968421B (ja)
LU (1) LU66201A1 (ja)
NL (1) NL7213087A (ja)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT335777B (de) * 1972-12-19 1977-03-25 Siemens Ag Regenerierschaltung fur binarsignale nach art eines getasteten flipflops
GB1401262A (en) * 1973-02-23 1975-07-16 Ibm Data storage apparatus
DE2309192C3 (de) * 1973-02-23 1975-08-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Regenerierschaltung nach Art eines getasteten Flipflops und Verfahren zum Betrieb einer solchen Regenerierschaltung
US3838404A (en) * 1973-05-17 1974-09-24 Teletype Corp Random access memory system and cell
FR2239737B1 (ja) * 1973-08-02 1980-12-05 Texas Instruments Inc
US3940747A (en) * 1973-08-02 1976-02-24 Texas Instruments Incorporated High density, high speed random access read-write memory
JPS5080736A (ja) * 1973-11-14 1975-07-01
JPS5081741A (ja) * 1973-11-22 1975-07-02
JPS5721795B2 (ja) * 1973-12-06 1982-05-10
JPS5088944A (ja) * 1973-12-10 1975-07-17
US3882326A (en) * 1973-12-26 1975-05-06 Ibm Differential amplifier for sensing small signals
US3836894A (en) * 1974-01-22 1974-09-17 Westinghouse Electric Corp Mnos/sos random access memory
JPS50122134A (ja) * 1974-03-06 1975-09-25
US3949381A (en) * 1974-07-23 1976-04-06 International Business Machines Corporation Differential charge transfer sense amplifier
US3979603A (en) * 1974-08-22 1976-09-07 Texas Instruments Incorporated Regenerative charge detector for charged coupled devices
GB1523752A (en) * 1974-08-28 1978-09-06 Siemens Ag Dynamic semiconductor data stores
DE2454427C2 (de) * 1974-11-16 1982-04-29 Ibm Deutschland Gmbh, 7000 Stuttgart Assoziativspeicher
US3965460A (en) * 1975-01-02 1976-06-22 Motorola, Inc. MOS speed-up circuit
US3938108A (en) * 1975-02-03 1976-02-10 Intel Corporation Erasable programmable read-only memory
US4004284A (en) * 1975-03-05 1977-01-18 Teletype Corporation Binary voltage-differential sensing circuits, and sense/refresh amplifier circuits for random-access memories
US3976895A (en) * 1975-03-18 1976-08-24 Bell Telephone Laboratories, Incorporated Low power detector circuit
US3983413A (en) * 1975-05-02 1976-09-28 Fairchild Camera And Instrument Corporation Balanced differential capacitively decoupled charge sensor
US3992637A (en) * 1975-05-21 1976-11-16 Ibm Corporation Unclocked sense ampllifier
US3993917A (en) * 1975-05-29 1976-11-23 International Business Machines Corporation Parameter independent FET sense amplifier
US4021682A (en) * 1975-06-30 1977-05-03 Honeywell Information Systems, Inc. Charge detectors for CCD registers
US3983545A (en) * 1975-06-30 1976-09-28 International Business Machines Corporation Random access memory employing single ended sense latch for one device cell
DE2634089C3 (de) * 1975-08-11 1988-09-08 Nippon Telegraph And Telephone Corp., Tokio/Tokyo Schaltungsanordnung zum Erfassen schwacher Signale
JPS5228824A (en) * 1975-08-29 1977-03-04 Toshiba Corp Multiple storage unit
DE2646245A1 (de) * 1975-10-28 1977-05-05 Motorola Inc Speicherschaltung
US4010453A (en) * 1975-12-03 1977-03-01 International Business Machines Corporation Stored charge differential sense amplifier
US4039861A (en) * 1976-02-09 1977-08-02 International Business Machines Corporation Cross-coupled charge transfer sense amplifier circuits
JPS5922316B2 (ja) * 1976-02-24 1984-05-25 株式会社東芝 ダイナミツクメモリ装置
JPS52116120A (en) * 1976-03-26 1977-09-29 Hitachi Ltd Memory
DE2623219B2 (de) * 1976-05-24 1978-10-12 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Betreiben einer Leseverstärkerschaltung für einen dynamischen MOS-Speicher und Anordnung zur Durchführung dieses Verfahrens
DE2630797C2 (de) * 1976-07-08 1978-08-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Funktionsgenerator zur Erzeugung einer Spannung an einem Knoten, an den den Bitleitungen eines MOS-Speichers zugeordnete Flip-Flops aus MOS-Transistoren angeschlossen sind
JPS5399736A (en) * 1977-02-10 1978-08-31 Toshiba Corp Semiconductor memory unit
US4123799A (en) * 1977-09-19 1978-10-31 Motorola, Inc. High speed IFGET sense amplifier/latch
JPS56110252A (en) * 1980-02-05 1981-09-01 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory device
EP0052101A1 (en) * 1980-06-02 1982-05-26 Mostek Corporation Shared quiet line flip-flop
JPS60191499A (ja) * 1984-03-09 1985-09-28 Toshiba Corp ダイナミツク型ランダムアクセスメモリ
JPS6155299U (ja) * 1985-05-10 1986-04-14
ATE73255T1 (de) * 1986-11-18 1992-03-15 Siemens Ag Digitalverstaerkeranordnung in integrierten schaltungen.
JPH0684359A (ja) * 1993-08-13 1994-03-25 Hitachi Ltd 半導体メモリ
EP0747903B1 (en) * 1995-04-28 2002-04-10 STMicroelectronics S.r.l. Reading circuit for memory cells devices having a low supply voltage
JP3741053B2 (ja) * 2002-02-18 2006-02-01 ソニー株式会社 画像処理装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3588537A (en) * 1969-05-05 1971-06-28 Shell Oil Co Digital differential circuit means
US3533089A (en) * 1969-05-16 1970-10-06 Shell Oil Co Single-rail mosfet memory with capacitive storage
US3514765A (en) * 1969-05-23 1970-05-26 Shell Oil Co Sense amplifier comprising cross coupled mosfet's operating in a race mode for single device per bit mosfet memories
US3678473A (en) * 1970-06-04 1972-07-18 Shell Oil Co Read-write circuit for capacitive memory arrays
US3651492A (en) * 1970-11-02 1972-03-21 Ncr Co Nonvolatile memory cell

Also Published As

Publication number Publication date
JPS5516342B2 (ja) 1980-05-01
DE2148896A1 (de) 1973-04-12
JPS4873031A (ja) 1973-10-02
JPS50120549A (ja) 1975-09-20
LU66201A1 (ja) 1973-04-02
FR2154683A1 (ja) 1973-05-11
US3774176A (en) 1973-11-20
NL7213087A (ja) 1973-04-03
FR2154683B1 (ja) 1977-01-14
DE2409058A1 (de) 1975-09-04
DE2148896B2 (de) 1975-01-23
GB1409910A (en) 1975-10-15
IT968421B (it) 1974-03-20
JPS595993B2 (ja) 1984-02-08

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