AU2737301A - An insitu post etch process to remove remaining photoresist and residual sidewall passivation - Google Patents

An insitu post etch process to remove remaining photoresist and residual sidewall passivation

Info

Publication number
AU2737301A
AU2737301A AU27373/01A AU2737301A AU2737301A AU 2737301 A AU2737301 A AU 2737301A AU 27373/01 A AU27373/01 A AU 27373/01A AU 2737301 A AU2737301 A AU 2737301A AU 2737301 A AU2737301 A AU 2737301A
Authority
AU
Australia
Prior art keywords
sidewall passivation
etch
etch process
remaining photoresist
remove remaining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU27373/01A
Other languages
English (en)
Inventor
Robert J. O'donnell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corp filed Critical Lam Research Corp
Publication of AU2737301A publication Critical patent/AU2737301A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/27—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers
    • H10P70/273—Cleaning during device manufacture during, before or after processing of conductive materials, e.g. polysilicon or amorphous silicon layers the processing being a delineation of conductive layers, e.g. by RIE
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/10—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H10P70/18—Cleaning before device manufacture, i.e. Begin-Of-Line process by combined dry cleaning and wet cleaning

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Removal Of Specific Substances (AREA)
AU27373/01A 1999-12-27 2000-12-21 An insitu post etch process to remove remaining photoresist and residual sidewall passivation Abandoned AU2737301A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09472757 1999-12-27
US09/472,757 US6852636B1 (en) 1999-12-27 1999-12-27 Insitu post etch process to remove remaining photoresist and residual sidewall passivation
PCT/US2000/035165 WO2001048808A1 (en) 1999-12-27 2000-12-21 An insitu post etch process to remove remaining photoresist and residual sidewall passivation

Publications (1)

Publication Number Publication Date
AU2737301A true AU2737301A (en) 2001-07-09

Family

ID=23876824

Family Applications (1)

Application Number Title Priority Date Filing Date
AU27373/01A Abandoned AU2737301A (en) 1999-12-27 2000-12-21 An insitu post etch process to remove remaining photoresist and residual sidewall passivation

Country Status (10)

Country Link
US (1) US6852636B1 (https=)
EP (1) EP1243023B1 (https=)
JP (2) JP2003518768A (https=)
KR (1) KR100794538B1 (https=)
CN (1) CN1210773C (https=)
AT (1) ATE431964T1 (https=)
AU (1) AU2737301A (https=)
DE (1) DE60042246D1 (https=)
TW (1) TW471060B (https=)
WO (1) WO2001048808A1 (https=)

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US6943039B2 (en) * 2003-02-11 2005-09-13 Applied Materials Inc. Method of etching ferroelectric layers
CN100444025C (zh) * 2004-07-12 2008-12-17 北京北方微电子基地设备工艺研究中心有限责任公司 光刻胶修整方法
US7597816B2 (en) * 2004-09-03 2009-10-06 Lam Research Corporation Wafer bevel polymer removal
US7413993B2 (en) * 2004-11-22 2008-08-19 Infineon Technologies Ag Process for removing a residue from a metal structure on a semiconductor substrate
JP4518986B2 (ja) * 2005-03-17 2010-08-04 東京エレクトロン株式会社 大気搬送室、被処理体の処理後搬送方法、プログラム及び記憶媒体
US20060246720A1 (en) * 2005-04-28 2006-11-02 Chii-Ming Wu Method to improve thermal stability of silicides with additives
US20070032081A1 (en) * 2005-08-08 2007-02-08 Jeremy Chang Edge ring assembly with dielectric spacer ring
US7479457B2 (en) * 2005-09-08 2009-01-20 Lam Research Corporation Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof
US20070227555A1 (en) * 2006-04-04 2007-10-04 Johnson Michael R Method to manipulate post metal etch/side wall residue
JP2014212310A (ja) * 2013-04-02 2014-11-13 東京エレクトロン株式会社 半導体デバイスの製造方法及び製造装置
JP6844083B2 (ja) * 2015-05-27 2021-03-17 サムコ株式会社 アフターコロージョン抑制処理方法
CN107464750B (zh) * 2017-08-23 2019-12-13 成都海威华芯科技有限公司 一种去除光刻胶底膜的工艺方法
US11749532B2 (en) 2021-05-04 2023-09-05 Applied Materials, Inc. Methods and apparatus for processing a substrate
KR20240086974A (ko) * 2022-12-12 2024-06-19 피에스케이 주식회사 기판 처리 장치 및 기판 처리 방법
US20250118532A1 (en) * 2023-10-09 2025-04-10 Tokyo Electron Limited System and method for plasma processing

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US4804431A (en) 1987-11-03 1989-02-14 Aaron Ribner Microwave plasma etching machine and method of etching
JP2831646B2 (ja) * 1988-03-25 1998-12-02 株式会社東芝 半導体装置の製造方法
US4985113A (en) 1989-03-10 1991-01-15 Hitachi, Ltd. Sample treating method and apparatus
US5186718A (en) * 1989-05-19 1993-02-16 Applied Materials, Inc. Staged-vacuum wafer processing system and method
JPH0341728A (ja) * 1989-07-07 1991-02-22 Fujitsu Ltd 半導体装置の製造方法
DE69033663T2 (de) 1989-08-28 2001-06-21 Hitachi, Ltd. Verfahren zur Behandlung eines Aluminium enthaltenden Musters
US5198634A (en) 1990-05-21 1993-03-30 Mattson Brad S Plasma contamination removal process
JP2998173B2 (ja) * 1990-06-01 2000-01-11 松下電器産業株式会社 Ａｌエッチング方法
WO1992000601A1 (fr) 1990-06-27 1992-01-09 Fujitsu Limited Procede de fabrication d'un circuit integre a semi-conducteurs et appareil de fabrication correspondant
US5174856A (en) 1991-08-26 1992-12-29 Applied Materials, Inc. Method for removal of photoresist over metal which also removes or inactivates corrosion-forming materials remaining from previous metal etch
JPH05275325A (ja) * 1992-03-26 1993-10-22 Fujitsu Ltd 半導体装置の製造方法
US5462892A (en) 1992-06-22 1995-10-31 Vlsi Technology, Inc. Semiconductor processing method for preventing corrosion of metal film connections
US5931721A (en) 1994-11-07 1999-08-03 Sumitomo Heavy Industries, Ltd. Aerosol surface processing
JPH08213366A (ja) * 1995-02-07 1996-08-20 Hitachi Ltd パターン形成方法およびパターン形成装置、ならびに半導体集積回路装置の製造方法および半導体製造装置
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WO1997011482A2 (en) 1995-09-05 1997-03-27 Lsi Logic Corporation Removal of halogens and photoresist from wafers
US5573961A (en) 1995-11-09 1996-11-12 Taiwan Semiconductor Manufacturing Company Ltd. Method of making a body contact for a MOSFET device fabricated in an SOI layer
US5780359A (en) * 1995-12-11 1998-07-14 Applied Materials, Inc. Polymer removal from top surfaces and sidewalls of a semiconductor wafer
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US5712207A (en) 1996-02-29 1998-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. Profile improvement of a metal interconnect structure on a tungsten plug
DE69708787T2 (de) 1996-03-06 2002-06-20 Clariant Finance (Bvi) Ltd., Road Town Verfahren zur herstellung von filmmustern unter anwendung der abhebetechnologie
US5964949A (en) 1996-03-06 1999-10-12 Mattson Technology, Inc. ICP reactor having a conically-shaped plasma-generating section
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US5776832A (en) 1996-07-17 1998-07-07 Taiwan Semiconductor Manufacturing Company Ltd. Anti-corrosion etch process for etching metal interconnections extending over and within contact openings
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US5899716A (en) 1997-05-19 1999-05-04 Vanguard International Semiconductor Corporation Oxygen ion implantation procedure to increase the surface area of an STC structure
JPH10335313A (ja) * 1997-06-03 1998-12-18 Hitachi Ltd プラズマエッチング方法
JPH113881A (ja) * 1997-06-11 1999-01-06 Fujitsu Ltd アッシング方法及び装置
US5846884A (en) 1997-06-20 1998-12-08 Siemens Aktiengesellschaft Methods for metal etching with reduced sidewall build up during integrated circuit manufacturing
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Also Published As

Publication number Publication date
US6852636B1 (en) 2005-02-08
JP2003518768A (ja) 2003-06-10
EP1243023B1 (en) 2009-05-20
ATE431964T1 (de) 2009-06-15
CN1210773C (zh) 2005-07-13
EP1243023A1 (en) 2002-09-25
KR20020081234A (ko) 2002-10-26
TW471060B (en) 2002-01-01
DE60042246D1 (de) 2009-07-02
CN1434978A (zh) 2003-08-06
WO2001048808A1 (en) 2001-07-05
KR100794538B1 (ko) 2008-01-17
JP2012023385A (ja) 2012-02-02

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase