ATE87126T1 - Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube. - Google Patents

Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube.

Info

Publication number
ATE87126T1
ATE87126T1 AT87101150T AT87101150T ATE87126T1 AT E87126 T1 ATE87126 T1 AT E87126T1 AT 87101150 T AT87101150 T AT 87101150T AT 87101150 T AT87101150 T AT 87101150T AT E87126 T1 ATE87126 T1 AT E87126T1
Authority
AT
Austria
Prior art keywords
epoxy
glass layer
cavity
integrated circuit
stack
Prior art date
Application number
AT87101150T
Other languages
English (en)
Inventor
Ronald Allen Norrell
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Application granted granted Critical
Publication of ATE87126T1 publication Critical patent/ATE87126T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Measuring Fluid Pressure (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Polyoxymethylene Polymers And Polymers With Carbon-To-Carbon Bonds (AREA)
  • Wire Bonding (AREA)
AT87101150T 1987-01-28 1987-01-28 Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube. ATE87126T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP87101150A EP0276345B1 (de) 1987-01-28 1987-01-28 Verfahren, das eine elastische Folie benutzt zum Herstellen einer integrierten Schaltungspackung mit Kontaktflecken in einer abgestuften Grube

Publications (1)

Publication Number Publication Date
ATE87126T1 true ATE87126T1 (de) 1993-04-15

Family

ID=8196707

Family Applications (1)

Application Number Title Priority Date Filing Date
AT87101150T ATE87126T1 (de) 1987-01-28 1987-01-28 Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube.

Country Status (3)

Country Link
EP (1) EP0276345B1 (de)
AT (1) ATE87126T1 (de)
DE (1) DE3784906T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1307355C (en) * 1988-05-26 1992-09-08 David C. Degree Soft-faced semiconductor component backing
GB2222800B (en) * 1988-09-16 1992-02-19 Stc Plc Hybrid circuits
FR2739496B1 (fr) * 1995-10-03 1998-01-30 Dassault Electronique Circuit hyperfrequence multicouches a elements actifs integres
JPH09162320A (ja) * 1995-12-08 1997-06-20 Shinko Electric Ind Co Ltd 半導体パッケージおよび半導体装置
EP0795907A1 (de) * 1996-03-14 1997-09-17 Dassault Electronique Mehrlagige Hochfrequenzschaltung mit integrierten aktiven Elementen
JP4129102B2 (ja) * 1999-07-13 2008-08-06 日東電工株式会社 多層プリント配線板積層用離型材

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5615059U (de) * 1979-07-11 1981-02-09
US4551746A (en) * 1982-10-05 1985-11-05 Mayo Foundation Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation
US4737208A (en) * 1986-09-29 1988-04-12 American Telephone And Telegraph Company, At&T Bell Laboratories Method of fabricating multilayer structures with nonplanar surfaces

Also Published As

Publication number Publication date
DE3784906D1 (de) 1993-04-22
EP0276345B1 (de) 1993-03-17
EP0276345A1 (de) 1988-08-03
DE3784906T2 (de) 1993-10-07

Similar Documents

Publication Publication Date Title
ATE51091T1 (de) Ausweiskarte mit integriertem schaltkreis.
ATE87126T1 (de) Verfahren, das eine elastische folie benutzt zum herstellen einer integrierten schaltungspackung mit kontaktflecken in einer abgestuften grube.
JPS5345339A (en) Adhesive-backed fluoring resin film
JPS5737839A (en) Manufacture of hybrid integrated circuit
JPS6442183A (en) Method of packaging semiconductor device
JPS5385163A (en) Packaging method of ic chip
JPS5731148A (en) Manufacture of semiconductor device
JPS5258469A (en) Resin-molded type semiconductor device
JPS5574148A (en) Production of semiconductor device
JPS5660025A (en) Bonding method for semiconductor element
JPS54137971A (en) Resin-sealed type semiconductor device
JPS54162423A (en) Magnetic bubble device
JPS57120361A (en) Structure of film substrate
JPS52123873A (en) Sealing method of semiconductor elements
JPS6482603A (en) Method of sticking cover to electronic component
JPS5730334A (en) Protection of wiring layer
JPS53106570A (en) Production of semiconductor device
JPS5314564A (en) Bonding method of s# chip and substrate
JPS56167350A (en) Manufacture of integrated circuit
JPS5769781A (en) Semiconductor pressure-sensitive element
JPS5513913A (en) Resin sealed semiconductor device
JPS5322366A (en) Electronic part
JPS5661149A (en) Semiconductor device
JPS5541780A (en) Tape carrying tape
JPS53117970A (en) Resin seal type semiconductor device

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties